CN205507453U

CN205507453U - A high -speed CAN bus expansion board for naval vessel redundant network

Info

Publication number: CN205507453U
Application number: CN201620257336.0U
Authority: CN
Inventors: 戈亮; 杨柳涛; 曹云峰; 钟欣
Original assignee: Shanghai Ship and Shipping Research Institute Co Ltd
Current assignee: Shanghai Ship and Shipping Research Institute Co Ltd
Priority date: 2015-08-21
Filing date: 2016-03-30
Publication date: 2016-08-24
Anticipated expiration: 2026-03-30

Abstract

The utility model relates to a naval vessel control field relates to a high -speed CAN bus expansion board for naval vessel redundant network, including FLASH structure FPGA chip, CAN bus controller and CAN bus physics chip, in the same direction as connecing, CAN bus controller and CAN bus physics chip all at least two the tunnel connect in parallel in proper order for FLASH structure FPGA chip, CAN bus controller and CAN bus physics chip. The utility model discloses use FLASH structure FPGA chip to carry out the conversion of bus sequential logic, reduced the buffering link, alleviateed host processing ware program run burden and failure risk indirectly, the reduced reduced of buffering link device quantity, reduced the cost of CAN bus expansion board. Owing to has reduced the time of signal path, has effectively improved conversion efficiency and CAN bus transmission rate.

Description

A kind of high-speed CAN bus expansion board for naval vessel redundant network

Technical field

This utility model relates to Ship monitoring and control field, particularly to a kind of high-speed CAN bus expansion board for naval vessel redundant network.

Background technology

CAN (controller local area network) bus is as the one of industrial field bus, and it, by remarkable characteristic, high reliable letter and unique design, is particularly suitable for the interconnection of industrial process monitoring equipment.Compared with other communication bus, CAN has prominent reliability, real-time and motility.At present, CAN is not only at automotive field, and is widely used in automatic fields, even aerospace field such as elevator, consumer electronics, naval vessel, engineering machinery.

In Ship monitoring and control field, higher to security requirement.In order to meet certain level of security, need to use system redundancy mechanism.CAN is applied to Ship Automation and has become as a kind of trend of control field；It is not that it has certain deficiency to the support of system redundancy for security fields exploitation at the beginning due to CAN.And PC104 bus standard (a kind of industrial computer bus standard) is a kind of industrial-controlled general line defined exclusively for embedded Control, it is a kind of optimization, small-sized, the embedded control system of nesting structural embedded control, is widely used to the occasion such as various Man-of-war Communication Console, cabin cabinet.Therefore, people devise Based PC 104 bus-structured CAN expansion board.

At present, during Based PC 104 bus-structured CAN expansion board has been widely used in the automatically-monitored equipment of various ship.But due to the definition of PC104 bus standard, its bus form is data and address independence；And the parallel bus form of CAN control chip is generally data and address multiplex, so needing the mechanism of a bus translation between two kinds of buses, and the speed translated directly influences CAN communication speed.

Existing CAN expansion board, many employing intermediate processors operate the data in exchange CAN controller or use the mode of twice read-write.The former primary processor is by realizing primary processor CAN data transmit-receive with intermediate processor communication again or the reading by both-end RAM, owing to adding intermediate processor or both-end RAM, while improving expansion card cost, reality application can be caused bad impact, the program runtime of such as intermediate processor and efficiency can increase the time needed for the transmission of CAN data, and the increase of intermediate processor can increase the failure risk of program operation and increase primary processor operation burden and failure risk.And the read-write of each data of the latter needs two read-write cycles to complete, add the time of reading and writing data, reduce CAN message transmission rate.

Utility model content

This utility model need to solve the technical problem that and be to provide a kind of CAN expansion board, and described CAN expansion board data conversion efficiency is high.

In order to solve the problems referred to above, this utility model provides a kind of high-speed CAN bus expansion board for naval vessel redundant network, including FLASH structure FPGA chip, CAN controller and CAN phy chip, FLASH structure FPGA chip, CAN controller and CAN phy chip drop-over successively, CAN controller and CAN phy chip the most at least two-way are in parallel；

The composition of described FLASH structure FPGA chip includes that PC104 bus control module, 20 memory address modular converters, 12 base address comparison modules, CAN address control module, interruptions select processing module and digital output modul module；

PC104 bus control module receives and stores PC104 bus signals, and according to the control signal in PC104 bus signals, compare modular converter and 12 base address comparison modules to 20 memory address the address signal in PC104 bus signals and data signal distribution；And, the data signal that CAN address control module is passed back is exported PC104 bus；

The PC104 bus address signal that PC104 bus control module exports is converted to the address signal that CAN controller is corresponding by 20 memory address modular converters；

Control signal in the address signal of CAN address 20 memory address modular converters conversions of control module reception and PC104 bus signals, generates the interface signal of CAN controller；And receive the data signal that CAN controller is passed back, and by data signal transmission to PC104 bus control module；

12 base address comparison modules receive PC104 bus address signal and the data signal of PC104 bus control module output；According to PC104 bus address signal, it is judged that carry out operation or the operation of digital output modul module interrupting selecting processing module；Then data signal is sent and extremely interrupt selecting processing module or digital output modul module to operate；

Interrupting selecting the interrupt signal of processing module reception CAN controller, it is corresponding with PC104 bus interrupt signal that the data signal come according to 12 base address comparison modules transmissions carries out CAN controller interrupt signal；

Digital output modul module connects the Peripheral Interface of CAN expansion board, and the data signal come according to 12 base address comparison modules transmissions carries out switch to the peripheral apparatus connected and selects.

Further, PC104 EBI connects described FLASH structure FPGA chip, and CAN interface connects described CAN phy chip.

Further, described CAN expansion board also includes the optical coupling isolation circuit for anti-external interference signals.

This utility model uses FLASH structure FPGA chip to carry out bus timing logical transition, decreases intermediate conversion links, indirectly alleviates host-processor program and runs burden and failure risk；The minimizing of intermediate conversion links reduces number of devices, reduces the cost of CAN expansion board.Owing to decreasing the time of signal path, it is effectively increased conversion efficiency and CAN transfer rate.

Accompanying drawing explanation

Fig. 1 is the structured flowchart of this utility model CAN expansion board；

Fig. 2 is the structured flowchart of this utility model FLASH structure FPGA chip.

Detailed description of the invention

Below in conjunction with the accompanying drawings and embodiment, detailed description of the invention of the present utility model is described in further detail.

As shown in Figure 1, this utility model provides a kind of high-speed CAN bus expansion board for naval vessel redundant network, including the PC104 EBI 5 being sequentially connected with, FLASH structure FPGA chip 1, CAN controller 2, optical coupling isolation circuit 4, CAN phy chip 3 and CAN interface 6, PC104 EBI 5, FLASH structure FPGA chip 1, CAN controller 2, optical coupling isolation circuit 4, CAN phy chip 3 and CAN interface 6 are sequentially connected with, and CAN controller 2 and CAN phy chip 3 the most at least two-way are in parallel.

As in figure 2 it is shown, the composition of described FLASH structure FPGA chip 1 includes PC104 bus control module 11,20 memory address modular converters, 12,12 base address comparison modules 13 (describing inconsistent with Fig. 2), CAN address control module 14, interrupts selecting processing module 15 and digital output modul module 16.

PC104 bus control module 11 receives and stores PC104 bus signals, and according to the control signal in PC104 bus signals, compare modular converter 12 and 12 base address comparison modules 13 to 20 memory address the address signal in PC104 bus signals and data signal distribution, and the data signal that CAN address control module 14 is passed back is exported PC104 bus；

The PC104 bus address signal that PC104 bus control module 11 is exported by 20 memory address modular converters 12 is converted to the address signal that CAN controller is corresponding；

CAN address control module 14 receives the control signal in the address signal of 20 memory address modular converters 12 conversion and PC104 bus signals, generates the interface signal of CAN controller；And receive the data signal that CAN controller is passed back, and by data signal transmission to PC104 bus control module 11；

12 base address comparison modules 13 receive PC104 bus address signal and the data signal of PC104 bus control module 11 output；According to PC104 bus address signal, it is judged that carry out operation or the operation of digital output modul module 16 interrupting selecting processing module 15；Then data signal is sent and extremely interrupt selecting processing module 15 or digital output modul module 16 to operate；

Interrupting selecting the interrupt signal of processing module 15 reception CAN controller, it is corresponding with PC104 bus interrupt signal that the data signal come according to 12 base address comparison modules 13 transmissions carries out CAN controller interrupt signal；

Digital output modul module 16 connects the Peripheral Interface of CAN expansion board, sends the data signal come according to 12 base address comparison modules 13 and the peripheral apparatus connected carries out switch selection.

This utility model FLASH structure FPGA chip uses the FPGA:A3P0301VQG100I of the ProASIC3 series of Actel company.

Described optical coupling isolation circuit 4 is for anti-external interference signals.

This utility model solves the problem that intermediate link is many, data transfer speeds is slow, reliability is relatively low of existing existence, and decreases the failure risk that intermediate processor program is run.

Embodiment of above is merely to illustrate this utility model; and be not limitation of the utility model; those of ordinary skill about technical field; in the case of without departing from spirit and scope of the present utility model; can also make a variety of changes and modification; the technical scheme of the most all equivalents falls within category of the present utility model, and scope of patent protection of the present utility model should be defined by the claims.

Claims

1. the high-speed CAN bus expansion board for naval vessel redundant network, it is characterised in that bag Include FLASH structure FPGA chip (1), CAN controller (2) and CAN physics Chip (3), FLASH structure FPGA chip (1), CAN controller (2) and CAN Bus physical chip (3) drop-over successively, CAN controller (2) and CAN physics core Sheet (3) the most at least two-way is in parallel；

The composition of described FLASH structure FPGA chip (1) includes PC104 bus control module (11), 20 memory address modular converters (12), 12 base address comparison modules (13), CAN Address control module (14), interruption select processing module (15) and digital output modul module (16)；

PC104 bus control module (11) receives and stores PC104 bus signals, and according to PC104 Control signal in bus signals, by the address signal in PC104 bus signals and data signal distribution Modular converter (12) and 12 base address comparison modules (13) is compared to 20 memory address；With And, the data signal that CAN address control module (14) is passed back is exported PC104 bus；

PC104 bus control module (11) is exported by 20 memory address modular converters (12) PC104 bus address signal is converted to the address signal that CAN controller is corresponding；

CAN address control module (14) receives what 20 memory address modular converters (12) were changed Control signal in address signal and PC104 bus signals, generates the interface of CAN controller Signal；And receive the data signal that CAN controller is passed back, and data signal transmission is arrived PC104 bus control module (11)；

12 base address comparison modules (13) receive what PC104 bus control module (11) exported PC104 bus address signal and data signal；According to PC104 bus address signal, it is judged that in carrying out The disconnected operation selecting processing module (15) or the operation of digital output modul module (16)；Then will Data signal sends extremely interrupts selecting processing module (15) or digital output modul module (16) to grasp Make；

Interrupt selecting the interrupt signal of processing module (15) reception CAN controller, according to 12 base address comparison modules (13) send the data signal come and carry out CAN controller interruption letter Number corresponding with PC104 bus interrupt signal；

Digital output modul module (16) connects the Peripheral Interface of CAN expansion board, according to 12 bases Address comparison module (13) sends the data signal come and the peripheral apparatus connected carries out switch selection.

2. CAN expansion board as claimed in claim 1, it is characterised in that PC104 bus Interface (5) connects described FLASH structure FPGA chip (1), CAN interface (6) Connect described CAN phy chip (3).

3. CAN expansion board as claimed in claim 1 or 2, it is characterised in that described CAN Bus extension plate also includes the optical coupling isolation circuit (4) for anti-external interference signals.