CN205490119U - Output short circuit protection circuit - Google Patents
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- CN205490119U CN205490119U CN201620102420.5U CN201620102420U CN205490119U CN 205490119 U CN205490119 U CN 205490119U CN 201620102420 U CN201620102420 U CN 201620102420U CN 205490119 U CN205490119 U CN 205490119U
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Abstract
Output short circuit protection circuit, including excessive pressure comparing element, in advance processing unit, last comparing element and drive output unit, processing unit in advance, comparing element is connected with the excessive pressure for pass through RC filtering and forward position blanking with the CS terminal voltage of controller and handle the back, interfering signal in the filtering CS terminal voltage, and the filtering switch tube switches on temporal current spike, excessive pressure comparing element is connected with lasting comparing element for detect the CS terminal voltage of controller, when the CS terminal voltage exceedes CS overvoltage threshold vref_OSP, generate low level signal output, last comparing element, output unit is connected with the drive for receiving excessive pressure comparator output's low level signal, comparing in succession in long when setting for low level signal, long term when reaching the settlement when low level signal lasting will hang down level signal and export for driving output unit, drive output unit for receive the low level signal who lasts comparing element output, and turn into drive control signal output with it.
Description
Technical field
This utility model relates to Switching Power Supply, particularly to the output short circuit protection circuit of a kind of Switching Power Supply.
Background technology
Present Switching Power Supply control chip is integrated with some defencive functions mostly, as some common Switching Power Supply defencive functions such as output over-voltage protection, overpower protection, open loop protection, output short circuit protections.Fig. 1 is the inverse-excitation type switch power-supply that conventional secondary side feedback controls; if when there is output short-circuit situation in secondary; output electric current can be caused to be greatly increased; make Switching Power Supply oneself power consumption excessive and burn; so for the problem solving output short-circuit, output short circuit protection function to be done inside usual controller.Existing a controller; a PWM controller FAN6755W/FAN6755UW such as fairchild company; FB pin (" pin " is also referred to as " end ") is utilized to do output short circuit protection function; when there is output short-circuit situation in changer secondary; the value of controller detection FB port voltage VFB, as long as VFB is more than 4.6V, internal counter begins to timing 62.5ms; after timing, controller stops GATE output, switch-off power pipe；Also just like a PWM controller OB2269C of Ang Bao company, doing output short circuit protection function also with FB pin, as long as VFB is more than 4.4V, internal counter begins to timing 80ms, and after timing terminates, controller stops GATE output, switch-off power pipe；Although this two quasi-controller has done output short circuit protection function, but when doing large power supply, there is power tube and the flimsy risk of secondary side diode, because when doing large power supply, in so long timing time, controller has GATE to export always, cause former limit peak point current the biggest, the stress of switching tube increases, and transformator is operated in degree of depth continuous mode, former limit inductance storage energy increases, magnetic saturation easily occurs, secondary is converted by the former secondary turn ratio, cause the peak point current on secondary commutation diode the biggest, exceed its stress value to be just easy to be burned.
The power tube existed for the output short circuit protection function solving to utilize FB pin to do large power supply and the problem of the flimsy risk of secondary commutation diode; prior art utilizes CS pin to do output short circuit protection function; a controller UCC28740 such as TI company; when utilizing output short-circuit; CS pin voltage compares with internal reference voltage 1.5V; produce cut-off signals, switch-off power pipe；The L6563 of ST company, utilizes CS pin voltage to compare with internal reference voltage 1.7V, produces cut-off signals, switch-off power pipe；The ICE3A2065ELJ of Infineon company; CS pin voltage is utilized to compare with internal reference voltage 1.66V; produce cut-off signals; switch-off power pipe; these controllers utilize CS pin do output short circuit protection function based on principle be: when output short-circuit; changer is operated in continuous mode; former limit peak point current is the biggest; exceed peak inrush current restriction; when CS pin voltage exceedes when crossing stream threshold value Vref_OCP of controller inner setting; controller stops GATE output the most at once, but after minimum ON time, just switch-off power pipe.Utilize in minimum ON time; CS pin voltage may proceed to rise; value VCS of CS pin voltage is compared from the CS pin overvoltage threshold Vref_OSP of controller inner setting that (threshold value that different controller sets is different; general at about 1.6V); produce power tube cut-off signals; switch-off power pipe, completes protection.But this way poor anti jamming capability, such as when having carried out interference signal (signal that the noise source such as speaker, transmitter receiver sends) near CS pin, CS pin voltage is made to have also exceeded the CS pin overvoltage threshold Vref_OSP of controller inner setting, so controller can produce cut-off signals by mistake, switch-off power pipe, poor reliability.
With regard to the output short circuit protection circuit of existing PWM controller, its deficiency is summarized as follows:
1, utilizing FB pin to make the controller of output short circuit protection function, it is when designing high-power power supply, there is former limit power tube and meets with stresses big and secondary commutation diode stress big, the risk of easy burn-out；
2, utilizing CS pin to make the controller of output short circuit protection function, CS pin is easily sent signal by external interference noise source to be affected, and causes controller erroneous judgement, its poor anti jamming capability, poor reliability.
Utility model content
In view of this; first to be solved in the utility model technical problem is that: provide a kind of output short-circuit protection method; even if in the case of CS pin has interference signal; the lasting comparison of the internal enumerator setting duration after comparator; continuous several cycle detection is both greater than the CS overvoltage threshold of controller inner setting to CS leg signal; controller just makes a decision; and then switch-off power pipe; so filtering interference signals within the time that power tube can bear maximum current; make controller will not restart because mistake shutoff causes; capacity of resisting disturbance is strong, and reliability is high.
Corresponding to this, second to be solved in the utility model technical problem is that: provide a kind of output short circuit protection circuit utilizing said method.
This utility model solves the technical scheme of above-mentioned first technical problem:
A kind of output short-circuit protection method: the current detecting CS port voltage of controller is filtered (about 10ns) by the RC of short time; filter the least the shortest spike interference signal on CS port voltage; RC filtering simultaneously also utilizes low-voltage driving feedback signal Feedback_L within controller and the low voltage drive signal Drive_H within controller CS pin voltage to be dragged down in being all the time of high level; effective filter out switching tube conducting moment by himself electric capacity and body diode at current spike produced by reverse recovery time, improve signal to noise ratio.When the CS overvoltage threshold Vref_OSP exceeding controller inner setting through pretreated CS port voltage being detected by stream comparator excessively, generate the CS_Fault_L signal of Low level effective；Each cycle all detects CS_Fault_L signal; if the timing by continuous several cycles; all detect that CS_Fault_L signal is low level; so this low level signal is transferred in logic module; the low voltage drive signal Drive_H making driving pipe is low level, then is transferred to low level Drive_H signal drive in module, and the gate drive signal GATE of output pipe is low level; switch-off power pipe, completes defencive function.
nullSpecific embodiment as said method，Described output short-circuit protection method comprises the steps: to produce the CS port overvoltage signal CS_Fault_L of Low level effective: filtered by RC by the CS port voltage of controller，And utilize low-voltage driving feedback signal Feedback_L within controller and the low voltage drive signal Drive_H within controller CS pin voltage to be dragged down in being all the time of high level，To be compared by overvoltage comparator CMP_OSP through CS overvoltage threshold Vref_OSP (being usually set to about 1.6V) of above-mentioned pretreated CS port voltage with controller inner setting，When CS port voltage being detected more than Vref_OSP，Comparator CMP_OSP overturns，Produce low level CS port overvoltage signal CS_Fault_L；
nullPersistently compare the CS port sustained overvoltage protection signal CS_OSP_L generating Low level effective: the low level CS port overvoltage signal CS_Fault_L produced by overvoltage comparator CMP_OSP is generated high level through not gate，It is transferred to the data terminal of d type flip flop again，Each cycle utilizes the trailing edge of Drive_H to receive this data，By generating high level after the process of d type flip flop，With controller internal low-voltage initializing signal ENP_lv after the process of NAND gate and not gate，It is transferred to enumerator COUNT，Reset signal as enumerator COUNT，Utilize the rising edge triggering signal as enumerator COUNT of Drive_H，Counting through several cycles，If CS port overvoltage signal CS_Fault_L is still low level，Then enumerator COUNT generates high level signal，The high level signal generated by enumerator COUNT generates low level CS port sustained overvoltage protection signal CS_OSP_L behind the door through non-；
Logic and driving output generate the power tube gate drive signal GATE of Low level effective: low level CS port sustained overvoltage is protected signal CS_OSP_L and initializing signal ENP_lv; it is respectively transmitted to reset R end and the set S end of rest-set flip-flop; generate low level rub-out signal Fault_L; by this signal and overcurrent protection signal CS_OCP_L after the process of NAND gate and not gate; generate low level low voltage drive signal Drive_H; again by this signal by driving Driver; output tube grid drives signal GATE to be low level, switch-off power pipe.
This utility model solves the technical scheme of above-mentioned second technical problem: a kind of output short circuit protection circuit, including；The CS end of controller, the GATE end of controller, overvoltage comparing unit, lasting comparing unit and driving output unit
Described overvoltage comparing unit, for detecting the current detecting CS terminal voltage of controller, and the CS end overvoltage threshold Vref_OSP of pretreated CS terminal voltage with controller inner setting is compared, when CS terminal voltage is more than CS overvoltage threshold Vref_OSP, generate low level signal output；
Described lasting comparing unit, for receiving the low level signal of overvoltage comparator output, compares in setting duration continuously to low level signal, when the duration of low level signal reaches to set duration, is exported by low level signal to driving output unit；
Described driving output unit, for receiving the low level signal of lasting comparing unit output, and is translated into drive control signal output, in order to control the shutoff of power tube.
Preferably, described overvoltage comparing unit includes CS overvoltage comparator CMP_OSP, resistance R, electric capacity C, N-channel MOS pipe MN, not gate INV and NAND gate NAND.nullThe normal phase input end of described CS overvoltage comparator CMP_OSP is connected with internal benchmark Vref_OSP，The CS end of described controller is connected with one end of resistance R，The other end of resistance R and the positive plate of electric capacity C、The drain electrode of N-channel MOS pipe MN and the negative-phase input of described CS overvoltage comparator CMP_OSP are connected，The negative plate ground connection VSS of described electric capacity C，The substrate of described N-channel MOS pipe MN is connected with source electrode，And ground connection VSS，The grid of described N-channel MOS pipe MN is connected with the outfan of described not gate INV，The input of described not gate INV is connected with the outfan of described NAND gate NAND，The first input end of described NAND gate NAND is connected with low-voltage driving feedback signal Feedback_L within controller，Second input of described NAND gate NAND is connected with the low voltage drive signal Drive_H within controller.The output port of described CS overvoltage comparator CMP_OSP is CS port overvoltage signal CS_Fault_L.
Preferably, described lasting comparing unit is timing unit, including the first not gate, d type flip flop, the first NAND gate, the second not gate, the 3rd not gate, enumerator and the 4th not gate.nullThe input of the first described not gate is connected with the outfan CS port overvoltage signal CS_Fault_L signal of described overvoltage comparing unit，The outfan of the first described not gate is connected with the data input pin D of described d type flip flop，The input that triggers of described d type flip flop is connected with the Drive_H signal within controller，The clear terminal of described d type flip flop is connected with controller internal low-voltage initializing signal ENP_lv，The outfan Q of described d type flip flop is connected with the first input end of the first described NAND gate，Second input of the first described NAND gate is connected with low pressure initializing signal ENP_lv，The outfan of the first described NAND gate is connected with the input of the second described not gate，The outfan of the second described not gate is connected with the clearing port CLR of described enumerator，The outfan triggering input and the 3rd not gate of described enumerator is connected，The described input of the 3rd not gate is connected with the low voltage drive signal Drive_H within controller，The outfan of described enumerator is connected with the input of the 4th described not gate，The outfan of the 4th described not gate is as the output port of lasting comparing unit.
nullPreferably，Described driving output unit includes rest-set flip-flop、Second NAND gate、5th not gate and driving Driver unit，The triggering port S of described rest-set flip-flop is connected with low pressure initializing signal ENP_lv，The triggering port R of described rest-set flip-flop is connected with the output port of described lasting comparing unit，The output port Q of described rest-set flip-flop is connected with the second input of the second described NAND gate，The first input end of the second described NAND gate is connected with each cycle overcurrent protection signal CS_OCP_L signal within controller，The outfan of the second described NAND gate is connected with the input of the 5th described not gate，The outfan of the 5th described not gate is connected with the input driving Driver unit，The outfan of described driving Driver unit is connected with the power tube gate drive signal GATE end of described controller.
Compared with prior art, this utility model has the advantages that
This utility model make use of lasting comparing unit dexterously, receive the low level signal of overvoltage comparator output, low level signal is compared in setting duration continuously, when the duration of low level signal reaches to set duration, low level signal is exported to driving output unit, and then switch-off power pipe.This utility model both can filter noise jamming, it is to avoid it makes controller turn off by mistake, and capacity of resisting disturbance is strong, reliability is high, can ensure that again in timing time, the current stress that power tube and secondary side diode are born is insufficient to be allowed to damage, and can apply in high power switching power supply.
Accompanying drawing explanation
Fig. 1 is the inverse-excitation type switch power-supply that existing conventional secondary side feedback controls；
Fig. 2 is the circuit diagram of this utility model first embodiment；
Fig. 3 is the circuit diagram of this utility model the second embodiment.
Detailed description of the invention
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, this utility model is further described.Should be appreciated that specific embodiment described herein, only in order to explain this utility model, is not used to limit this utility model.
Embodiment one
As in figure 2 it is shown, be the circuit theory diagrams of this utility model embodiment one, a kind of output short circuit protection circuit, including: overvoltage comparing unit 101, lasting comparing unit 102, driving output unit 103.Wherein, continuing comparing unit 102 is timing unit.
Overvoltage comparing unit 101 includes: CS overvoltage comparator CMP_OSP101, resistance R101, electric capacity C101, N-channel MOS pipe MN101, not gate INV101 and NAND gate NAND101.nullThe normal phase input end of CS overvoltage comparator CMP_OSP101 benchmark Vref_OSP internal with controller is connected，The current detecting pin i.e. CS end of controller is connected with one end of resistance R101，The other end of resistance R101 and the positive plate of electric capacity C101、The drain electrode of N-channel MOS pipe MN101 and the negative-phase input of CS overvoltage comparator CMP_OSP101 are connected，The negative plate ground connection VSS of electric capacity C101，The substrate of N-channel MOS pipe MN101 is connected with source electrode，And ground connection VSS，The outfan of grid NAND gate INV101 of N-channel MOS pipe MN101 is connected，The outfan of input NAND gate NAND101 of not gate INV101 is connected，The first input end of NAND gate NAND101 is connected with low-voltage driving feedback signal Feedback_L within controller，Second input of NAND gate NAND101 is connected with the low voltage drive signal Drive_H within controller.The outfan of CS overvoltage comparator CMP_OSP101 is as the output CS port overvoltage signal CS_Fault_L of overvoltage comparing unit 101.
Continue comparing unit 102 to include: not gate INV102, d type flip flop DFF101, not gate INV103, NAND gate NAND102, not gate INV104, enumerator COUNT101 and not gate INV105.nullThe input of not gate INV102 and the outfan CS port overvoltage signal CS_Fault_L of overvoltage comparing unit 101，The outfan of not gate INV102 is connected with the data input pin D of d type flip flop DFF101，The input that triggers of d type flip flop DFF101 is connected with the low voltage drive signal Drive_H within controller，The clear terminal of d type flip flop DFF101 is connected with controller internal low-voltage initializing signal ENP_lv，The outfan Q of d type flip flop DFF101 is connected with the first input end of NAND gate NAND102，Second input of NAND gate NAND102 is connected with low pressure initializing signal ENP_lv，The input of outfan NAND gate INV103 of NAND gate NAND102 is connected，The outfan of not gate INV103 is connected with the clearing port CLR of enumerator COUNT101，The outfan triggering input NAND gate INV104 of enumerator COUNT101 is connected，The input of not gate INV104 is connected with the low voltage drive signal Drive_H within controller，The input of outfan NAND gate INV105 of enumerator COUNT101 is connected，The outfan of not gate INV105 protects signal CS_OSP_L as the output CS port sustained overvoltage of lasting comparing unit 102.
Output unit 103 is driven to include: rest-set flip-flop RS101, NAND gate NAND103, not gate INV106 and driver element Driver101.nullThe set input S of rest-set flip-flop RS101 is connected with low pressure initializing signal ENP_lv，The RESET input R of rest-set flip-flop RS101 protects signal CS_OSP_L to be connected with the output CS port sustained overvoltage of lasting comparing unit 102，The outfan Q of rest-set flip-flop RS101 is connected with the first input end of NAND gate NAND103，Second input of NAND gate NAND103 is connected with internal overcurrent protection signal CS_OCP_L，The input of outfan NAND gate INV106 of NAND gate NAND103 is connected，The outfan of not gate INV106 is connected with the input of driver element Driver101，The outfan of driver element Driver101 drives signal GATE as the output tube grid driving output unit 103.
nullThe basic functional principle of the present embodiment: as shown in Figure 2，Once output is short-circuited，The CS terminal voltage of controller can quickly rise，After when the CS terminal voltage of controller, through RC filtering and filtering of being all by low-voltage driving feedback signal Feedback_L controller within and low voltage drive signal Drive_H signal controller within that time of high level constitutes, switching tube turns on the moment current spike circuit pretreatment by electric capacity and rectifier tube generation reverse recovery time，If exceed the internal reference voltage Vref_OSP of controller，After overvoltage comparing unit 101，Output CS port overvoltage signal CS_Fault_L is low level，Low level CS_Fault_L signal is generated the high level data input pin as d type flip flop DFF101 through not gate，At each Drive_H trailing edge，High level is generated by the process of d type flip flop DFF101，This high level signal and controller internal low-voltage initializing signal ENP_lv generate high level after the process of NAND gate NAND102 and not gate INV103，It is transferred to the clear terminal CLR of enumerator COUNT101，Enumerator COUNT101 starts timing，After the timing (current stress that the length of timing time wants guaranteed output pipe and secondary commutation diode to be born is less than its maximum) in several cycles，If after the timing of enumerator COUNT101，It is output as high level，Then by this high level signal after not gate INV105，The CS port sustained overvoltage protection signal CS_OSP_L of output low level，Again signal CS_OSP_L is generated low level rub-out signal Fault_L through rest-set flip-flop RS101，Due in minimum ON time，Overcurrent protection signal CS_Fault_L signal is high level，Non-effective low level，Then by the CS_Fault_L signal of Fault_L signal and now high level after the process of NAND gate NAND103 and not gate INV106，Generate low level low voltage drive signal Drive_H，Deliver to this signal again drive Driver101，Process through overdriving，Ultimately generate low level power tube gate drive signal GATE，Power tube is turned off.
Embodiment two
As shown in Figure 3, compared with embodiment one, difference is that lasting comparing unit 202 is for counting unit, concrete, continuing the enumerator COUNT201 in comparing unit 202 is to be made up of the d type flip flop of three cascades, overvoltage comparing unit 201, driving output unit 203 are identical with embodiment one, only make 201 and 203 in unit numeral numbering and are distinguish between, repeat no more here.
Enumerator COUNT201 includes: d type flip flop DFF202, d type flip flop DFF203 and d type flip flop DFF204, d type flip flop DFF202, d type flip flop DFF203, the clear terminal CLR of d type flip flop DFF204 are connected together, the data receiver D of d type flip flop DFF202 and its outfanBeing connected, d type flip flop DFF202 triggers the input input as enumerator, and the outfan for NAND gate INV204 is connected, to access low voltage drive signal Drive_H；The triggering input of the outfan Q and d type flip flop DFF203 of d type flip flop DFF202 is connected, the data receiver D of d type flip flop DFF203 and its outfanBeing connected, the triggering input of the outfan Q and d type flip flop DFF204 of d type flip flop DFF203 is connected, the data receiver D of d type flip flop DFF204 and its outfanBeing connected, the outfan Q of d type flip flop DFF204 is as the output of enumerator COUNT201.
The present embodiment is compared with first embodiment; operation principle is basically identical; difference is: enumerator COUNT201 have employed the form of three grades of d type flip flop cascades; it it is a kind of specific implementation of enumerator COUNT101; all detect that CS port overvoltage signal CS_Fault_L is low level when enumerator COUNT201 continuous eight cycles; then delivering to drive output unit 203 to generate power tube gate drive signal GATE by the low level CS port sustained overvoltage generated protection signal CS_OSP_L signal is low level, switch-off power pipe.
Embodiment of the present utility model is not limited to this; according to foregoing of the present utility model; utilize ordinary technical knowledge and the customary means of this area; without departing under this utility model above-mentioned basic fundamental thought premise; this utility model can also be made the amendment of other various ways, replace or change, within the scope of all falling within this utility model rights protection.
Claims (7)
1. an output short circuit protection circuit, including overvoltage comparing unit, it is characterised in that: also include pretreatment unit, hold
Continuous comparing unit and driving output unit,
Described pretreatment unit, is connected with overvoltage comparing unit, for the CS terminal voltage of controller being filtered and front by RC
After elimination of hidden, filter the interference signal in CS terminal voltage, and filter the current spike of switching tube conducting moment；
Overvoltage comparing unit, is connected with lasting comparing unit, for detecting the current detecting CS terminal voltage of controller, and will
CS terminal voltage compares with the CS end overvoltage threshold Vref_OSP of controller inner setting, when CS terminal voltage is more than CS
During overvoltage threshold Vref_OSP, generate low level signal output；
Continue comparing unit, be connected with driving output unit, for receiving the low level signal of overvoltage comparator output, to low
Level signal compares in setting duration continuously, when the duration of low level signal reaches to set duration, by low electricity
Ordinary mail number output is given and is driven output unit；
Drive output unit, for receiving the low level signal of lasting comparing unit output, and be translated into driving control letter
Number output, in order to control the shutoff of power tube.
Output short circuit protection circuit the most according to claim 1, it is characterised in that: described lasting comparing unit, for
Timing unit, is set the continuous counter of duration, works as low level signal by the low level signal exporting overvoltage comparator
Keeping count duration reach set duration time, low level signal is exported to drive output unit.
Output short circuit protection circuit the most according to claim 2, it is characterised in that: described timing unit, including
One not gate, the second not gate, d type flip flop, NAND gate, the 3rd not gate, enumerator and the 4th not gate, the input of the first not gate
Being connected with the outfan of overvoltage comparing unit, the outfan of the first not gate is connected with the data input pin D of d type flip flop；D touches
Send out device trigger input be connected with low voltage drive signal Drive_H controller within, the clear terminal CLR of d type flip flop and
Controller internal low-voltage initializing signal ENP_lv is connected, and the outfan Q of d type flip flop inputs with the first of described NAND gate
End is connected, and the second input of NAND gate is connected with low pressure initializing signal ENP_lv, the outfan of NAND gate and the second not gate
Input be connected, the outfan of the second not gate is connected with the clearing port CLR of enumerator, the triggering input of enumerator and
The outfan of the 3rd not gate is connected, and the input of the 3rd not gate is connected with the low voltage drive signal Drive_H within controller,
The outfan of enumerator and the input of the 4th not gate are connected, and the outfan of the 4th not gate is as the outfan of timing unit.
Output short circuit protection circuit the most according to claim 3, it is characterised in that: the counting in described timing unit
Device, is to be made up of, i.e. by d type flip flop DFF202, d type flip flop DFF203 and d type flip flop DFF204 the d type flip flop of three cascades
Constituting, d type flip flop DFF202, d type flip flop DFF203, the clear terminal CLR of d type flip flop DFF204 are connected together, and D touches
Send out data receiver D and its outfan of device DFF202Being connected, the triggering input of d type flip flop DFF202 is as enumerator
Input, for NAND gate INV204 outfan be connected, to access low voltage drive signal Drive_H；D type flip flop DFF201
The triggering input of outfan Q and d type flip flop DFF203 be connected, the data receiver D of d type flip flop DFF203 is defeated with it
Go out endBeing connected, the triggering input of the outfan Q and d type flip flop DFF204 of d type flip flop DFF203 is connected, d type flip flop
The data receiver D of DFF204 and its outfanBeing connected, the outfan Q of d type flip flop DFF204 is as the output of enumerator.
Output short circuit protection circuit the most according to claim 1, it is characterised in that: described pretreatment unit, will control
The current detecting CS port voltage of device processed is filtered by the RC of short time, the shortest the least for filtering on CS port voltage
Spike interference signal, RC filtering simultaneously also utilizes low-voltage driving feedback signal Feedback_L within controller and controller
Internal low voltage drive signal Drive_H is all the time of high level, CS terminal voltage is dragged down, in order to filter switching tube conducting
Moment by its electric capacity and body diode at current spike produced by reverse recovery time.
Output short circuit protection circuit the most according to claim 5, it is characterised in that: the pre-place of described overvoltage comparing unit
Reason unit, including resistance R, electric capacity C, N-channel MOS pipe MN, logic inverter INV and NAND gate NAND, one end of resistance R with
The CS end of controller is connected, and the other end of resistance R compares with positive plate, the drain electrode of N-channel MOS pipe MN and the overvoltage of electric capacity C
The negative-phase input of device is connected；The negative plate ground connection of electric capacity C；The substrate of N-channel MOS pipe MN is connected with source electrode, and ground connection；N
The grid of channel MOS tube MN is connected with the outfan of logic inverter INV, and the input of logic inverter INV is defeated with NAND gate NAND
Going out end to be connected, the first input end of NAND gate NAND is connected with low-voltage driving feedback signal Feedback_L within controller,
Second input of NAND gate NAND is connected with the low voltage drive signal Drive_H within controller.
Output short circuit protection circuit the most according to claim 1, it is characterised in that: described driving output unit includes
Rest-set flip-flop, the second NAND gate, the 5th not gate and driver element, the triggering end S of rest-set flip-flop and low pressure initializing signal
ENP_lv be connected, the triggerings end R of rest-set flip-flop is connected with the outfan of lasting comparing unit, the outfan Q of rest-set flip-flop and
Second input of the second NAND gate is connected, the first input end of the second NAND gate and each cycle overcurrent protection within controller
Signal CS_OCP_L signal is connected, and the outfan of the second NAND gate and the input of the 5th not gate are connected, the output of the 5th not gate
End is connected with the input of driver element, and the outfan of described driver element is drawn as the output driving output unit, uses
It is connected in the gate drive voltage GATE end with controller.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105634260A (en) * | 2016-01-30 | 2016-06-01 | 深圳南云微电子有限公司 | Output short-circuit protection method and circuit |
| CN105634260B (en) * | 2016-01-30 | 2019-02-05 | 深圳南云微电子有限公司 | Output short circuit protection circuit |
| CN106786401A (en) * | 2016-12-22 | 2017-05-31 | 上海灿瑞科技股份有限公司 | The anti-interference detection circuit of LED drive chip feedback pin |
| CN106786401B (en) * | 2016-12-22 | 2019-01-29 | 上海灿瑞科技股份有限公司 | The anti-interference detection circuit of LED drive chip feedback pin |
| CN107665683A (en) * | 2017-10-12 | 2018-02-06 | 深圳市华星光电技术有限公司 | Clock signal output circuit and clock signal output method |
| CN107665683B (en) * | 2017-10-12 | 2019-12-24 | 深圳市华星光电技术有限公司 | Clock signal output circuit and clock signal output method |
| TWI692915B (en) * | 2017-12-22 | 2020-05-01 | 大陸商合肥杰發科技有限公司 | Short circuit protection apparatus and method |
| CN110308362A (en) * | 2019-04-16 | 2019-10-08 | 惠科股份有限公司 | Detection circuit and display panel |
| CN115528889A (en) * | 2022-11-23 | 2022-12-27 | 成都智融微电子有限公司 | Output short circuit detection control system and method |
| CN115528889B (en) * | 2022-11-23 | 2023-03-10 | 成都智融微电子有限公司 | Output short circuit detection control system and method |
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