CN205304767U - Analog to digital conversion circuit with two reference sources - Google Patents
Analog to digital conversion circuit with two reference sources Download PDFInfo
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- CN205304767U CN205304767U CN201620070759.1U CN201620070759U CN205304767U CN 205304767 U CN205304767 U CN 205304767U CN 201620070759 U CN201620070759 U CN 201620070759U CN 205304767 U CN205304767 U CN 205304767U
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 38
- 238000000034 method Methods 0.000 claims abstract description 40
- 230000010365 information processing Effects 0.000 claims abstract description 7
- 238000004891 communication Methods 0.000 claims description 22
- 230000007704 transition Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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Abstract
The utility model relates to an analog -to -digital conversion technique, concretely relates to analog to digital conversion circuit with two reference sources, the circuit includes: first benchmark power module, second benchmark power module, the information processing unit, a ADC module, the 2nd ADC module, first benchmark power module respectively with a ADC module the 2nd ADC module is connected, second benchmark power module with the 2nd ADC module is connected, analog signal inputs respectively a ADC module with the 2nd ADC module, the information processing unit respectively with a ADC module the 2nd ADC module is connected to detect the accuracy that analog signal transition is data signal.
Description
Technical field
The utility model relates to a kind of modulus conversion technique, is specifically related to a kind of mould with two a reference sourcesNumber conversion circuit.
Background technology
In existing electronic technology, the conversion of analog signal and data signal is generally adopted to ADC conversion coreSheet is realized, and in this scheme, ADC conversion chip also will have a reference voltage source, exampleIn the reference voltage source situation that is 5V, adopt the conversion resolution ADC conversion core of 14Sheet, the minimum voltage unit that ADC conversion chip can be identified is so 5V/214≈ 0.30mV. ExistingTechnical scheme in, if there is the drift of reference power supply, will cause gathering analog signal notSituation accurately, same, if abnormal conditions appear in ADC conversion chip, also can cause simulationThe inaccurate situation of signals collecting.
In existing electric automobile field, no matter in battery management system or entire car controller, allCan use the conversion of analog signal and data signal, as in entire car controller to accelerator pedal aperture signalCollection, battery management system in collection to temperature signal, and in existing technical scheme, mouldThe conversion of analog signal and data signal is all generally to realize by analog to digital conversion circuit, if but modulusChange-over circuit is inaccurate to collection of simulant signal, will cause entire car controller (or battery management system)There is deviation in the collection on the analog signal that affects vehicle performance, thereby causes the misoperation of car load, orCause security incident.
Utility model content
The utility model provides a kind of analog to digital conversion circuit with two a reference sources, turns to improve modulusThe reliability of changing; Especially can improve the reliability of whole electric vehicle collection of simulant signal.
For achieving the above object, the utility model provides following technical scheme:
Have an analog to digital conversion circuit for two a reference sources, described circuit comprises: the first reference power supply mouldPiece, the second reference power supply module, information process unit, an ADC module, the 2nd ADC module;Described the first reference power supply module connects with a described ADC module, described the 2nd ADC module respectivelyConnect; Described the second reference power supply module is connected with described the 2nd ADC module; Analog signal is inputted respectivelyTo a described ADC module and described the 2nd ADC module; Described information process unit respectively with instituteState an ADC module, described the 2nd ADC module connection, be converted to numeral to detect analog signalThe accuracy of signal.
Preferably, described the first reference power supply module comprises:
Power supply, the first build-out resistor and the first a reference source chip; Described power supply mates with described firstThe first end of resistance connects, the second end of described the first build-out resistor respectively with described the first benchmark source coreSheet, a described ADC module and described the 2nd ADC module connect, and are used to a described ADCModule provides the first reference power source, for described the 2nd ADC module provides comparison reference source.
Preferably, described the second reference power supply module comprises:
The second build-out resistor and the second a reference source chip; Described power supply and described the second build-out resistorFirst end connect, the second end of described the second build-out resistor respectively with described the second a reference source chip, instituteState the 2nd ADC module and connect, be used to described the 2nd ADC module that the second reference power source is provided.
Preferably, described the first build-out resistor is identical with the resistance of described the second build-out resistor; DescribedOne a reference source chip and described the second a reference source chip are same a reference source chip.
Preferably, a described ADC module has SPI communication interface, for described information processingUnit carries out SPI communication.
Preferably, described the 2nd ADC module has SPI communication interface, for described information processingUnit carries out SPI communication.
Preferably, described information process unit respectively with a described ADC module, described the 2nd ADCModule by spi bus be configured to much single more main from mode communicate by letter, wherein, described information process unitFor main frame, a described ADC module and described the 2nd ADC module are slave.
The beneficial effects of the utility model are:
The analog to digital conversion circuit with two a reference sources that the utility model provides, described the first reference power supplyModule is connected with a described ADC module, described the 2nd ADC module respectively; Described the second benchmarkPower module is connected with described the 2nd ADC module; The first reference power supply module is an ADC moduleA reference source is provided; The second reference power supply module provides a reference source for the 2nd ADC module; Analog signal is dividedBe not input to a described ADC module and described the 2nd ADC module; Information process unit respectively withA described ADC module, described the 2nd ADC module connect, and are converted to number to detect analog signalThe accuracy of word signal.
Brief description of the drawings
Fig. 1 is that a kind of structure of the utility model embodiment analog to digital conversion circuit with two a reference sources is shownIntention.
Fig. 2 is the another kind of structure of the utility model embodiment analog to digital conversion circuit with two a reference sourcesSchematic diagram.
Detailed description of the invention
For those skilled in the art can further be understood in feature of the present utility model and technologyHold, below in conjunction with drawings and embodiments, the utility model embodiment is elaborated.
In prior art, the reference power supply inaccurate situation of collection of simulant signal causing of drifting about,The utility model provides a kind of analog to digital conversion circuit with two a reference sources, to improve entire car controllerOr the reliability of equipment to collection of simulant signal such as battery management system, to avoid because a reference source is with reference to electricityThe deviation in source and the whole vehicle functions security incident that causes.
If Fig. 1 is a kind of structure of the utility model embodiment analog to digital conversion circuit with two a reference sourcesSchematic diagram, this circuit comprises: the first reference power supply module, the second reference power supply module, information processingUnit, an ADC module, the 2nd ADC module; Described the first reference power supply module respectively with instituteState an ADC module, described the 2nd ADC module connection; Described the second reference power supply module and instituteStating the 2nd ADC module connects; Analog signal is input to respectively a described ADC module and describedTwo ADC modules; Described information process unit respectively with a described ADC module, described the 2nd ADCModule connects, and is converted to the accuracy of data signal to detect analog signal.
Particularly, the first reference power supply module comprises:
Power supply, the first build-out resistor and the first a reference source chip; Described power supply mates with described firstThe first end of resistance connects, the second end of described the first build-out resistor respectively with described the first benchmark source coreSheet, a described ADC module and described the 2nd ADC module connect, and are used to a described ADCModule provides the first reference power source, for described the 2nd ADC module provides comparison reference source.
Particularly, the second reference power supply module comprises:
The second build-out resistor and the second a reference source chip; Described power supply and described the second build-out resistorFirst end connect, the second end of described the second build-out resistor respectively with described the second a reference source chip, instituteState the 2nd ADC module and connect, be used to described the 2nd ADC module that the second reference power source is provided.
More specifically, described the first build-out resistor is identical with described the second build-out resistor resistance; DescribedOne a reference source chip and described the second a reference source chip are same a reference source chip.
Further, a described ADC module has SPI communication interface, can with described information processing listUnit carries out SPI communication.
Further, the 2nd ADC module is the ADC conversion that model is identical with an ADC moduleChip, described the 2nd ADC module also has SPI communication interface, can enter with described information process unitRow SPI communication.
Particularly, information process unit passes through SPI with an ADC module, the 2nd ADC module respectivelyBus configuration Cheng Danzhu many from mode communicate by letter, wherein, information process unit is main frame, an ADCModule and the 2nd ADC module are slave.
For more detailed understanding the utility model embodiment, be elaborated below in conjunction with Fig. 2,As the another kind of structure that Fig. 2 is the utility model embodiment analog to digital conversion circuit with two a reference sources is shownIntention, this circuit comprises: reference power supply module 1 (i.e. the first reference power supply module), reference power supplyModule 2 (i.e. the second reference power supply module), information process unit (MCU), ADC module 1 (One ADC module), ADC module 1 (i.e. the 2nd ADC module); Reference power supply module 1 respectivelyBe connected with ADC module 1, ADC module 2; Reference power supply module 2 is connected with ADC module 2;Analog signal AN (such as, AN voltage range is the arbitrary value between 0V～5V) be input to respectively1 port (AN1) of ADC module 1 and 1 port (AN1) of ADC module 2; Information placeReason unit is connected with ADC module 1, ADC module 2 respectively, is converted to numeral to detect analog signalThe accuracy of signal.
Particularly, reference power supply module 1 comprises:
Power Vcc (such as voltage range is the arbitrary value between 9V～16V), the first build-out resistorR1 and the first a reference source chip D1; First of described power Vcc and described the first build-out resistor R1End connect, the second end of described the first build-out resistor R1 respectively with described the first a reference source chip D1,Described ADC module 1 and described ADC module 2 connect, and are used to described ADC module 1 to carryPower supply 1 for reference (i.e. the first reference power source), for described the 2nd ADC module provides comparison reference source,Reference power source 1 is by 3 ports (REF+) the input ADC module 1 of ADC module 1, with reference to electricitySource 1 is by 2 ports (AIN2) the input ADC module 2 of ADC module 2.
Particularly, reference power supply module 2 comprises:
The second build-out resistor R2 and the second a reference source chip D2; Power Vcc is mated with described secondThe first end of resistance R 2 connects, the second end of described the second build-out resistor R2 respectively with described the second baseAccurate source chip D2, described ADC module 2 connect, and are used to described ADC module 2 to provide with reference to electricitySource 2 (i.e. the second reference power source), reference power source 2 is by 3 ports (REF+) of ADC module 2Input ADC module 2.
More specifically, described the first build-out resistor R1 is identical with the resistance of described the second build-out resistor R2,Such as the first build-out resistor R1 and the second build-out resistor R2 are 47K ohm; Described the first a reference sourceChip D1 and described the second a reference source chip D2 are same a reference source chip, such as, the first benchmarkSource chip D1 and the second a reference source chip D2 are ADR5045B chip.
Further, described ADC module 1 has SPI communication interface, can with described information process unit(MCU) carry out SPI communication, such as, ADC module 1 is MAX1377 chip, its communicationInterface is: 5 ports of ADC module 16 ports (DO), 7 ports (DI), 8Port (I/O_CLK).
Further, ADC module 2 can be the ADC conversion core that model is identical with ADC module 1Sheet, described ADC module 1 also has SPI communication interface, can with described information process unit (MCU)Carry out SPI communication, such as, ADC module 2 is MAX1377 chip, its communication interface is:5 ports of ADC module 26 ports (DO), 7 ports (DI), 8 ports (I/O_CLK).
Particularly, information process unit passes through spi bus with ADC module 1, ADC module 2 respectivelyBe configured to much single more main from mode communicate by letter, wherein, information process unit is main frame, an ADC moduleWith the 2nd ADC module be slave.
It should be noted that, the communication interface of ADC module 1 is 5 ports of ADC module 1With information process unitPort connects; 6 ports (DO) and the information processing of ADC module 1The DO port of unit connects; 7 ports (DI) of ADC module 1 and the DI of information process unitPort connects; 8 ports (I/O_CLK) of ADC module 1 and the CLK port of information process unitConnect; Thereby realize the SPI master-slave communication mode of ADC module 1 with information process unit.
It should be noted that, the communication interface of ADC module 2 is 5 ports of ADC module 2With information process unitPort connects; 6 ports (DO) and the information processing of ADC module 2The DO port of unit connects; 7 ports (DI) of ADC module 2 and the DI of information process unitPort connects; 8 ports (I/O_CLK) of ADC module 2 and the CLK port of information process unitConnect; Thereby realize the SPI master-slave communication mode of ADC module 2 with information process unit.
It should be noted that 9 ports (EOC) of ADC module 1 and the EOC of information process unitPort connects, so that the analog-to-digital conversion state of information process unit Real-time Obtaining ADC module 1, such as,ADC module 1 is high level in transfer process, and not changing or complete the state of changing is low level.
It should be noted that 9 ports (EOC) of ADC module 2 and the EOC of information process unitPort connects, so that the analog-to-digital conversion state of information process unit Real-time Obtaining ADC module 2, such as,ADC module 2 is high level in transfer process, and not changing or complete the state of changing is low level.
It should be noted that, information process unit is chosen respectively ADC by chip selection signal CS1 and CS2Module 1 or ADC module 2, such as, the CS1 that information process unit can arrange by self is lowLevel or CS2 are low level, judge currently which slave to carry out communication with.
The specific works process of the utility model embodiment is:
The utility model embodiment after normally working on power, the ADC mould in the utility model embodimentIt is for making information processing process unit monitors ADC mould that the reference power source 1 of piece 1 is introduced ADC module 2Whether the reference power source 1 of piece 1 is reasonable with the reference power source 2 of ADC module 2, particularly, and information placeReason unit draws according to reference power source 1 and the difference situation of reference power source 2, ADC module 1 and ADCWhether the reference power supply of module 2 has drift, if reference power source 1 is 0 with the difference of reference power source 2,Illustrate that the reference power supply of ADC module 1 or ADC module 2 is without any drift; Otherwise, sayBright have one or two that drift has occurred in both.
In the present embodiment, analog signal AN, as an analog signal, entered ADC module 1 mouldNumber conversion, also can change in ADC module 2, and information process unit is by ADC module 1 and ADCModule 2 compares the transformation result of analog signal AN, draws whether fault of system.
In sum, the utility model embodiment has realized the mutual verification between two reference power supplies,By same analog signal, after two ADC conversion chips, this conversion uniformity is differentiated, asFruit is inconsistent, just illustrates that the AD transformation result of current system has broken down.
Above the utility model embodiment is described in detail, has applied specific embodiment party hereinFormula is set forth the utility model, and the explanation of above embodiment is just for helping to understand this practicalityNovel; Meanwhile, for one of ordinary skill in the art, according to thought of the present utility model, at toolIn body embodiment and range of application, all will change, in sum, the utility model content is notBe interpreted as restriction of the present utility model.
Claims (7)
1. an analog to digital conversion circuit with two a reference sources, is characterized in that, described circuit comprises:The first reference power supply module, the second reference power supply module, information process unit, an ADC module,The 2nd ADC module; Described the first reference power supply module respectively with a described ADC module, described inThe 2nd ADC module connects; Described the second reference power supply module is connected with described the 2nd ADC module;Analog signal is input to respectively a described ADC module and described the 2nd ADC module; Described informationProcessing unit is connected with a described ADC module, described the 2nd ADC module respectively, to detect mouldAnalog signal is converted to the accuracy of data signal.
2. the analog to digital conversion circuit with two a reference sources according to claim 1, is characterized in that,Described the first reference power supply module comprises:
Power supply, the first build-out resistor and the first a reference source chip; Described power supply mates with described firstThe first end of resistance connects, the second end of described the first build-out resistor respectively with described the first benchmark source coreSheet, a described ADC module and described the 2nd ADC module connect, and are used to a described ADCModule provides the first reference power source, for described the 2nd ADC module provides comparison reference source.
3. the analog to digital conversion circuit with two a reference sources according to claim 2, is characterized in that,Described the second reference power supply module comprises:
The second build-out resistor and the second a reference source chip; Described power supply and described the second build-out resistorFirst end connect, the second end of described the second build-out resistor respectively with described the second a reference source chip, instituteState the 2nd ADC module and connect, be used to described the 2nd ADC module that the second reference power source is provided.
4. the analog to digital conversion circuit with two a reference sources according to claim 3, is characterized in that,Described the first build-out resistor is identical with the resistance of described the second build-out resistor; Described the first a reference source chipWith described the second a reference source chip be same a reference source chip.
5. the analog to digital conversion circuit with two a reference sources according to claim 4, is characterized in that,
A described ADC module has SPI communication interface, for carrying out with described information process unitSPI communication.
6. the analog to digital conversion circuit with two a reference sources according to claim 5, is characterized in that,
Described the 2nd ADC module has SPI communication interface, for carrying out with described information process unitSPI communication.
7. the analog to digital conversion circuit with two a reference sources according to claim 6, is characterized in that,Described information process unit passes through SPI with a described ADC module, described the 2nd ADC module respectivelyBus configuration Cheng Danzhu many from mode communicate by letter, wherein, described information process unit is main frame, described inThe one ADC module and described the 2nd ADC module are slave.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620070759.1U CN205304767U (en) | 2016-01-22 | 2016-01-22 | Analog to digital conversion circuit with two reference sources |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201620070759.1U CN205304767U (en) | 2016-01-22 | 2016-01-22 | Analog to digital conversion circuit with two reference sources |
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| CN205304767U true CN205304767U (en) | 2016-06-08 |
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| CN201620070759.1U Expired - Fee Related CN205304767U (en) | 2016-01-22 | 2016-01-22 | Analog to digital conversion circuit with two reference sources |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109752593A (en) * | 2019-01-18 | 2019-05-14 | 钜泉光电科技(上海)股份有限公司 | Detection system and electric energy computation chip and its equipment |
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2016
- 2016-01-22 CN CN201620070759.1U patent/CN205304767U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109752593A (en) * | 2019-01-18 | 2019-05-14 | 钜泉光电科技(上海)股份有限公司 | Detection system and electric energy computation chip and its equipment |
| CN109752593B (en) * | 2019-01-18 | 2024-07-12 | 钜泉光电科技(上海)股份有限公司 | Detection system, electric energy metering chip and equipment thereof |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C56 | Change in the name or address of the patentee | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 230601 Anhui Province, Hefei City Industrial Park, the Peach Blossom Road No. 669 Patentee after: Anhui Jianghuai Automobile Group Limited by Share Ltd Address before: 230601 Anhui Province, Hefei City Industrial Park, the Peach Blossom Road No. 669 Patentee before: Anhui Jianghuai Automobile Co., Ltd. |
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| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160608 Termination date: 20190122 |
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| CF01 | Termination of patent right due to non-payment of annual fee |