CN205302270U - Integrated debugging interface of JTAG and BDM - Google Patents
Integrated debugging interface of JTAG and BDM Download PDFInfo
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- CN205302270U CN205302270U CN201521130481.4U CN201521130481U CN205302270U CN 205302270 U CN205302270 U CN 205302270U CN 201521130481 U CN201521130481 U CN 201521130481U CN 205302270 U CN205302270 U CN 205302270U
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Abstract
The utility model provides an integrated debugging interface of JTAG and BDM, includes JTAG interface and BDM interface, multiplexing debugging interface is constituteed to JTAG interface and BDM interface, multiplexing debugging interface is the two row's needle interfaces that are listed as the symmetrical arrangement, multiplexing debugging interface inserts the cooperation with JTAG emulation ware plug, BDM emulation ware plug respectively. This design has not only realized the multiplexing of JTAG interface and BDM interface, and it is long -pending to have reduced the circuit face moreover, has practiced thrift the material cost.
Description
Technical field
This utility model relates to a kind of Freescale(Freescale) JTAG and the BDM integrated form multiplexing debugging interface of MCU, particularly relate to a kind of JTAG and BDM integrated debugging interface, it is particularly applicable to reduce circuit board size, reduce the volume and weight of ECU.
Background technology
Microcontroller or microprocessor in embedded system have a debugging interface, for being connected with emulator or debugger, carry out program and write with a brush dipped in Chinese ink and debugging etc. The microcontroller that automobile industry is commonly used mainly has two kinds of debugging interfaces and the jtag interface of the BDM interface of 6pin and 14pin. When a circuit board has debugging interface respectively jtag interface and the BDM interface of two microcontrollers and two microcontrollers, need to use respectively on circuit boards the adapter (male end) of the adapter (male end) of a 14pin and a 6pin, the specification of two kinds of adapters is identical, is the pricking with needle of 2.54mm spacing. Debugging interface only uses in circuit board exploitation and production phase, does not play a role when user uses. And debugging interface occupies the area of circuit board, increase Material Cost.
Chinese patent application publication No. is CN102289419A, Shen Qing Publication day is that in December, 2011 patent of invention of 21 days discloses a kind of SOC integrated circuit, including: functional interface controller, JTAG debugging interface controller, for selecting functional interface signal or debugging interface signal and the signal selected being transmitted the signal multiplexing unit to external interface, for according to whether the different situations control signal Multiplexing Unit receiving debugging mode triggering command carries out the multiplexing control depositor of signal multiplexing, some pins and for SOC integrated circuit outside debugging acid or the external interface that is attached of other equipment. although this invention can reduce board area, but it still suffers from following defect:
1, this invention adopts with pin multiplexing signal, causes circuit structure more complicated, it is easy to make mistakes.
Summary of the invention
The purpose of this utility model is the problem overcoming the circuit existed in prior art complicated, it is provided that a kind of simple JTAG and BDM integrated debugging interface of circuit.
For realizing object above, technical solution of the present utility model is:
A kind of JTAG and BDM integrated debugging interface, including jtag interface and BDM interface;
Described jtag interface and BDM interface composition multiplexing debugging interface, described multiplexing debugging interface is the pricking with needle interface of two row symmetric arrays, and described multiplexing debugging interface inserts with JTAG emulator plug, BDM emulator plug respectively and coordinates.
The pin number of described jtag interface and the pin number of BDM interface and pin number be more than or equal to multiplexing debugging interface.
14 pins of described jtag interface are divided into left and right two column alignment arrangements, seven pins of the left side string of jtag interface are followed successively by TDI901 pin, TDO903 pin, TCK905 pin, Notused907 pin, Reset909 pin, VCC911 pin and Notused913 pin from front to back, and seven pins of the right side string of jtag interface are followed successively by GND902 pin, GND904 pin, GND906 pin, Notused908 pin, TMS910 pin, GND912 pin and JCOMP914 pin from front to back;
Six pins of described BDM interface are divided into left and right two column alignment arrangements, three pins of the left side string of BDM interface are followed successively by BKGD801 pin, Notused803 pin and Notused805 pin from front to back, and three pins of the right side string of BDM interface are followed successively by GND802 pin, Reset804 pin and VCC806 pin from front to back;
Described TDI901 pin is the TDI1 pin of multiplexing debugging interface, described GND902 pin is the GND2 pin of multiplexing debugging interface, described TDO903 pin is the TDO3 pin of multiplexing debugging interface, described GND904 pin is the GND4 pin of multiplexing debugging interface, described TCK905 pin is the TCK5 pin of multiplexing debugging interface, described GND906 pin is the GND6 pin of multiplexing debugging interface, described Notused907 pin is the Notused7 pin of multiplexing debugging interface, described Notused908 pin is the Notused8 pin of multiplexing debugging interface, described Reset909 pin is the Reset9 pin of multiplexing debugging interface, described TMS910 pin is the TMS10 pin of multiplexing debugging interface,
Described VCC911 pin and VCC806 pin multiplexing are the VCC11 pin of multiplexing debugging interface, described GND912 pin and Notused805 pin multiplexing are the GND12 pin of multiplexing debugging interface, described Notused913 pin and Reset804 pin multiplexing are the Reset13 pin of multiplexing debugging interface, and described JCOMP914 pin and Notused803 pin multiplexing are the JCOMP14 pin of multiplexing debugging interface;
Described GND802 pin is the GND15 pin of multiplexing debugging interface, and described BKGD801 pin is the BKGD16 pin of multiplexing debugging interface.
16 pins of described multiplexing debugging interface are divided into left and right two column alignment arrangements, eight pins of left side string of 16 pin multiplexing debugging interfaces are followed successively by TDI1 pin, TDO3 pin, TCK5 pin, Notused7 pin, Reset9 pin, VCC11 pin, Reset13 pin and GND15 pin from front to back, and eight pins of the right side string of 16 pin multiplexing debugging interfaces are followed successively by GND2 pin, GND4 pin, GND6 pin, Notused8 pin, TMS10 pin, GND12 pin, JCOMP14 pin, BKGD16 pin from front to back;
Described JTAG emulator plug inserts with TDI1 pin, GND2 pin, TDO3 pin, GND4 pin, TCK5 pin, GND6 pin, Notused7 pin, Notused8 pin, Reset9 pin, TMS10 pin, VCC11 pin, GND12 pin, Reset13 pin and JCOMP14 pin respectively and coordinates;
Described emulator plug 401 inserts with VCC11 pin, GND12 pin, Reset13 pin, JCOMP14 pin, GND15 pin and BKGD16 pin respectively and coordinates.
Compared with prior art, the beneficial effects of the utility model are:
1, by the jtag interface of freescaleMCU and BDM Interface integration to the pricking with needle interface of 16 pins in a kind of JTAG and BDM integrated debugging interface of this utility model, under not affecting the premise that user uses, decrease number of parts and the debugging interface area to PCB to take, improve the integrated level of circuit board, optimize the layout of circuit board, wiring, reduce the Material Cost of circuit board, reduce the volume and weight of ECU. Therefore the design effectively reduces the area of circuit board, reduces the volume and weight of ECU.
2, this utility model is a kind of is effectively increased the utilization rate of pricking with needle for multiplex interface in JTAG and the BDM integrated debugging interface of Freescale MCU, by two Notused pins of original BDM interface respectively with the GND pin of jtag interface, JCOMP pin multiplexing, by the Reset pin of the Notused pin below original jtag interface VCC pin Yu BDM interface, jtag interface and BDM interface share VCC pin simultaneously; Such design is effectively utilized the invalid pin of jtag interface and BDM interface, improves the pin utilization rate of multiplex interface pricking with needle, reduces the area of circuit board. Therefore, the interface duplex Lothrus apterus of the design, pin utilization rate is high, and board area is little.
3, the multiplexing debugging interface in the using method of a kind of JTAG and BDM integrated debugging interface of this utility model can be connected with JTAG emulator plug, BDM emulator plug respectively, and plug is convenient, does not affect the normal debugging of MCU. Therefore, the using method of the design is simple, and debugging is convenient, and interface utilization is high.
Accompanying drawing explanation
Fig. 1 is pin connection diagram of the present utility model.
Fig. 2 is the pin function schematic diagram of existing jtag interface.
Fig. 3 is the pin function schematic diagram of existing BDM interface.
Fig. 4 is the pin function schematic diagram of jtag interface and BDM interface duplex.
Fig. 5 is the de-multiplexing steps schematic diagram of jtag interface and BDM interface.
In figure: jtag interface 101, BDM interface 102, multiplexing debugging interface 103, JTAG emulator plug 301, JTAG emulator 302, BDM emulator plug 401, BDM emulator 402.
Detailed description of the invention
Illustrate with detailed description of the invention, this utility model to be described in further detail below in conjunction with accompanying drawing.
Referring to Fig. 1 Fig. 5, a kind of JTAG and BDM integrated debugging interface, including jtag interface 101 and BDM interface 102;
Described jtag interface 101 and BDM interface 102 form multiplexing debugging interface 103, described multiplexing debugging interface 103 is the pricking with needle interface of two row symmetric arrays, and described multiplexing debugging interface 103 inserts with JTAG emulator plug 301, BDM emulator plug 401 respectively and coordinates.
The pin number of described jtag interface 101 and the pin number of BDM interface 102 and pin number be more than or equal to multiplexing debugging interface 103.
14 pins of described jtag interface 101 are divided into left and right two column alignment arrangements, seven pins of the left side string of jtag interface 101 are followed successively by TDI901 pin, TDO903 pin, TCK905 pin, Notused907 pin, Reset909 pin, VCC911 pin and Notused913 pin from front to back, and seven pins of the right side string of jtag interface 101 are followed successively by GND902 pin, GND904 pin, GND906 pin, Notused908 pin, TMS910 pin, GND912 pin and JCOMP914 pin from front to back;
Six pins of described BDM interface 102 are divided into left and right two column alignment arrangements, three pins of the left side string of BDM interface 102 are followed successively by BKGD801 pin, Notused803 pin and Notused805 pin from front to back, and three pins of the right side string of BDM interface 102 are followed successively by GND802 pin, Reset804 pin and VCC806 pin from front to back;
Described TDI901 pin is the TDI1 pin of multiplexing debugging interface 103, described GND902 pin is the GND2 pin of multiplexing debugging interface 103, described TDO903 pin is the TDO3 pin of multiplexing debugging interface 103, described GND904 pin is the GND4 pin of multiplexing debugging interface 103, described TCK905 pin is the TCK5 pin of multiplexing debugging interface 103, described GND906 pin is the GND6 pin of multiplexing debugging interface 103, described Notused907 pin is the Notused7 pin of multiplexing debugging interface 103, described Notused908 pin is the Notused8 pin of multiplexing debugging interface 103, described Reset909 pin is the Reset9 pin of multiplexing debugging interface 103, described TMS910 pin is the TMS10 pin of multiplexing debugging interface 103,
Described VCC911 pin and VCC806 pin multiplexing are the VCC11 pin of multiplexing debugging interface 103, described GND912 pin and Notused805 pin multiplexing are the GND12 pin of multiplexing debugging interface 103, described Notused913 pin and Reset804 pin multiplexing are the Reset13 pin of multiplexing debugging interface 103, and described JCOMP914 pin and Notused803 pin multiplexing are the JCOMP14 pin of multiplexing debugging interface 103;
Described GND802 pin is the GND15 pin of multiplexing debugging interface 103, and described BKGD801 pin is the BKGD16 pin of multiplexing debugging interface 103.
16 pins of described multiplexing debugging interface 103 are divided into left and right two column alignment arrangements, eight pins of left side string of 16 pin multiplexing debugging interfaces 103 are followed successively by TDI1 pin, TDO3 pin, TCK5 pin, Notused7 pin, Reset9 pin, VCC11 pin, Reset13 pin and GND15 pin from front to back, and eight pins of the right side string of 16 pin multiplexing debugging interfaces 103 are followed successively by GND2 pin, GND4 pin, GND6 pin, Notused8 pin, TMS10 pin, GND12 pin, JCOMP14 pin, BKGD16 pin from front to back;
Described JTAG emulator plug 301 inserts with TDI1 pin, GND2 pin, TDO3 pin, GND4 pin, TCK5 pin, GND6 pin, Notused7 pin, Notused8 pin, Reset9 pin, TMS10 pin, VCC11 pin, GND12 pin, Reset13 pin and JCOMP14 pin respectively and coordinates;
Described BDM emulator plug 401 inserts with VCC11 pin, GND12 pin, Reset13 pin, JCOMP14 pin, GND15 pin and BKGD16 pin respectively and coordinates.
A kind of using method of JTAG and BDM integrated debugging interface, when MCU1 debugged by needs JTAG emulator 302, by each interface of JTAG emulator plug 301 by the TDI1 pin on function mark alignment multiplexing debugging interface 103 and JCOMP14 pin, then JTAG emulator plug 301 is inserted TDI1 pin to JCOMP14 pin, finally utilize JTAG emulator 302 that MCU1 is debugged, after having debugged, extract JTAG emulator plug 301;
When MCU2 debugged by needs BDM emulator 402, by each interface of BDM emulator plug 401 by the BKGD16 pin on function mark alignment multiplexing debugging interface 103 and VCC11 pin, then BDM emulator plug 401 is inserted BKGD16 pin to VCC11 pin, finally utilize BDM emulator 402 that MCU2 is debugged, after having debugged, extract BDM emulator plug 401.
Principle of the present utility model illustrates as follows:
JTAG (JointTestActionGroup; Joint test working group) it is a kind of international standard test protocol (IEEE1149.1 is compatible), it is mainly used in chip internal test. Now most high-grade device all supports JTAG protocol, such as DSP, FPGA device etc. The jtag interface of standard is 4 lines: TMS, TCK, TDI, TDO, respectively model selection, clock, data input and DOL Data Output Line.
Referring to Fig. 2: the pin definition of jtag interface is as follows:
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BDM (BackgroundDebuggingMode) is a kind of OCD (debugging mode of (On-ChipDebugging on-line debugging) that Motorola Inc. supports. Basic debugging function can be completed by BDM interface, for instance: arrange breakpoint, read/write memory, read-write register, download, single step performs program, operation program, shuts down procedure operation etc.
Referring to Fig. 3: the pin definition of jtag interface is as follows:
��
Pin definition referring to Fig. 1: JTAG and BDM ten six pin multiplexing debugging interface 103 is as follows:
��
The basic condition of jtag interface and BDM interface duplex:
A, existing jtag interface 101 VCC911 pin identical with the voltage of the VCC806 pin of BDM interface 102.
B, jtag interface 101 and BDM interface 102 are the pricking with needle interface of spacing 2.54 millimeters.
C, the adapter of jtag interface 101 and the adapter of BDM interface 102 all design without fool proof plug.
Due to the design that the adapter of jtag interface 101 and BDM interface 102 plugs all without fool proof, namely Male end connector and terminative connector in conjunction with time regardless of direction, therefore we revolve turnback BDM interface 102 adapter. Now, the VCC806 pin of BDM interface 102 and the VCC911 pin of jtag interface 101 are all VCC pin, and voltage is identical, and VCC911 pin and VCC806 pin can directly be multiplexed with the VCC11 pin of multiplexing debugging interface 103; The Notused805 pin of BDM interface 102 is untapped pin, Notused805 pin does not conflict with the GND912 pin of jtag interface 101, pin after multiplexing only has jtag interface 101 to use, and GND912 pin and Notused805 pin multiplexing are the GND12 pin of multiplexing debugging interface 103; In like manner, the Reset804 pin of BDM interface 102 is Reset, and the Notused913 pin of jtag interface 101 does not use, the pin after multiplexing only has BDM interface 102 to use, and described Notused913 pin and Reset804 pin multiplexing are the Reset13 pin of multiplexing debugging interface 103; In like manner, the Notused803 pin of BDM interface 102 does not use, Notused803 pin does not conflict with the JCOMP914 pin of jtag interface 101, pin after multiplexing only has jtag interface 101 to use, and JCOMP914 pin and Notused803 pin multiplexing are the JCOMP14 pin of multiplexing debugging interface 103. In sum, the VCC911 pin JCOMP914 pin of jtag interface 101 can with the VCC806 pin Notused803 pin number pin multiplexing of BDM interface 102. Therefore it may only be necessary to increase by two pins in the pin 913 of jtag interface, No. 914 underfooting sides of pin, it is achieved the GND802 pin of BDM interface, BKGD801 pin Pin function can realize an adapter and be multiplexed with the function of two interfaces.
The jtag interface of the design and BDM interface are debugging interface, are only producing and in debugging process for professional, and user will not use debugging interface, and therefore the interface duplex of the design is without influence on user's use to product.
Embodiment 1:
Referring to Fig. 1 Fig. 5, a kind of JTAG and BDM integrated debugging interface, including jtag interface 101 and BDM interface 102, described jtag interface 101 and BDM interface 102 form multiplexing debugging interface 103, described multiplexing debugging interface 103 is the pricking with needle interface of two row symmetric arrays, and described multiplexing debugging interface 103 inserts with JTAG emulator plug 301, BDM emulator plug 401 respectively and coordinates;The pin number of described jtag interface 101 and the pin number of BDM interface 102 and pin number be more than or equal to multiplexing debugging interface 103, 14 pins of described jtag interface 101 are divided into left and right two column alignment arrangements, seven pins of the left side string of jtag interface 101 are followed successively by TDI901 pin, TDO903 pin, TCK905 pin, Notused907 pin, Reset909 pin, VCC911 pin and Notused913 pin from front to back, and seven pins of the right side string of jtag interface 101 are followed successively by GND902 pin, GND904 pin, GND906 pin, Notused908 pin, TMS910 pin, GND912 pin and JCOMP914 pin from front to back, six pins of described BDM interface 102 are divided into left and right two column alignment arrangements, three pins of the left side string of BDM interface 102 are followed successively by BKGD801 pin, Notused803 pin and Notused805 pin from front to back, and three pins of the right side string of BDM interface 102 are followed successively by GND802 pin, Reset804 pin and VCC806 pin from front to back, described TDI901 pin is the TDI1 pin of multiplexing debugging interface 103, described GND902 pin is the GND2 pin of multiplexing debugging interface 103, described TDO903 pin is the TDO3 pin of multiplexing debugging interface 103, described GND904 pin is the GND4 pin of multiplexing debugging interface 103, described TCK905 pin is the TCK5 pin of multiplexing debugging interface 103, described GND906 pin is the GND6 pin of multiplexing debugging interface 103, described Notused907 pin is the Notused7 pin of multiplexing debugging interface 103, described Notused908 pin is the Notused8 pin of multiplexing debugging interface 103, described Reset909 pin is the Reset9 pin of multiplexing debugging interface 103, described TMS910 pin is the TMS10 pin of multiplexing debugging interface 103, described VCC911 pin and VCC806 pin multiplexing are the VCC11 pin of multiplexing debugging interface 103, described GND912 pin and Notused805 pin multiplexing are the GND12 pin of multiplexing debugging interface 103, described Notused913 pin and Reset804 pin multiplexing are the Reset13 pin of multiplexing debugging interface 103, and described JCOMP914 pin and Notused803 pin multiplexing are the JCOMP14 pin of multiplexing debugging interface 103, described GND802 pin is the GND15 pin of multiplexing debugging interface 103, and described BKGD801 pin is the BKGD16 pin of multiplexing debugging interface 103, 16 pins of described multiplexing debugging interface 103 are divided into left and right two column alignment arrangements, eight pins of left side string of 16 pin multiplexing debugging interfaces 103 are followed successively by TDI1 pin, TDO3 pin, TCK5 pin, Notused7 pin, Reset9 pin, VCC11 pin, Reset13 pin and GND15 pin from front to back, and eight pins of the right side string of 16 pin multiplexing debugging interfaces 103 are followed successively by GND2 pin, GND4 pin, GND6 pin, Notused8 pin, TMS10 pin, GND12 pin, JCOMP14 pin, BKGD16 pin from front to back, described JTAG emulator plug 301 inserts with TDI1 pin, GND2 pin, TDO3 pin, GND4 pin, TCK5 pin, GND6 pin, Notused7 pin, Notused8 pin, Reset9 pin, TMS10 pin, VCC11 pin, GND12 pin, Reset13 pin and JCOMP14 pin respectively and coordinates, described BDM emulator plug 401 inserts with VCC11 pin, GND12 pin, Reset13 pin, JCOMP14 pin, GND15 pin and BKGD16 pin respectively and coordinates.
A kind of using method of JTAG and BDM integrated debugging interface, when MCU1 debugged by needs JTAG emulator 302, by each interface of JTAG emulator plug 301 by the TDI1 pin on function mark alignment multiplexing debugging interface 103 and JCOMP14 pin, then JTAG emulator plug 301 is inserted TDI1 pin to JCOMP14 pin, finally utilize JTAG emulator 302 that MCU1 is debugged, after having debugged, extract JTAG emulator plug 301; When MCU2 debugged by needs BDM emulator 402, by each interface of BDM emulator plug 401 by the BKGD16 pin on function mark alignment multiplexing debugging interface 103 and VCC11 pin, then BDM emulator plug 401 is inserted BKGD16 pin to VCC11 pin, finally utilize BDM emulator 402 that MCU2 is debugged, after having debugged, extract BDM emulator plug 401.
Claims (4)
1. a JTAG and BDM integrated debugging interface, including jtag interface (101) and BDM interface (102), it is characterised in that:
Described jtag interface (101) and BDM interface (102) composition multiplexing debugging interface (103), described multiplexing debugging interface (103) is the pricking with needle interface of two row symmetric arrays, and described multiplexing debugging interface (103) is inserted with JTAG emulator plug (301), BDM emulator plug (401) respectively and coordinated.
2. a kind of JTAG and BDM integrated debugging interface according to claim 1, it is characterised in that:
The pin number of the pin number of described jtag interface (101) and BDM interface (102) and pin number be more than or equal to multiplexing debugging interface (103).
3. a kind of JTAG and BDM integrated debugging interface according to claim 2, it is characterised in that:
14 pins of described jtag interface (101) are divided into left and right two column alignment arrangements, seven pins of the left side string of jtag interface (101) are followed successively by TDI901 pin, TDO903 pin, TCK905 pin, Notused907 pin, Reset909 pin, VCC911 pin and Notused913 pin from front to back, and seven pins of the right side string of jtag interface (101) are followed successively by GND902 pin, GND904 pin, GND906 pin, Notused908 pin, TMS910 pin, GND912 pin and JCOMP914 pin from front to back;
Six pins of described BDM interface (102) are divided into left and right two column alignment arrangements, three pins of the left side string of BDM interface (102) are followed successively by BKGD801 pin, Notused803 pin and Notused805 pin from front to back, and three pins of the right side string of BDM interface (102) are followed successively by GND802 pin, Reset804 pin and VCC806 pin from front to back;
Described TDI901 pin is the TDI1 pin of multiplexing debugging interface (103), described GND902 pin is the GND2 pin of multiplexing debugging interface (103), described TDO903 pin is the TDO3 pin of multiplexing debugging interface (103), described GND904 pin is the GND4 pin of multiplexing debugging interface (103), described TCK905 pin is the TCK5 pin of multiplexing debugging interface (103), described GND906 pin is the GND6 pin of multiplexing debugging interface (103), described Notused907 pin is the Notused7 pin of multiplexing debugging interface (103), described Notused908 pin is the Notused8 pin of multiplexing debugging interface (103), described Reset909 pin is the Reset9 pin of multiplexing debugging interface (103), described TMS910 pin is the TMS910 pin of multiplexing debugging interface (103),
Described VCC911 pin and VCC806 pin multiplexing are the VCC11 pin of multiplexing debugging interface (103), described GND912 pin and Notused805 pin multiplexing are the GND12 pin of multiplexing debugging interface (103), described Notused913 pin and Reset804 pin multiplexing are the Reset13 pin of multiplexing debugging interface (103), and described JCOMP914 pin and Notused803 pin multiplexing are the JCOMP14 pin of multiplexing debugging interface (103);
Described GND802 pin is the GND815 pin of multiplexing debugging interface (103), and described BKGD801 pin is the BKGD16 pin of multiplexing debugging interface (103).
4. a kind of JTAG and the BDM integrated debugging interface according to Claims 2 or 3, it is characterised in that:
16 pins of described multiplexing debugging interface (103) are divided into a left side, right two column alignment arrangements, eight pins of left side string of 16 pins multiplexing debugging interface (103) are followed successively by TDI1 pin from front to back, TDO3 pin, TCK5 pin, Notused7 pin, Reset9 pin, VCC11 pin, Reset13 pin and GND15 pin, eight pins of the right side string of 16 pins multiplexing debugging interface (103) are followed successively by GND2 pin from front to back, GND4 pin, GND6 pin, Notused8 pin, TMS10 pin, GND12 pin, JCOMP14 pin, BKGD16 pin,
Described JTAG emulator plug (301) is inserted with TDI1 pin, GND2 pin, TDO3 pin, GND4 pin, TCK5 pin, GND6 pin, Notused7 pin, Notused8 pin, Reset9 pin, TMS10 pin, VCC11 pin, GND12 pin, Reset13 pin and JCOMP14 pin respectively and is coordinated;
Described BDM emulator plug (401) is inserted with VCC11 pin, GND12 pin, Reset13 pin, JCOMP14 pin, GND15 pin and BKGD16 pin respectively and is coordinated.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521130481.4U CN205302270U (en) | 2015-12-30 | 2015-12-30 | Integrated debugging interface of JTAG and BDM |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201521130481.4U CN205302270U (en) | 2015-12-30 | 2015-12-30 | Integrated debugging interface of JTAG and BDM |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205302270U true CN205302270U (en) | 2016-06-08 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201521130481.4U Withdrawn - After Issue CN205302270U (en) | 2015-12-30 | 2015-12-30 | Integrated debugging interface of JTAG and BDM |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105528270A (en) * | 2015-12-30 | 2016-04-27 | 东风商用车有限公司 | JTAG and BDM integrated debugging interface and using method thereof |
-
2015
- 2015-12-30 CN CN201521130481.4U patent/CN205302270U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105528270A (en) * | 2015-12-30 | 2016-04-27 | 东风商用车有限公司 | JTAG and BDM integrated debugging interface and using method thereof |
| CN105528270B (en) * | 2015-12-30 | 2018-03-30 | 东风商用车有限公司 | A kind of JTAG and BDM integrated debuggings interface and its application method |
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| AV01 | Patent right actively abandoned |
Granted publication date: 20160608 Effective date of abandoning: 20180330 |