CN205246754U - Smart electric meter's measurement and communication circuit - Google Patents
Smart electric meter's measurement and communication circuit Download PDFInfo
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- CN205246754U CN205246754U CN201521007300.9U CN201521007300U CN205246754U CN 205246754 U CN205246754 U CN 205246754U CN 201521007300 U CN201521007300 U CN 201521007300U CN 205246754 U CN205246754 U CN 205246754U
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Abstract
The utility model provides a smart electric meter's measurement and communication circuit, includes: the measurement chip, the model of intelligent microelectronics co. Ltd production in measurement chip adoption zhuhai is SWF2L23AR's measurement chip, respectively with live wire current sampling circuit, zero line current sampling circuit and voltage sampling circuit that the measurement chip is connected, after these 3 sampling circuit sample to live wire electric current, zero line electric current and voltage respectively with respective sampled signal carry respectively for the measurement chip, with the measurement pulse output circuit of the pulse output end connection of measurement chip, with the serial communication circuit of the serial interface intercommunication of measurement chip, the serial communication circuit links to each other with the main control unit of measuring equipment. The utility model discloses a measurement is with the communication circuit measurement is accurate, interference immunity is strong, stability is high.
Description
Technical field
The utility model belongs to electronic circuit technology field, relates in particular to metering and telecommunication circuit that a kind of intelligent electric meter is used.
Background technology
Along with power industry intelligent electric energy meter updates in enormous quantities, intelligent electric energy meter is also more and more higher to the accuracy of metering, if ammeter measures the inaccurate electric power dispute that usually can produce, causes damage. With the maximally related factor of ammeter measuring accuracy be exactly whether performance and the work of the computation chip above intelligent electric energy meter stable, therefore, exploitation precision is high, the computation chip of accurate measurement and the peripheral circuit that matches very important.
Utility model content
The purpose of this utility model is to provide a kind of accurate measurement, strong interference immunity, the metering for intelligent electric meter and telecommunication circuit that stability is high.
To achieve these goals, the utility model is taked following technical solution:
The metering of intelligent electric meter and a telecommunication circuit, comprising: computation chip, the computation chip that the model that described computation chip adopts Zhuhai Zhonghui Microelectronics Co., Ltd. to produce is SWF2L23AR; The live wire current sampling circuit, neutral line current sample circuit and the voltage sampling circuit that are connected with described computation chip respectively, these 3 sample circuits flow to described computation chip by sampled signal separately after respectively live wire electric current, neutral line current and voltage being sampled; The metrical pulse output circuit being connected with the pulse output end of described computation chip; With the serial communication circuit that the serial line interface of described computation chip is communicated with, described serial communication circuit is connected with the main control unit of measuring equipment.
More specifically, 1 pin of described computation chip is connected with 16 pin through crystal oscillator, 1 pin connects in analog through the 8th electric capacity simultaneously, and 2 pin connect in analog through the 9th electric capacity, and 3 pin are empty pin, 4 pin connect in analog through the tenth electric capacity, 4 pin are connected with computation chip power supply after the 22 resistance simultaneously, and 11 pin connect in analog after the 11 electric capacity of parallel connection and the 12 electric capacity, and 14 pin connect in analog, 15 pin connect computation chip power supply, between 14 pin and 15 pin and be connected to the 13 electric capacity and the 14 electric capacity.
More specifically, described live wire current sampling circuit comprises the first resistance and the second resistance, and one end of described the first resistance is connected with sampled point, the other end is connected with 8 pin and first electric capacity of described computation chip simultaneously, and another termination of described the first electric capacity in analog; One end of described the second resistance is connected with another sampled point, the other end is connected with 7 pin and second electric capacity of described computation chip, and another termination of described the second electric capacity in analog; Between described the first resistance and sampled point and between described the second resistance and sampled point and be connected to the 3rd resistance and the 4th resistance, the connected node of described the 4th resistance and described the second resistance connects in analog.
More specifically, described neutral line current sample circuit comprises the 5th resistance and the 6th resistance, and one end of described the 5th resistance is connected with sampled point, the other end is connected with 6 pin and the 3rd electric capacity of described computation chip, and another termination of described the 3rd electric capacity in analog; One end of described the 6th resistance is connected with another sampled point, the other end is connected with 5 pin and the 4th electric capacity of described computation chip, and another termination of described the 4th electric capacity in analog; Between two sampled points, be connected with the 7th resistance, the connected node of described the 7th resistance and described the 6th resistance connects in analog.
More specifically, described voltage sampling circuit comprises the 8th resistance, the 9th resistance, the tenth resistance, the 11 resistance, the 12 resistance and the 13 resistance that are connected successively, described the 8th resistance is connected with sampled point, described the 13 resistance is connected with 10 pin of described computation chip, described the 13 resistance is connected with 9 pin of described computation chip after the 15 resistance through the 14 resistance of series connection simultaneously, between described the 13 resistance and 10 pin of computation chip, be connected with the 5th electric capacity, another termination of described the 5th electric capacity in analog; Between described the 15 resistance and 9 pin of computation chip, be connected with the 6th electric capacity, another termination of described the 6th electric capacity in analog; The connected node of described the 14 resistance and described the 15 resistance connects in analog.
More specifically, described metrical pulse output circuit comprises the 16 resistance, the first optocoupler, the 17 resistance and the 7th electric capacity, one end of described the 16 resistance is connected with 2 pin of described computation chip, the other end is connected with the positive pole of light emitting diode in described the first optocoupler, in described the first optocoupler, the negative pole of light emitting diode connects in analog, in described the first optocoupler the colelctor electrode of phototriode be connected with positive source, emitter stage ground connection after the 17 resistance, described the 7th electric capacity is in parallel with described the 17 resistance.
More specifically, described serial communication circuit comprises signal level shift circuit and photoelectric isolating circuit; Described photoelectric isolating circuit comprises the 18 resistance, the second optocoupler and the 19 resistance, in described the second optocoupler, the positive pole of light emitting diode is connected with positive source, negative pole is connected with the serial input interface of main control unit through described the 18 resistance, in described the second optocoupler the colelctor electrode of phototriode through described the 19 resistance be connected with 13 pin of described computation chip, emitter stage connects in analog; Described signal level shift circuit comprises the 3rd optocoupler, the 20 resistance and the 21 resistance, in described the 3rd optocoupler the positive pole of light emitting diode through the 20 resistance be connected with computation chip power supply, negative pole is connected with 12 pin of described computation chip, in described the 3rd optocoupler, the grounded emitter of phototriode, colelctor electrode are connected with the serial input interface of main control unit after described the 21 resistance.
From above technical scheme, the utility model is for SWF2L23AR computation chip, its peripheral circuit has been carried out to coupling design, live wire current sampling signal is adopted to difference In-put design, neutral line current sampled signal and voltage sampling signal are adopted to pseudo-differential processing, sampled signal is carried out to RC filtering processing, serial communication circuit has been adopted to signal level shift circuit, facilitate the MCU chip design of varying level, also comprise impulse output circuit simultaneously, ensured the stability of sampled signal anti-interference and computation chip.
Brief description of the drawings
In order to be illustrated more clearly in the utility model embodiment, to the accompanying drawing of required use in embodiment or description of the Prior Art be done to simple introduction below, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skill in the art, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the circuit block diagram of the utility model embodiment;
Fig. 2 is the circuit diagram of the utility model computation chip and peripheral circuit thereof;
Fig. 3 is the circuit diagram of the utility model live wire current sampling circuit;
Fig. 4 is the circuit diagram of the utility model neutral line current sample circuit;
Fig. 5 is the circuit diagram of the utility model voltage sampling circuit;
Fig. 6 is the circuit diagram of the utility model metrical pulse circuit;
Fig. 7 is the circuit diagram of photoelectric isolating circuit in the utility model serial communication circuit;
Fig. 8 is the circuit diagram of signal level shift circuit in the utility model serial communication circuit.
Below in conjunction with accompanying drawing, detailed description of the invention of the present utility model is described in more detail.
Detailed description of the invention
As shown in Figure 1, metering of the present utility model and telecommunication circuit comprise computation chip 1, live wire current sampling circuit 2, neutral line current sample circuit 3, voltage sampling circuit 4, metrical pulse output circuit 5 and serial communication circuit 6. Wherein, live wire current sampling circuit 2, neutral line current sample circuit 3 and voltage sampling circuit 4 are connected with computation chip 1 respectively, these 3 sample circuits are sampled to live wire electric current, neutral line current and voltage respectively, and sampled signal is separately flowed to respectively to computation chip 1. Computation chip 1 is also connected with metrical pulse output circuit 5 and serial communication circuit 6, and serial communication circuit 6 is connected with the main control unit of measuring equipment.
The electric energy computation chip that the model that computation chip 1 of the present utility model adopts Zhuhai Zhonghui Microelectronics Co., Ltd. to produce is SWF2L23AR, the dynamic range of this computation chip is 8000:1. As shown in Figure 2, this computation chip has 16 pins, and it is minimum only needs 2 optocouplers can realize the electrical isolation of MCU and metering, compares serial communication, can economize 3 optocouplers. The pulse output end of computation chip 1 connects metrical pulse output circuit, serial line interface connects the corresponding serial line interface of main control unit by serial communication circuit 6, after magnitude of voltage, current value and reverse electric weight that computation chip 1 obtains, input in main control unit by serial line interface, main control unit can be electric weight by the pulses switch of computation chip output.
The peripheral circuit of computation chip 1 comprises power supply circuits, crystal oscillating circuit and earthed circuit. 1 pin (OSCO) of computation chip 1 is connected with 16 pin (OSCI) of computation chip through crystal oscillator X201, and 1 pin of computation chip 1 connects in analog through the 8th capacitor C 221 simultaneously, and 2 pin connect in analog through the 9th capacitor C 222. 3 pin of computation chip 1 are empty pin. 4 pin of computation chip 1 through the tenth capacitor C 206 connect in analog, 4 pin are connected with computation chip power supply after the 22 resistance R 208 simultaneously. 11 pin of computation chip 1 connect in analog after the 11 capacitor C the 208 and the 12 capacitor C 207 of parallel connection. 14 pin of computation chip 1 connect in analog, and 15 pin connect computation chip power supply, between 14 pin of computation chip 1 and 15 pin and be connected to the 13 capacitor C the 201 and the 14 capacitor C 202.
With reference to Fig. 3, Fig. 3 is the circuit diagram of the utility model live wire current sampling circuit. As shown in Figure 3, two inputs of live wire current sampling circuit are connected with sampled point 2 with sampled point 1 respectively, the input being connected with sampled point 2 is connected with 8 pin (V2N) of computation chip 1 after the first resistance R 217, the first resistance R 217 is connected with the first capacitor C 209 simultaneously, and another termination of the first capacitor C 209 in analog. The input being connected with sampled point 1 is connected with 7 pin (V2P) of computation chip 1 after the second resistance R 218, and the second resistance R 218 is connected with the second capacitor C 210 simultaneously, and another termination of the second capacitor C 210 in analog. Between sampled point 2 and the first resistance R 217 and between sampled point 1 and the second resistance R 218 and the connected node that is connected to the 3rd resistance R 214 and the 4th resistance R 234, the four resistance R 234 and the second resistance R 218 connect in analog.
As shown in Figure 4, two inputs of neutral line current sample circuit are connected with sampled point LIN-with sampled point Lin+ respectively, the input being connected with sampled point Lin+ is connected with 6 pin (VIN) of computation chip 1 through the 5th resistance R 215, and the 5th resistance R 215 connects in analog after the 3rd capacitor C 203; The input being connected with sampled point LIN-is connected with 5 pin (VIP) of computation chip 1 through the 6th resistance R 216, and the 6th resistance R 216 connects in analog after the 4th capacitor C 204. The connected node that is connected with the 7th resistance R 237, the seven resistance R 237 and the 6th resistance R 216 between sampled point Lin+ and Lin-connects in analog.
As shown in Figure 5, voltage sampling circuit comprises the 8th resistance R 201 being connected successively, the 9th resistance R 202, the tenth resistance R 203, the 11 resistance R 204, the 12 resistance R the 205 and the 13 resistance R 206, wherein, the 8th resistance R 201 is connected with sampled point ZERO, the 13 resistance R 206 is connected with 10 pin (V3N) of computation chip 1, the 13 resistance R 206 is connected with 9 pin (V3P) of computation chip 1 after the 15 resistance R 213 through the 14 resistance R 211 of series connection simultaneously, between the 13 resistance R 206 and 10 pin of computation chip 1, be connected with the 5th capacitor C 212, another termination of the 5th capacitor C 212 in analog, between the 15 resistance R 213 and 9 pin of computation chip 1, be connected with the 6th capacitor C 213, another termination of the 6th capacitor C 213 in analog, the connected node of the 14 resistance R 211 and the 15 resistance R 213 connects in analog.
As shown in Figure 6, metrical pulse output circuit comprises the 16 resistance R 210, the first optocoupler U201, the 17 resistance R 160 and the 7th capacitor C 115, the 16 resistance R 210 is connected with 2 pin (PF) of computation chip 1, the other end of the 16 resistance R 210 is connected with the positive pole of light emitting diode in the first optocoupler U201, in the first optocoupler U201, the negative pole of light emitting diode connects in analog, in the first optocoupler U201, the colelctor electrode of phototriode is connected with positive source, the emitter stage of phototriode is ground connection after the 17 resistance R 160, the 7th capacitor C 115 is in parallel with the 17 resistance R 160.
Serial communication circuit is made up of signal level shift circuit and photoelectric isolating circuit, and main control unit is to computation chip serial input signals and to computation chip serial output signal. As shown in Figure 7, photoelectric isolating circuit comprises the 18 resistance R 226, the second optocoupler U205 and the 19 resistance R 223, in the second optocoupler U205, the positive pole of light emitting diode is connected with positive source, negative pole is connected with the serial input interface MCU_TX of main control unit through the 18 resistance R 226, in the second optocoupler U205 the colelctor electrode of phototriode through the 19 resistance R 223 be connected with 13 pin (ARX) of computation chip 1, the emitter stage of phototriode connects in analog.
With reference to Fig. 8, signal level shift circuit comprises the 3rd optocoupler U203, the 20 resistance R the 228 and the 21 resistance R 229, in the 3rd optocoupler U203 the positive pole of light emitting diode through the 20 resistance R 228 be connected with computation chip power supply, negative pole is connected with 12 pin (ATX) of computation chip 1, grounded emitter, the colelctor electrode of phototriode are connected with the serial input interface MCU_RX of main control unit after the 21 resistance R 229. It is multiplexing that this communication line utilizes RX leg signal to carry out reset function, produces specific clock signal and realize, and reduced by a route road and controlled.
Metering of the present utility model and telecommunication circuit, live wire current sampling signal is adopted to difference In-put design, neutral line current sampled signal and voltage sampling signal are adopted to pseudo-differential processing, serial communication port is adopted to signal level shift circuit, facilitate the MCU chip design of varying level.
Above embodiment is only in order to illustrate that the technical solution of the utility model is not intended to limit, although the utility model is had been described in detail with reference to above-described embodiment, those of ordinary skill in the field are to be understood that, still can modify or be equal to replacement detailed description of the invention of the present utility model, and do not depart from any amendment of the utility model spirit and scope or be equal to replacement, it all should be encompassed among scope of the present utility model.
Claims (7)
1. the metering of intelligent electric meter and a telecommunication circuit, is characterized in that, comprising:
Computation chip, the computation chip that the model that described computation chip adopts Zhuhai Zhonghui Microelectronics Co., Ltd. to produce is SWF2L23AR;
The live wire current sampling circuit, neutral line current sample circuit and the voltage sampling circuit that are connected with described computation chip respectively, these 3 sample circuits flow to described computation chip by sampled signal separately after respectively live wire electric current, neutral line current and voltage being sampled;
The metrical pulse output circuit being connected with the pulse output end of described computation chip;
With the serial communication circuit that the serial line interface of described computation chip is communicated with, described serial communication circuit is connected with the main control unit of measuring equipment.
2. the metering of intelligent electric meter as claimed in claim 1 and telecommunication circuit, it is characterized in that: 1 pin of described computation chip is connected with 16 pin through crystal oscillator, 1 pin connects in analog through the 8th electric capacity simultaneously, 2 pin connect in analog through the 9th electric capacity, 3 pin are empty pin, 4 pin connect in analog through the tenth electric capacity, 4 pin are connected with computation chip power supply simultaneously after the 22 resistance, 11 pin connect in analog after the 11 electric capacity of parallel connection and the 12 electric capacity, 14 pin connect in analog, 15 pin connect computation chip power supply, between 14 pin and 15 pin and be connected to the 13 electric capacity and the 14 electric capacity.
3. the metering of intelligent electric meter as claimed in claim 1 or 2 and telecommunication circuit, it is characterized in that: described live wire current sampling circuit comprises the first resistance and the second resistance, one end of described the first resistance is connected with sampled point, the other end is connected with 8 pin and first electric capacity of described computation chip simultaneously, and another termination of described the first electric capacity in analog; One end of described the second resistance is connected with another sampled point, the other end is connected with 7 pin and second electric capacity of described computation chip, and another termination of described the second electric capacity in analog; Between described the first resistance and sampled point and between described the second resistance and sampled point and be connected to the 3rd resistance and the 4th resistance, the connected node of described the 4th resistance and described the second resistance connects in analog.
4. the metering of intelligent electric meter as claimed in claim 1 or 2 and telecommunication circuit, it is characterized in that: described neutral line current sample circuit comprises the 5th resistance and the 6th resistance, one end of described the 5th resistance is connected with sampled point, the other end is connected with 6 pin and the 3rd electric capacity of described computation chip, and another termination of described the 3rd electric capacity in analog; One end of described the 6th resistance is connected with another sampled point, the other end is connected with 5 pin and the 4th electric capacity of described computation chip, and another termination of described the 4th electric capacity in analog; Between two sampled points, be connected with the 7th resistance, the connected node of described the 7th resistance and described the 6th resistance connects in analog.
5. the metering of intelligent electric meter as claimed in claim 1 or 2 and telecommunication circuit, it is characterized in that: described voltage sampling circuit comprises the 8th resistance being connected successively, the 9th resistance, the tenth resistance, the 11 resistance, the 12 resistance and the 13 resistance, described the 8th resistance is connected with sampled point, described the 13 resistance is connected with 10 pin of described computation chip, described the 13 resistance is connected with 9 pin of described computation chip after the 15 resistance through the 14 resistance of series connection simultaneously, between described the 13 resistance and 10 pin of computation chip, be connected with the 5th electric capacity, another termination of described the 5th electric capacity in analog, between described the 15 resistance and 9 pin of computation chip, be connected with the 6th electric capacity, another termination of described the 6th electric capacity in analog, the connected node of described the 14 resistance and described the 15 resistance connects in analog.
6. the metering of intelligent electric meter as claimed in claim 1 or 2 and telecommunication circuit, it is characterized in that: described metrical pulse output circuit comprises the 16 resistance, the first optocoupler, the 17 resistance and the 7th electric capacity, one end of described the 16 resistance is connected with 2 pin of described computation chip, the other end is connected with the positive pole of light emitting diode in described the first optocoupler, in described the first optocoupler, the negative pole of light emitting diode connects in analog, in described the first optocoupler, the colelctor electrode of phototriode is connected with positive source, emitter stage is ground connection after the 17 resistance, described the 7th electric capacity is in parallel with described the 17 resistance.
7. the metering of intelligent electric meter as claimed in claim 1 or 2 and telecommunication circuit, is characterized in that: described serial communication circuit comprises signal level shift circuit and photoelectric isolating circuit;
Described photoelectric isolating circuit comprises the 18 resistance, the second optocoupler and the 19 resistance, in described the second optocoupler, the positive pole of light emitting diode is connected with positive source, negative pole is connected with the serial input interface of main control unit through described the 18 resistance, in described the second optocoupler the colelctor electrode of phototriode through described the 19 resistance be connected with 13 pin of described computation chip, emitter stage connects in analog;
Described signal level shift circuit comprises the 3rd optocoupler, the 20 resistance and the 21 resistance, in described the 3rd optocoupler the positive pole of light emitting diode through the 20 resistance be connected with computation chip power supply, negative pole is connected with 12 pin of described computation chip, in described the 3rd optocoupler, the grounded emitter of phototriode, colelctor electrode are connected with the serial input interface of main control unit after described the 21 resistance.
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| CN201521007300.9U CN205246754U (en) | 2015-11-27 | 2015-11-27 | Smart electric meter's measurement and communication circuit |
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| CN201521007300.9U CN205246754U (en) | 2015-11-27 | 2015-11-27 | Smart electric meter's measurement and communication circuit |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106291091A (en) * | 2016-07-29 | 2017-01-04 | 门丫 | A kind of can fire monitoring control sale of electricity one-way charge Intelligent type ammeter |
| CN106291089A (en) * | 2016-07-27 | 2017-01-04 | 宁波三星医疗电气股份有限公司 | A kind of intelligent electric energy meter falls zero line detection method |
| CN107064587A (en) * | 2016-12-13 | 2017-08-18 | 浙江恒业电子有限公司 | A kind of electric energy meter circuit |
| CN108594011A (en) * | 2018-05-08 | 2018-09-28 | 浙江正泰仪器仪表有限责任公司 | The sample circuit of electronic electric energy meter |
| CN111413541A (en) * | 2020-04-22 | 2020-07-14 | 上海国泉科技有限公司 | Metering circuit of ammeter and ammeter |
| CN113484653A (en) * | 2021-08-23 | 2021-10-08 | 珠海格力电器股份有限公司 | Circuit interface test system |
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2015
- 2015-11-27 CN CN201521007300.9U patent/CN205246754U/en active Active
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106291089A (en) * | 2016-07-27 | 2017-01-04 | 宁波三星医疗电气股份有限公司 | A kind of intelligent electric energy meter falls zero line detection method |
| CN106291089B (en) * | 2016-07-27 | 2019-04-12 | 宁波三星医疗电气股份有限公司 | A kind of intelligent electric energy meter falls zero curve detection method |
| CN106291091A (en) * | 2016-07-29 | 2017-01-04 | 门丫 | A kind of can fire monitoring control sale of electricity one-way charge Intelligent type ammeter |
| CN107064587A (en) * | 2016-12-13 | 2017-08-18 | 浙江恒业电子有限公司 | A kind of electric energy meter circuit |
| CN108594011A (en) * | 2018-05-08 | 2018-09-28 | 浙江正泰仪器仪表有限责任公司 | The sample circuit of electronic electric energy meter |
| CN111413541A (en) * | 2020-04-22 | 2020-07-14 | 上海国泉科技有限公司 | Metering circuit of ammeter and ammeter |
| CN113484653A (en) * | 2021-08-23 | 2021-10-08 | 珠海格力电器股份有限公司 | Circuit interface test system |
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