CN205177822U - Sensor packaging structure - Google Patents
Sensor packaging structure Download PDFInfo
- Publication number
- CN205177822U CN205177822U CN201520999986.8U CN201520999986U CN205177822U CN 205177822 U CN205177822 U CN 205177822U CN 201520999986 U CN201520999986 U CN 201520999986U CN 205177822 U CN205177822 U CN 205177822U
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- Prior art keywords
- chip
- circuit
- circuit structure
- substrate
- baffle
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Abstract
The utility model discloses a sensor packaging structure, sensor packaging structure include protection shield, circuit structure and filling structure. Circuit structure's front is connected with the first surface of protection shield to the second surface of protection shield is the sensing function surface, filling structure is located circuit structure's periphery side, is connected with the first surface of protection shield. Circuit structure includes chip and base plate, chip and base plate back -to -back connection, and the front of chip is located circuit structure's front to be provided with the functional circuit, the front of base plate is located circuit structure's the back, and is provided with the pad, and pad and the positive functional circuit electric connection of chip. The utility model discloses a sensor packaging structure, the use protection shield can play effectual guard action to the functional circuit of sensor as the protective layer of functional circuit, simultaneously, at first is connected the protection shield with circuit structure, avoids the tolerance accumulation, has improved the manufacturing accuracy of protective layer.
Description
Technical field
The utility model relates to manufacture and the encapsulation technology field of sensor-packaging structure.
Background technology
The functional circuit (sensitive face) of transducer may face harsh environment for use, needs outstanding protective layer to come implementation structure protection, chemoproection and electrostatic protection.
Encapsulating structure common in prior art is plastic package structure; comprise substrate, chip and filling part; the functional circuit of chip is positioned at the side of chip away from substrate; functional circuit is electrically connected with pad by routing and substrate internal wiring; whole chip is wrapped in wherein by filling part; the functional circuit of chip relies on the filling part on its surface as protective layer for it provides protection; made by the plastics that protective layer stone hardness is not high; this encapsulation technology is used for sensor chip encapsulation, can not the functional circuit of available protecting sensor chip.
In the manufacturing technology field of sensor-packaging structure, tolerance depends on assembling sequence, more backward easilier causes precision not high because of tolerance stack.In the manufacture process of existing encapsulating structure; away from a side surface of functional circuit and baseplate-laminating by chip; then chip and substrate are put into injection molding machine mould filling portion; because the filling part serving as protective layer finally manufactures; so the tolerance that substrate and chip exist all can be accumulated on the protection layer, cause the protective layer accuracy of manufacture not high.
At present not a kind of structure being applied to sensor package, the functional circuit of available protecting transducer can keep again the higher protective layer accuracy of manufacture.
Utility model content
The purpose of this utility model is to provide a kind of high accuracy of manufacture, can protect the encapsulating structure in the functional circuit face of sensor chip better.
For realizing above-mentioned utility model object, the utility model adopts following technical scheme:
A kind of sensor-packaging structure, described sensor-packaging structure comprises baffle, circuit structure and interstitital texture, and the front of described circuit structure is connected with the first surface of described baffle, with the second surface of described baffle for sensing function surface; Described interstitital texture is positioned at the outer circumferential side of circuit structure, is connected with the first surface of described baffle.
Further, described interstitital texture and described baffle form the receiving space of a side opening, and described circuit structure is positioned at described receiving space, and the back side of described circuit structure is exposed to receiving space opening part.
As the technical scheme that the utility model improves further, described circuit structure comprises chip and substrate, and chip is connected with substrate is back-to-back, and the front of described chip is positioned at the front of described circuit structure, and is provided with functional circuit; The front of described substrate is positioned at the back side of described circuit structure, and is provided with pad.
As the technical scheme that the utility model improves further, the functional circuit of described chip front side and the pad of described substrate back are electrically connected.
As the technical scheme that the utility model improves further, the size and dimension of described substrate conforms to the size and dimension of described chip.
As the technical scheme that the utility model improves further, the size and dimension of described substrate and the size and dimension of described chip inconsistent.
Relative to prior art, technique effect of the present utility model is:
Sensor-packaging structure of the present utility model, uses baffle as the protective layer of functional circuit, can play effective protective effect to the functional circuit of transducer; simultaneously; the operation be connected with circuit structure by baffle in advance, can be avoided tolerance stack, keep the higher accuracy of manufacture.
Accompanying drawing explanation
Fig. 1 is the sectional structure schematic diagram of the sensor-packaging structure that the utility model embodiment one provides;
Fig. 2 is the sectional structure schematic diagram of the sensor-packaging structure that the utility model embodiment two provides;
Fig. 3 is the sectional structure schematic diagram of the sensor-packaging structure that the utility model embodiment three provides;
Fig. 4 is the schematic diagram one that in the utility model, functional circuit and pad are electrically connected mode;
Fig. 5 is the schematic diagram two that in the utility model, functional circuit and pad are electrically connected mode;
Fig. 6 is the schematic flow sheet of sensor-packaging structure preparation method provided by the utility model;
Fig. 7 is the schematic diagram of sensor-packaging structure preparation method provided by the utility model.
Embodiment
Below with reference to embodiment shown in the drawings, the utility model is described in detail.But these execution modes do not limit the utility model, the structure that those of ordinary skill in the art makes according to these execution modes, method or conversion functionally are all included in protection range of the present utility model.
The back side of the utility model chips is defined as after chip and substrate combine, the side chip surface contacted with each other with substrate, and the front of chip is defined as after chip and substrate combine, the opposite side chip surface relative with chip back; In the utility model, the back side of substrate is defined as after chip and substrate combine, the side substrate surface contacted with each other with chip, and the front of substrate is defined as after chip and substrate combine, the opposite side substrate surface relative with substrate back.
In each embodiment, same or analogous structure have employed identical label.
Embodiment one
Refer to Fig. 1, the utility model provides a kind of sensor-packaging structure, described sensor-packaging structure comprises baffle 1, circuit structure 2 and interstitital texture 3, the front of circuit structure 2 is connected with the first surface of described baffle 1, with the second surface of described baffle 1 (baffle relative opposite side surface parallel with first surface) for sensing function surface, interstitital texture 3 is positioned at the outer circumferential side of circuit structure 2, be connected with the first surface of described baffle 1, and interstitital texture 3 and baffle 1 form the receiving space of a side opening, circuit structure 2 is positioned at described receiving space, the back side of circuit structure 2 is exposed to receiving space opening part.
Circuit structure 2 comprises chip 23 and substrate 24 and chip 23 is connected with described substrate 24 is back-to-back, and the front of chip 23 is positioned at the front of described circuit structure, and is provided with functional circuit 11; The front of substrate 24 is positioned at the back side of described circuit structure 2, and is provided with pad 22, and pad 22 is electrically connected with the functional circuit 11 in described chip 23 front.
General; baffle 1 is made by the highlighted material of hard in the prior art; such as glass, sapphire, crystal, pottery etc., the functional circuit 11 being arranged at chip 23 front utilizes baffle 1 as protective layer, by means of baffle 1 for functional circuit provides reliable protection.
In the present embodiment, the cross-sectional width D1 of substrate 24 is greater than the cross-sectional width D2 of chip 23.
Further, the back side of substrate 24 and the back side of chip 23 can directly be fitted and connected, and substrate 24 is also directly grown in the back side of chip 23 by addition process.
Refer to Fig. 4, the functional circuit 11 in chip 23 front can be electrically connected by wire bond mode (wire bond mode is prior art) with the pad 22 being arranged at substrate 24 front.
Refer to Fig. 5, the functional circuit 11 in chip 23 front also can be electrically connected by silicon through hole mode (silicon through hole mode is prior art) with the pad 22 being arranged at substrate 24 front.
It should be noted herein, pad 22 is not limited to the above-mentioned two kinds of modes enumerated with the electric connection mode of chip 23 positive function circuit 11, such as BGA (welded ball array encapsulation) mode, or the compound mode etc. of various method can realize the prior art that pad 22 and chip 23 positive function circuit 11 be electrically connected and all should be included.
Refer to Fig. 6, the utility model additionally provides a kind of preparation method of sensor-packaging structure, comprises the following steps successively:
S1, by chip and the back-to-back combination of substrate, and the functional circuit being arranged at chip front side and the pad being arranged at substrate front side to be electrically connected, to obtain circuit structure;
S2, the front of one or more described circuit structure is attached to the first surface of baffle;
S3, along circuit structure outer circumferential side injection moulding formed interstitital texture, interstitital texture is attached to the first surface of baffle simultaneously;
S4, in units of circuit structure, split interstitital texture and baffle.
Refer to Fig. 7; after the front of multiple circuit structure 2 is fitted in the first surface of baffle 1; outer circumferential side injection moulding along circuit structure 2 forms interstitital texture 3; interstitital texture 3 is attached to the first surface of baffle 1 simultaneously, finally in units of circuit structure 2, splits interstitital texture 2 and baffle 1 along cut-off rule 13.The chip 23 of circuit structure 2 is connected with substrate 24 herein, and pad 22 is electrically connected with the functional circuit 11 of chip front side.
Further, specific in step S1, the back side of substrate 24 is combined by the mode of directly fitting with the back side of chip 23, and meanwhile, the back side of substrate 24 also can be directly grown in the back side of chip 23 by addition process.
Refer to Fig. 4, the functional circuit 11 in chip 23 front can be electrically connected by wire bond mode (wire bond mode is prior art) with the pad 22 being arranged at substrate 24 front.
Refer to Fig. 5, the functional circuit 11 in chip 23 front also can be electrically connected by silicon through hole mode (silicon through hole mode is prior art) with the pad 22 being arranged at substrate 24 front.
It should be noted herein, pad 22 is not limited to the above-mentioned two kinds of modes enumerated with the electric connection mode of chip 23 positive function circuit 11, such as BGA (welded ball array encapsulation) mode, or the compound mode etc. of various method can realize the prior art that pad 22 and chip 23 positive function circuit 11 be electrically connected and all should be included.
Sensor-packaging structure of the present utility model; use baffle as the protective layer of functional circuit; effective protective effect can be played to the functional circuit of transducer; simultaneously; in preparation method using the operation that is connected with circuit structure as the baffle of functional circuit protective layer in advance; can tolerance stack be avoided, keep the higher accuracy of manufacture.
Embodiment two
Refer to Fig. 2, the utility model provides a kind of sensor-packaging structure, described sensor-packaging structure comprises baffle 1, circuit structure 2 and interstitital texture 3, the front of circuit structure 2 is connected with the first surface of baffle 1, with the second surface of baffle 1 (baffle relative opposite side surface parallel with first surface) for sensing function surface, interstitital texture 3 is positioned at the outer circumferential side of circuit structure 2, be connected with the first surface of baffle 1, and interstitital texture 3 and baffle 1 form the receiving space of a side opening, circuit structure 2 is positioned at described receiving space, the back side of circuit structure 2 is exposed to receiving space opening part.
Circuit structure 2 comprises chip 23 and substrate 24 and chip 23 is connected with described substrate 24 is back-to-back, and the front of chip 23 is positioned at the front of circuit structure 2, and is provided with functional circuit 11; The front of substrate 24 is positioned at the back side of circuit structure 2, and is provided with pad 22, and pad 22 is electrically connected with the functional circuit 11 of chip 23.
General; baffle 1 is made by the highlighted material of hard in the prior art; such as glass, sapphire, crystal, pottery etc., the functional circuit 11 being arranged at chip 23 front utilizes baffle 1 as protective layer, by means of baffle 1 for functional circuit provides reliable protection.
In the present embodiment, the cross-sectional width D1 of substrate 24 equals the cross-sectional width D2 of chip 23.
The back side of substrate 24 and the back side of chip 23 can directly be fitted and connected, also by the back side of addition process direct growth and chip 23.
Refer to Fig. 4, the functional circuit 11 in chip 23 front can be electrically connected by wire bond mode (wire bond mode is prior art) with the pad 22 being arranged at substrate 24 front.
Refer to Fig. 5, the functional circuit 11 in chip 23 front also can be electrically connected by silicon through hole mode (silicon through hole mode is prior art) with the pad 22 being arranged at substrate 24 front.
It should be noted herein, pad 22 is not limited to the above-mentioned two kinds of modes enumerated with the electric connection mode of chip 23 positive function circuit 11, such as BGA (welded ball array encapsulation) mode, or the compound mode etc. of various method can realize the prior art that pad 22 and chip 23 positive function circuit 11 be electrically connected and all should be included.
Refer to Fig. 6, the utility model additionally provides a kind of preparation method of sensor-packaging structure, comprises the following steps successively:
S1, by chip and the back-to-back combination of substrate, and the functional circuit being arranged at chip front side and the pad being arranged at substrate front side to be electrically connected, to obtain circuit structure;
S2, the front of one or more described circuit structure is attached to the first surface of baffle;
S3, along circuit structure outer circumferential side injection moulding formed interstitital texture, interstitital texture is attached to the first surface of baffle simultaneously;
S4, in units of circuit structure, split interstitital texture and baffle.
Refer to Fig. 7; after the front of multiple circuit structure 2 is fitted in the first surface of baffle 1; outer circumferential side injection moulding along circuit structure 2 forms interstitital texture 3; interstitital texture 3 is attached to the first surface of baffle 1 simultaneously; last in units of circuit structure 2, split interstitital texture 2 and baffle 1 along cut-off rule 13.The chip 23 of circuit structure 2 is connected with substrate 24 herein, and pad 22 is electrically connected with the functional circuit 11 of chip front side.
Further, specific in step S1, the back side of substrate 24 is combined by the mode of directly fitting with the back side of chip 23, and meanwhile, the back side of substrate 24 also can be directly grown in the back side of chip 23 by addition process.
Refer to Fig. 4, the functional circuit 11 in chip 23 front can be electrically connected by wire bond mode (wire bond mode is prior art) with the pad 22 being arranged at substrate 24 front.
Refer to Fig. 5, the functional circuit 11 in chip 23 front also can be electrically connected by silicon through hole mode (silicon through hole mode is prior art) with the pad 22 being arranged at substrate 24 front.
It should be noted herein, pad 22 is not limited to the above-mentioned two kinds of modes enumerated with the electric connection mode of chip 23 positive function circuit 11, such as BGA (welded ball array encapsulation) mode, or the compound mode etc. of various method can realize the prior art that pad 22 and chip 23 positive function circuit 11 be electrically connected and all should be included.
Sensor-packaging structure of the present utility model; use baffle as the protective layer of functional circuit; effective protective effect can be played to the functional circuit of transducer; simultaneously; in preparation method using the operation that is connected with circuit structure as the baffle of functional circuit protective layer in advance; can tolerance stack be avoided, keep the higher accuracy of manufacture.
Embodiment three
Refer to Fig. 3, the utility model provides a kind of sensor-packaging structure, sensor-packaging structure comprises baffle 1, circuit structure 2 and interstitital texture 3, the front of circuit structure 2 is connected with the first surface of baffle 1, with the second surface of baffle 1 (baffle relative opposite side surface parallel with first surface) for sensing function surface, interstitital texture 3 is positioned at the outer circumferential side of circuit structure 2, be connected with the first surface of baffle 1, and interstitital texture 3 and baffle 1 form the receiving space of a side opening, circuit structure 2 is positioned at receiving space, the back side of circuit structure 2 is exposed to receiving space opening part.
Circuit structure 2 comprises chip 23 and substrate 24 and chip 23 is connected with substrate 24 is back-to-back, and the front of chip 23 is positioned at the front of circuit structure, and is provided with functional circuit 11; The front of substrate 24 is positioned at the back side of circuit structure 2, and is provided with pad 22, and pad 22 is electrically connected with the functional circuit 11 of described chip 23.
General; baffle 1 is made by the highlighted material of hard in the prior art; such as glass, sapphire, crystal, pottery etc., the functional circuit 11 being arranged at chip 23 front utilizes baffle 1 as protective layer, by means of baffle 1 for functional circuit provides reliable protection.
In the present embodiment, the cross-sectional width D1 of substrate 24 is less than the cross-sectional width D2 of chip 23.
The back side of substrate 24 and the back side of chip 23 can directly be fitted and connected, also by the back side of addition process direct growth and chip 23.
Refer to Fig. 4, the functional circuit 11 in chip 23 front can be electrically connected by wire bond mode (wire bond mode is prior art) with the pad 22 being arranged at substrate 24 front.
Refer to Fig. 5, the functional circuit 11 in chip 23 front also can be electrically connected by silicon through hole mode (silicon through hole mode is prior art) with the pad 22 being arranged at substrate 24 front.
It should be noted herein, pad 22 is not limited to the above-mentioned two kinds of modes enumerated with the electric connection mode of chip 23 positive function circuit 11, such as BGA (welded ball array encapsulation) mode, or the compound mode etc. of various method can realize the prior art that pad 22 and chip 23 positive function circuit 11 be electrically connected and all should be included.
Refer to Fig. 6, the utility model additionally provides a kind of preparation method of sensor-packaging structure, comprises the following steps successively:
S1, by chip and the back-to-back combination of substrate, and the functional circuit being arranged at chip front side and the pad being arranged at substrate front side to be electrically connected, to obtain circuit structure;
S2, the front of one or more described circuit structure is attached to the first surface of baffle;
S3, along circuit structure outer circumferential side injection moulding formed interstitital texture, interstitital texture is attached to the first surface of baffle simultaneously;
S4, in units of circuit structure, split interstitital texture and baffle.
Refer to Fig. 7; after the front of multiple circuit structure 2 is fitted in the first surface of baffle 1; outer circumferential side injection moulding along circuit structure 2 forms interstitital texture 3; interstitital texture 3 is attached to the first surface of baffle 1 simultaneously, finally in units of circuit structure 2, splits interstitital texture 2 and baffle 1 along cut-off rule 13.The chip 23 of circuit structure 2 is connected with substrate 24 herein, and pad 22 is electrically connected with the functional circuit 11 of chip front side.
Further, specific in step S1, the back side of substrate 24 is combined by the mode of directly fitting with the back side of chip 23, and meanwhile, the back side of substrate 24 also can be directly grown in the back side of chip 23 by addition process.
Refer to Fig. 4, the functional circuit 11 in chip 23 front can be electrically connected by wire bond mode (wire bond mode is prior art) with the pad 22 being arranged at substrate 24 front.
Refer to Fig. 5, the functional circuit 11 in chip 23 front also can be electrically connected by silicon through hole mode (silicon through hole mode is prior art) with the pad 22 being arranged at substrate 24 front.
It should be noted herein, pad 22 is not limited to the above-mentioned two kinds of modes enumerated with the electric connection mode of chip 23 positive function circuit 11, such as BGA (welded ball array encapsulation) mode, or the compound mode etc. of various method can realize the prior art that pad 22 and chip 23 positive function circuit 11 be electrically connected and all should be included.
Sensor-packaging structure of the present utility model; use baffle as the protective layer of functional circuit; effective protective effect can be played to the functional circuit of transducer; simultaneously; in preparation method using the operation that is connected with circuit structure as the baffle of functional circuit protective layer in advance; can tolerance stack be avoided, keep the higher accuracy of manufacture.
To those skilled in the art, obvious the utility model is not limited to the details of above-mentioned one exemplary embodiment, and when not deviating from spirit of the present utility model or essential characteristic, can realize the utility model in other specific forms.Therefore, no matter from which point, all should embodiment be regarded as exemplary, and be nonrestrictive, scope of the present utility model is limited by claims instead of above-mentioned explanation, and all changes be therefore intended in the implication of the equivalency by dropping on claim and scope are included in the utility model.Any Reference numeral in claim should be considered as the claim involved by limiting.
In addition, be to be understood that, although this specification is described according to execution mode, but not each execution mode only comprises an independently technical scheme, this narrating mode of specification is only for clarity sake, those skilled in the art should by specification integrally, and the technical scheme in each embodiment also through appropriately combined, can form other execution modes that it will be appreciated by those skilled in the art that.
Claims (6)
1. a sensor-packaging structure, described sensor-packaging structure comprises baffle, circuit structure and interstitital texture, it is characterized in that, the front of described circuit structure is connected with described baffle first surface, with described baffle second surface for sensing function surface;
Described interstitital texture is positioned at the outer circumferential side of circuit structure, is connected with described baffle first surface.
2. a kind of sensor-packaging structure according to claim 1; it is characterized in that; described interstitital texture and described baffle form the receiving space of a side opening, and described circuit structure is positioned at described receiving space, and the described circuit structure back side is exposed to receiving space opening part.
3. a kind of sensor-packaging structure according to claim 1, is characterized in that, described circuit structure comprises chip and substrate, and described chip is connected with described substrate is back-to-back,
The front of described chip is positioned at the front of described circuit structure, and is provided with functional circuit;
The front of described substrate is positioned at the back side of described circuit structure, and is provided with pad.
4. a kind of sensor-packaging structure according to claim 3, is characterized in that, described functional circuit and described pad are electrically connected.
5. a kind of sensor-packaging structure according to claim 3, is characterized in that, the size and dimension of described substrate conforms to the size and dimension of described chip.
6. a kind of sensor-packaging structure according to claim 3, is characterized in that, the size and dimension of described substrate and the size and dimension of described chip inconsistent.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520999986.8U CN205177822U (en) | 2015-12-04 | 2015-12-04 | Sensor packaging structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520999986.8U CN205177822U (en) | 2015-12-04 | 2015-12-04 | Sensor packaging structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205177822U true CN205177822U (en) | 2016-04-20 |
Family
ID=55741772
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520999986.8U Withdrawn - After Issue CN205177822U (en) | 2015-12-04 | 2015-12-04 | Sensor packaging structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205177822U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105489588A (en) * | 2015-12-04 | 2016-04-13 | 苏州迈瑞微电子有限公司 | Sensor package structure and preparation method thereof |
-
2015
- 2015-12-04 CN CN201520999986.8U patent/CN205177822U/en not_active Withdrawn - After Issue
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105489588A (en) * | 2015-12-04 | 2016-04-13 | 苏州迈瑞微电子有限公司 | Sensor package structure and preparation method thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20160420 Effective date of abandoning: 20190531 |
|
| AV01 | Patent right actively abandoned | ||
| IP01 | Partial invalidation of patent right |
Commission number: 5W113303 Conclusion of examination: The utility model patent right of 2015209986.8 is declared partially invalid, and the patent right of this patent is maintained on the basis of the claim submitted by the patentee on December 06, 2017. Decision date of declaring invalidation: 20180605 Decision number of declaring invalidation: 36161 Denomination of utility model: Photo-sensor packaging structure Granted publication date: 20160420 Patentee: SUZHOU MAIRUI MICROELECTRONIC CO., LTD. |
|
| IP01 | Partial invalidation of patent right |