CN205176784U - A shutdown circuit for additional industrial computer mainboard of intelligence - Google Patents
A shutdown circuit for additional industrial computer mainboard of intelligence Download PDFInfo
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- CN205176784U CN205176784U CN201520863096.4U CN201520863096U CN205176784U CN 205176784 U CN205176784 U CN 205176784U CN 201520863096 U CN201520863096 U CN 201520863096U CN 205176784 U CN205176784 U CN 205176784U
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- 230000001502 supplementing effect Effects 0.000 claims description 6
- 239000013589 supplement Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
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- 238000005516 engineering process Methods 0.000 description 1
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Abstract
The utility model discloses a shutdown circuit for additional industrial computer mainboard of intelligence, it includes the main control chip circuit. The cause be provided with the power discharge circuit that is used for controlling mainboard and power on the main control chip circuit, when off signal end output low level, through resistance R1, the time delay of electric capacity C1, drive transistor Q1 ends, and then MOS pipe Q2, MOS manages Q3, the MOS pipe Q4 switch on, power + 12V discharges to GND through resistance R4, power VCC discharges to GND through resistance R5, power VCC3 discharges to GND through resistance R6, the sequential requirement of power supply lost has been guaranteed, reach the mesh of normal shutdown, realized improving same industrial computer mainboard can be simultaneously to the efficiency of various different power module's compatibility.
Description
Ji Intraoperative field
The utility model relates to a kind of shutdown circuit supplementing industrial computer mainboard for intelligence for industrial computer aspect of performance.
Bei Jing Ji Intraoperative
Along with society's constantly progressive and development, along with the requirement constantly progress forward of sci-tech product, meanwhile, also along with more and more higher to the performance requirement of industrial computer.The application of existing industrial computer mainboard gets more and more, supporting power module producer is also more and more, different manufacturers, the design of the power module of different capacity has not identical, the problem of not starting shooting after the power module module that industrial computer mainboard is arranged in pairs or groups different can run into shutdown often, analyzes that reason is most to be caused due to the abnormal shutdown of industrial computer mainboard; The compatibility required with industrial computer mainboard well deviates from mutually.
Utility model content
In view of this, the technical problems to be solved in the utility model be to provide a kind of improve same industrial computer mainboard can simultaneously to the shutdown circuit supplementing industrial computer mainboard for intelligence of the compatibility of various different electrical power module.
The utility model solves the problems of the technologies described above adopted a kind of shutdown circuit supplementing industrial computer mainboard for intelligence, and it comprises main control chip circuit, described main control chip circuit is provided with the corona discharge circuit for controlling mainboard and power supply; This corona discharge circuit comprises off signal end, transistor Q1, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4, commutator tube D1, and resistance R1 is to resistance R6, and electric capacity C1; Described resistance R1 is connected on off signal end; Electric capacity C1 and transistor Q1 is connected to the resistance R1 other end jointly, electric capacity C1 other end ground connection; Transistor Q1 base terminal is connected with electric capacity C1, transistor Q1 emitter terminal ground connection, and described resistance R2 and resistance R3 is connected to collector terminal jointly; Resistance R2 and resistance R3 is connected in parallel, resistance R3 other end ground connection, and the resistance R2 other end is connected with commutator tube D1, and the commutator tube D1 other end is connected with voltage end; Metal-oxide-semiconductor Q2 pin 1 end, metal-oxide-semiconductor Q3 pin 1 end, metal-oxide-semiconductor Q4 pin 1 end connects jointly, and is connected to resistance R2 and resistance R3 common connection end place; Metal-oxide-semiconductor Q4 pin 2 end ground connection, resistance R6 is connected with metal-oxide-semiconductor Q4 pin 3 end, and the resistance R6 other end is held with VCC and is connected; Metal-oxide-semiconductor Q3 pin 2 end ground connection, resistance R5 is connected with metal-oxide-semiconductor Q3 pin 3 end, and the resistance R5 other end is held with VCC and is connected; Metal-oxide-semiconductor Q2 pin 2 end ground connection, resistance R4 is connected with metal-oxide-semiconductor Q3 pin 3 end, and the resistance R4 other end is held with VCC and is connected; When off signal end output low level, by resistance R1, electric capacity C1 time delay, driving transistors Q1 ends, and then metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4 conducting, power supply+12V discharges into GND by resistance R4, power supply VCC discharges into GND by resistance R5, and power supply VCC3 discharges into GND by resistance R6.
According to above-mentioned technical characteristics, described main control chip circuit comprises chip U1, resistance R7, electric capacity C2, electric capacity C2, off signal end SLPS3#, power end VCC; Described power end VCC is connected on chip U1, and described electric capacity C2 is connected on power end VCC, described electric capacity C2 other end ground connection; Described resistance R7 one end is connected on chip U1, and the resistance R7 other end is on electric capacity C2 one end; Described electric capacity C3 one end is connected on resistance R7 one end, electric capacity C3 other end ground connection.
The beneficial effects of the utility model: because described main control chip circuit being provided with the corona discharge circuit for controlling mainboard and power supply, when off signal end output low level, by resistance R1, electric capacity C1 time delay, driving transistors Q1 ends, and then metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4 conducting, power supply+12V discharges into GND by resistance R4, power supply VCC discharges into GND by resistance R5, power supply VCC3 discharges into GND by resistance R6, ensure that the requirement of power supply power-fail sequential, reach the object of normal shutdown, achieving the same industrial computer mainboard of raising can simultaneously to effect of the compatibility of various different electrical power module.
Below in conjunction with drawings and Examples, the technical solution of the utility model is described in further detail.
Accompanying drawing explanation
Fig. 1 is the block diagram of the shutdown circuit supplementing industrial computer mainboard in the utility model for intelligence;
Fig. 2 is the circuit diagram of main control chip circuit in the utility model;
Fig. 3 is the circuit diagram of corona discharge circuit in the utility model.
Embodiment
In order to make technical problem to be solved in the utility model, technical scheme and beneficial effect clearly, understand, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
Please refer to shown in Fig. 1 to Fig. 3, below in conjunction with embodiment, a kind of shutdown circuit supplementing industrial computer mainboard for intelligence is described, it comprises main control chip circuit, and corona discharge circuit.Described corona discharge circuit is connected to main control chip circuit input end.
Described corona discharge circuit comprises off signal end, transistor Q1, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4, commutator tube D1, and resistance R1 is to resistance R6, and electric capacity C1; Described resistance R1 is connected on off signal end; Electric capacity C1 and transistor Q1 is connected to the resistance R1 other end jointly, electric capacity C1 other end ground connection; Transistor Q1 base terminal is connected with electric capacity C1, transistor Q1 emitter terminal ground connection, and described resistance R2 and resistance R3 is connected to collector terminal jointly; Resistance R2 and resistance R3 is connected in parallel, resistance R3 other end ground connection, and the resistance R2 other end is connected with commutator tube D1, and the commutator tube D1 other end is connected with voltage end; Metal-oxide-semiconductor Q2 pin 1 end, metal-oxide-semiconductor Q3 pin 1 end, metal-oxide-semiconductor Q4 pin 1 end connects jointly, and is connected to resistance R2 and resistance R3 common connection end place; Metal-oxide-semiconductor Q4 pin 2 end ground connection, resistance R6 is connected with metal-oxide-semiconductor Q4 pin 3 end, and the resistance R6 other end is held with VCC and is connected; Metal-oxide-semiconductor Q3 pin 2 end ground connection, resistance R5 is connected with metal-oxide-semiconductor Q3 pin 3 end, and the resistance R5 other end is held with VCC and is connected; Metal-oxide-semiconductor Q2 pin 2 end ground connection, resistance R4 is connected with metal-oxide-semiconductor Q3 pin 3 end, and the resistance R4 other end is held with VCC and is connected; When off signal end output low level, by resistance R1, electric capacity C1 time delay, driving transistors Q1 ends, and then metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4 conducting, power supply+12V discharges into GND by resistance R4, power supply VCC discharges into GND by resistance R5, and power supply VCC3 discharges into GND by resistance R6.
Described main control chip circuit comprises chip U1, resistance R7, electric capacity C2, electric capacity C2, off signal end SLPS3#, power end VCC; Described power end VCC is connected on chip U1, and described electric capacity C2 is connected on power end VCC, described electric capacity C2 other end ground connection; Described resistance R7 one end is connected on chip U1, and the resistance R7 other end is on electric capacity C2 one end; Described electric capacity C3 one end is connected on resistance R7 one end, electric capacity C3 other end ground connection.
In sum, because described main control chip circuit being provided with the corona discharge circuit for controlling mainboard and power supply, when off signal end output low level, by resistance R1, electric capacity C1 time delay, driving transistors Q1 ends, and then metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4 conducting, power supply+12V discharges into GND by resistance R4, power supply VCC discharges into GND by resistance R5, power supply VCC3 discharges into GND by resistance R6, ensure that the requirement of power supply power-fail sequential, reach the object of normal shutdown, achieving the same industrial computer mainboard of raising can simultaneously to effect of the compatibility of various different electrical power module.
Above with reference to the accompanying drawings of preferred embodiment of the present utility model, not thereby limit to interest field of the present utility model.Those skilled in the art do not depart from any amendment done in scope of the present utility model and essence, equivalent replacement and improvement, all should within interest field of the present utility model.
Claims (2)
1. supplement a shutdown circuit for industrial computer mainboard for intelligence, it comprises main control chip circuit, it is characterized in that: described main control chip circuit is provided with the corona discharge circuit shut down for controlling mainboard and power supply; This corona discharge circuit comprises off signal end, transistor Q1, metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4, commutator tube D1, and resistance R1 is to resistance R6, and electric capacity C1; Described resistance R1 is connected on off signal end; Electric capacity C1 and transistor Q1 is connected to the resistance R1 other end jointly, electric capacity C1 other end ground connection; Transistor Q1 base terminal is connected with electric capacity C1, transistor Q1 emitter terminal ground connection, and described resistance R2 and resistance R3 is connected to collector terminal jointly; Resistance R2 and resistance R3 is connected in parallel, resistance R3 other end ground connection, and the resistance R2 other end is connected with commutator tube D1, and the commutator tube D1 other end is connected with voltage end; Metal-oxide-semiconductor Q2 pin 1 end, metal-oxide-semiconductor Q3 pin 1 end, metal-oxide-semiconductor Q4 pin 1 end connects jointly, and is connected to resistance R2 and resistance R3 common connection end place; Metal-oxide-semiconductor Q4 pin 2 end ground connection, resistance R6 is connected with metal-oxide-semiconductor Q4 pin 3 end, and the resistance R6 other end is held with VCC and is connected; Metal-oxide-semiconductor Q3 pin 2 end ground connection, resistance R5 is connected with metal-oxide-semiconductor Q3 pin 3 end, and the resistance R5 other end is held with VCC and is connected; Metal-oxide-semiconductor Q2 pin 2 end ground connection, resistance R4 is connected with metal-oxide-semiconductor Q3 pin 3 end, and the resistance R4 other end is held with VCC and is connected; When off signal end output low level, by resistance R1, electric capacity C1 time delay, driving transistors Q1 ends, and then metal-oxide-semiconductor Q2, metal-oxide-semiconductor Q3, metal-oxide-semiconductor Q4 conducting, power supply+12V discharges into GND by resistance R4, power supply VCC discharges into GND by resistance R5, and power supply VCC3 discharges into GND by resistance R6.
2. the shutdown circuit supplementing industrial computer mainboard for intelligence according to claim 1, is characterized in that: described main control chip circuit comprises chip U1, resistance R7, electric capacity C2, electric capacity C2, off signal end SLPS3#, power end VCC; Described power end VCC is connected on chip U1, and described electric capacity C2 is connected on power end VCC, described electric capacity C2 other end ground connection; Described resistance R7 one end is connected on chip U1, and the resistance R7 other end is on electric capacity C2 one end; Described electric capacity C3 one end is connected on resistance R7 one end, electric capacity C3 other end ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520863096.4U CN205176784U (en) | 2015-11-02 | 2015-11-02 | A shutdown circuit for additional industrial computer mainboard of intelligence |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520863096.4U CN205176784U (en) | 2015-11-02 | 2015-11-02 | A shutdown circuit for additional industrial computer mainboard of intelligence |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205176784U true CN205176784U (en) | 2016-04-20 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520863096.4U Expired - Fee Related CN205176784U (en) | 2015-11-02 | 2015-11-02 | A shutdown circuit for additional industrial computer mainboard of intelligence |
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| CN (1) | CN205176784U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI631457B (en) * | 2017-06-26 | 2018-08-01 | 緯創資通股份有限公司 | Power discharge control device, circuit and method using the same |
-
2015
- 2015-11-02 CN CN201520863096.4U patent/CN205176784U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI631457B (en) * | 2017-06-26 | 2018-08-01 | 緯創資通股份有限公司 | Power discharge control device, circuit and method using the same |
| US10698466B2 (en) | 2017-06-26 | 2020-06-30 | Wistron Corporation | Power discharge control device, circuit and method using the same |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160420 |