CN2051761U

CN2051761U - Multi-channel digital circuit remote controlling device

Info

Publication number: CN2051761U
Application number: CN 89205065
Authority: CN
Inventors: 刘建中; 谭雨孙
Original assignee: Individual
Current assignee: Individual
Priority date: 1989-05-09
Filing date: 1989-05-09
Publication date: 1990-01-24

Abstract

The utility model relates to a multi-channel digital circuit remote control device, mainly comprising a pulse generator and a digital circuit decoder, wherein, the decoder circuit comprises a counting clock element circuit, a synchronous element circuit, a self locking element circuit, a bistable element circuit, a priority element circuit, etc. The utility model overcomes the disadvantage that a traditional frequency division method is difficult to realize the multiple channels. The utility model can be provided with ten channels, and the channel capacity is strong; the working performance is stable, and the control for the channels is random without interference. The decoder circuit can be widely used for various remote control devices, such as a wireless remote control device, a wired control device, an infrared control device, etc. The craft production is simple, which is convenient for the industrial production; the operation is convenient and flexible, and the manufacture cost is low.

Description

Multi-channel digital circuit remote controlling device

The utility model relates to a kind of multi-channel digital circuit telechiric device, belong to the electronic engineering technical field.

Prior art, the passage telechiric device all adopts the electronic simulation circuit, sends into the modulators modulate carrier wave successively, employing be the frequency division method.Be that the different button of transmitting terminal control removes to modulate different audio frequencies.Common have resonant relay frequency-selecting multi-channel remote and a LC frequency-selecting multi-channel remote.Adopting its major defect of multi-channel system of single-frequency electronic simulation circuit frequency division mode is to satisfy the very big occasion of controlling object amount.Because a large amount of command signals, not only required number of elements is too big, and also is difficult to the too big audio instructions of quantity allotted in voiced band.

The purpose of this utility model is at above-mentioned existing problems, proposes a kind of multi-channel digital circuit telechiric device of realizing multi-channel remote in the digital circuit mode.

Technical solution of the present utility model: it mainly is made up of pulse signal generator and decoder circuit two parts.See shown in the accompanying drawing 1,2.Dual time base circuit CH7556 is arranged in the pulse signal generator.CH7556 has two circuit of base " 555 " when single, and wherein multivibrator, composition monostable circuit such as " 555 " (2) etc.s are formed in " 555 " (1) etc.Capacitor C 1-10 and resistance R 1, R2 form 10 kinds of oscillation frequency fi(fi=1.44/ ((R ₁+ 2R ₂) Ci)).K1-10 is a job key, and it makes " 555 " (1) send one group of train of impulses of 1.1 seconds, and different job keys produces the train of impulses of different pulse frequency.If adopt wireless remote control then just to remove to modulate 28MHZ high frequency carrier L1, to the spatial emission electromagnetic wave with this train of impulses.If then directly remove to drive infrared transmitting tube with train of impulses with infrared remote control.The monostable circuit of being made up of " 555 " (2) etc. produces regularly 1.1 seconds pulse, T=1.1R3C11.Decoder circuit is made up of six element circuits, i.e. counting, clock, synchronous counting, priority, self-locking and bistable circuit.Counting circuit has the ten channel counts circuit that ten level Four binary counter CD4060 form by one.The monostable circuit that clock circuit is made up of " 555 " (1) in the dual time base CH7556 circuit; Synchronizing circuit adopts C4(electric capacity) R4(resistance) differentiating circuit, the clear circuit formed with door A and OR circuit B.Realization is counted, timing is synchronous.Priority circuit is formed with door (A1, A2) and 9 phase inverter F1 by 18, and its A1 is 2 inputs and door, and A2 is 3 inputs and door.Latching circuit is made up of R2C2 and " 555 " (2).5 seconds T=1.1R2C2 of timing

Bistable circuit is made up of 10 double D trigger CD4013.Their principle of work division is as follows:

(1) counter circuit, it is by 10 Q output terminals (Q4, Q5 ... Q14).Accept mode such as wireless, infrared and transmit the signal that comes, obtain a completely train of impulses of the train of impulses same frequency that sends with pulse producer of amplitude, be imported into counter again through processing such as amplification.They are counted under fixed time slicing, can identification pulse string frequency.

(2) clock circuit: form monostable by " 555 " (1) among the dual time base CH7556 etc., regularly (T=1.1R1C1=0.5S), it provides fixing gate time sheet to counter.

(3) synchronizing circuit: counting must be synchronously with timing, the 16th pulse arrival when train of impulses, Q4 go out " 1 " jump the edge on it positive differential during with clock " 555 " (1) " 0 " state " O " with, get a positive burst pulse, give counter O reset, begin counting.Simultaneously remove to trigger 0.5 second clock, pick up counting through paraphase.If the K10 key, f10=2, Q4 go out " 1 " needs 0.5 second (key that lock in time is the longest), needs 1 second altogether with counting synchronously, so burst length was got 1.1 seconds.

(4) priority circuit: because factors such as the discreteness of component parameter, temperature variation, the actual pulsed frequency f1 that obtains is slightly larger than f1, and f2 is slightly larger than f2 ... f10 is slightly larger than f10.When clock finished in such 0.5 second, counter generally can produce mantissa, promptly might bring out " 1 " by two or more Q, and misoperation takes place.Priority circuit keeps the highest Q end of " 1 ", at different levelsly completely seals following, prevents misoperation.

(5) latching circuit: clock finished in 0.5 second, clock output becomes " 0 " by " 1 ", the differential paraphase produces a positive burst pulse, if it cries K pulse, the highest Q end of K pulse and the priority that goes out " 1 " with, obtain the CPi pulse, trigger the bistable state upset, K pulse pulsewidth T ≈ 0.7R3C3 ≈ 1ms.After the K pulse, the train of impulses of input does not stop, and the remainder of this train of impulses may make Q4 go out " 1 " its upper edge differential and trigger clock for the second time, sets up second decoding cycle, and remainder is counted, and produces mistake.Latching circuit designs at this problem just.Trigger " 555 " (2) monostable with the K pulse back edge, regularly 5 seconds, T=1.1R2C2 forced the counter reset state, has promptly also sealed the train of impulses remainder.

(6) bistable circuit: 0 d type flip flop constitutes 10 bistable states, and CP1～CP10 impulse transfer is become corresponding ON/OFF amount P1～P10 output, and CARA connects moment at power supply VCC and rises the bistable state reset response.ON/OFF amount Pi can be used as the drive signal of relay, controllable silicon, transistor etc., realizes the control to many controlling object.As pressing the Ki key for the first time, Pi goes out " 1 ", presses this key Pi for the second time and goes out " 0 ".

Multi-channel digital circuit decoding device in the utility model is of many uses, and its input end can receive the signal from mode such as wireless, wired, infrared, and output terminal is joined peripheral hardware can realize various remote controls.The utility model explained hereafter flow process is simple, and low cost of manufacture can be produced in batches on commercial production.

Accompanying drawing 1 is the pulse-generator circuit schematic diagram, and the dotted portion among the figure is the auxiliary circuit when adopting wireless remote control.

Accompanying drawing 2 is decoder circuit schematic diagrams of the present utility model.

Claims

1, a kind of multi-channel digital circuit telechiric device of mainly forming by pulse signal generator and multi-channel digital circuit decoding device, it is characterized in that multi-channel digital circuit decoding device is by counting circuit, clock and synchronizing circuit, priority circuit, latching circuit and bistable circuit are formed, the contact of its each circuit is as follows, can produce 10 kinds of its geometric ratios of frequency is 2, the length of train of impulses is 1.1 seconds pulse signal generator, the train of impulses that amplifies at receiving end enters binary counter circuit, make Q4 go out " 1 " and start synchronizing circuit, promptly beginning counter O reset simultaneously and starting regularly is 0.5 second counting clock circuit, when finishing, clock circuit produces a burst pulse K goes out " 1 " with counting circuit highest Qi end and generation cpi pulse, bistable circuit upset output Pi, the highest Qi that priority circuit is used " 1 " holds effectively, and all the other each Q end shields, latching circuit is to trigger monostable " 555 " (2) with the back edge of K pulse, regularly forces counter reset after 5 seconds.

2, multi-channel digital circuit telechiric device according to claim 1, the counting circuit that it is characterized in that forming in the multi-channel digital circuit decoding device is to adopt to have the ten channel counts circuit that ten level Four binary countings (CD4060) are formed.

3, multi-channel digital circuit telechiric device according to claim 1, the clock circuit that it is characterized in that forming in the multi-channel digital circuit decoding device is to adopt the monostable circuit of being made up of " 555 " (1) in dual time base (CH7556) circuit.

4, multi-channel digital circuit telechiric device according to claim 1 is characterized in that forming that synchronizing circuit in the multi-channel digital circuit decoding device adopts the C4.R4 differentiating circuit, the clear circuit formed with door A and OR circuit B is formed.

5, multi-channel digital circuit telechiric device according to claim 1, the priority circuit employing that it is characterized in that forming in the multi-channel digital circuit decoding device is formed with door (A1, A2) and 9 phase inverter F1 by 18.

6, multi-channel digital circuit telechiric device according to claim 1, the latching circuit that it is characterized in that forming in the multi-channel digital circuit decoding device is made up of R2, C2 and " 555 " (2), and it regularly is 5 seconds.

7, multi-channel digital circuit telechiric device according to claim 1, the bistable circuit that it is characterized in that forming in the multi-channel digital circuit decoding device is made up of 10 double D triggers (CD4013).