CN205070421U - Power source device - Google Patents

Power source device Download PDF

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Publication number
CN205070421U
CN205070421U CN201520768979.7U CN201520768979U CN205070421U CN 205070421 U CN205070421 U CN 205070421U CN 201520768979 U CN201520768979 U CN 201520768979U CN 205070421 U CN205070421 U CN 205070421U
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output
main circuit
circuit
input
current
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杨小春
吴洋
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SHENZHEN HANQIANG TECHNOLOGY Co Ltd
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SHENZHEN HANQIANG TECHNOLOGY Co Ltd
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Abstract

The utility model provides a power source device is at least including parallelly connected each other first power and second source, first power includes a first main circuit and a buffer circuit, the second source includes second main circuit and the 2nd buffer circuit, the input and the input of second main circuit of first main circuit are connected, the output and a buffer circuit's the input of first main circuit are connected, the output and the 2nd buffer circuit's the input of second main circuit are connected, a buffer circuit's output and the 2nd buffer circuit's output are connected, a buffer circuit is used for cut off during first main circuit fault the output of first main circuit with connection between the output of second main circuit, the 2nd buffer circuit is used for the second owner cuts off during circuit fault the output of second main circuit with connection between the output of first main circuit. Power source device has higher reliability.

Description

Supply unit
Technical field
The utility model relates to power converter topology field, particularly relates to a kind of supply unit.
Background technology
Light-emitting diode (LightEmittingDiode, LED) display screen have that brightness is high, operating voltage is low, power consumption is little, the life-span is long, the feature such as shock-resistant and stable performance, therefore, along with the development of LED technology, LED display becomes a kind of main product of flat-panel monitor with its outstanding advantage, is widely applied in fields such as finance, traffic, physical culture, advertisements.
At present, in LED display application, the reliability of the power supply of LED display is directly connected to performance and the stability of LED display.The fault of power supply, can directly cause LED display to occur the display faults such as blank screen.But in the occasion of certain applications LED display, as important meeting, athletic meeting scene etc., be the smooth expansion ensureing meeting, the phenomenon of LED display blank screen should be stopped to occur.Therefore, how ensureing the reliability of LED display power supply, is the problem that current LED display application needs solution badly.
Utility model content
In view of problems of the prior art, the utility model provides a kind of supply unit, by the parallel connection of at least two power supplys, make wherein a power failure time, other power supplys can normal power supply, thus promotes stability and the reliability of described supply unit.
A kind of supply unit, at least comprises the first power supply parallel with one another and second source; Described first power supply comprises the first main circuit and the first buffer circuit; Described second source comprises the second main circuit and the second buffer circuit; The input of described first main circuit is connected with the input of described second main circuit; The output of described first main circuit is connected with the input of described first buffer circuit; The output of described second main circuit is connected with the input of described second buffer circuit; The output of described first buffer circuit is connected with the output of described second buffer circuit; Described first buffer circuit is used for the connection cut off when described first main circuit fault between the output of described first main circuit and the output of described second main circuit; Described second buffer circuit is used for the connection cut off when described second main circuit fault between the output of described second main circuit and the output of described first main circuit.
Wherein, described first main circuit comprises the first current equalizing bus bar end, and described second main circuit comprises the second current equalizing bus bar end, and described first current equalizing bus bar end is connected with described second current equalizing bus bar end.
Wherein, described first power supply also comprises the first flow equalizing circuit, described first flow equalizing circuit comprises sampling input, reference voltage input and feedback output end, and described sampling input is connected with described first buffer circuit, for obtaining the first sampled voltage from described first buffer circuit; Described reference voltage input is connected with described first current equalizing bus bar end, for obtaining current equalizing bus bar voltage; Described feedback output end is connected with described first main circuit; Described first flow equalizing circuit is used for generating the first feedback signal according to described first sampled voltage and current equalizing bus bar voltage, and feeds back to described first main circuit by described feedback output end, to trigger the size of described first main circuit regulation output electric current.
Wherein, described second source also comprises the second flow equalizing circuit, described second flow equalizing circuit comprises sampling input, reference voltage input and feedback output end, and described sampling input is connected with described second buffer circuit, for obtaining the second sampled voltage from described second buffer circuit; Described reference voltage input is connected with described second current equalizing bus bar end, for obtaining current equalizing bus bar voltage; Described feedback output end is connected with described second main circuit; Described second flow equalizing circuit is used for generating the second feedback signal according to described second sampled voltage and current equalizing bus bar voltage, and feeds back to described second main circuit by described feedback output end, to trigger the size of described second main circuit regulation output electric current.
Wherein, described first main circuit is identical with described second main circuit structure, and described first buffer circuit is identical with described second buffer circuit structure, and described first flow equalizing circuit is identical with described second flow equalizing circuit structure; Annexation between described first main circuit, the first buffer circuit and the first flow equalizing circuit is identical with the annexation between described second main circuit, the second buffer circuit and the second flow equalizing circuit.
Wherein, described first buffer circuit comprises sampling isolation module, compares control module and auxiliary power module, the input of described sampling isolation module is connected with the output of described first main circuit, the described input of control module that compares is connected with the output of the output of described first main circuit and described sampling isolation module, and the described output comparing control module is connected with the drived control end of described sampling isolation module.
Wherein, described sampling isolation module comprises isolated transistor, first sampling resistor, second sampling resistor and sampled output, described first sampling resistor is connected with the second sampling resistor is parallel with one another, one end of described first sampling resistor and the second sampling resistor is connected with the output of described first main circuit, the other end of described first sampling resistor and the second sampling resistor is connected with the source electrode of described isolated transistor and described sampled output, the grid of described isolated transistor is connected with the drived control end of described sampling isolation module, the drain electrode of described isolated transistor is connected with the output of described sampling isolation module.
Wherein, the described control module that compares comprises comparator, the first transistor and transistor seconds, described comparator comprises first input end, second input and output, the first input end of described comparator is connected with the output of described first main circuit, second input of described comparator is connected with the output of described sampling isolation module, the output of described comparator is connected with the base stage of the base stage of described the first transistor and described transistor seconds, the emitter of described the first transistor and the emitter of described transistor seconds are connected with the drived control end of described sampling isolation module.
Wherein, described first flow equalizing circuit comprises amplification module, current-sharing adjustment module and feedback control module, the input of described amplification module is connected with the output of described first main circuit and described sampled output, the output of described amplification module is connected with the input of described current-sharing adjustment module and the input of described feedback control module, described reference voltage input is connected with described current equalizing bus bar end, the output of described current-sharing adjustment module is connected with the input of described feedback control module, the output of described feedback control module is connected with the described feedback output end of the first flow equalizing circuit.
Wherein, described amplification module is used for from obtaining sampled voltage between the output and described sampled output of described first main circuit and amplifying process, described feedback control module is used for the magnitude relationship of the sampled voltage after the amplification exported according to described amplification module and described current equalizing bus bar voltage, generate feedback control signal, to control the size of described first main circuit regulation output voltage and output current.
Described supply unit is by arranging described first buffer circuit, to cut off the connection between the output of described first main circuit and the output of described second main circuit by described first buffer circuit when described first main circuit fault, and by arranging described second buffer circuit, to cut off the connection between the output of described second main circuit and the output of described first main circuit by described second buffer circuit when described second main circuit fault, thus effectively can prevent one of them impact on another power supply when breaking down of described first power supply parallel with one another and second source, promote described supply unit reliability.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the structural representation of the supply unit that the utility model provides;
Fig. 2 is another structural representation of the supply unit that the utility model provides;
Fig. 3 is the structural representation of the first buffer circuit of supply unit shown in Fig. 2;
Fig. 4 is the structural representation of the first flow equalizing circuit of supply unit shown in Fig. 2.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1, the utility model provides a kind of supply unit 100, is applied in light-emitting diode (LightEmittingDiode, LED) display device, thinks that described LED display device provides working power.In embodiment of the present utility model, described supply unit 100 at least comprises the first power supply 10 parallel with one another and second source 20; Described first power supply 10 comprises the first main circuit 11 and the first buffer circuit 13; Described second source 20 comprises the second main circuit 21 and the second buffer circuit 23; The input of described first main circuit 11 is connected with the input of described second main circuit 21; The output of described first main circuit 11 is connected with the input of described first buffer circuit 13; The output of described second main circuit 21 is connected with the input of described second buffer circuit 23; The output of described first buffer circuit 13 is connected with the output of described second buffer circuit 23; Described first buffer circuit 13 is for cutting off the connection between the output of described first main circuit 11 and the output of described second main circuit 21 when described first main circuit 11 fault; Described second buffer circuit 23 is for cutting off the connection between the output of described second main circuit 21 and the output of described first main circuit 11 when described second main circuit 21 fault.Wherein, the input of described first main circuit 11 and the second main circuit 21 is for connecting AC power; Described first main circuit 11 and the second main circuit 21 for described AC power is converted to DC power supply, and export from the output of described first main circuit 11 and the second main circuit 21; The output of described first buffer circuit 13 and the second buffer circuit 23 is for connecting LED load, described first buffer circuit 13 is also for cutting off the connection between the output of described first main circuit 11 and described LED load when described first main circuit 11 fault, and described second buffer circuit 23 is also for cutting off the connection between the output of described second main circuit 21 and described LED load when described second main circuit 21 fault.
Refer to Fig. 2, in an alternative embodiment, described first main circuit 11 comprises the first current equalizing bus bar end 111, described second main circuit 21 comprises the second current equalizing bus bar end 211, described first current equalizing bus bar end 111 is connected with described second current equalizing bus bar end 211, wherein, connecting described first current equalizing bus bar end 111 is current equalizing bus bar with the wire of described second current equalizing bus bar end 211.Described first power supply 10 also comprises the first flow equalizing circuit 15, described first flow equalizing circuit 15 comprises sampling input 1501, reference voltage input 1503 and feedback output end 1505, described sampling input 1501 is connected with described first buffer circuit 13, for obtaining the first sampled voltage from described first buffer circuit 13; Described reference voltage input 1503 is connected with described first current equalizing bus bar end 111, for obtaining current equalizing bus bar voltage; Described feedback output end 1505 is connected with described first main circuit 11.Described first flow equalizing circuit 15 is for generating the first feedback signal according to described first sampled voltage and current equalizing bus bar voltage, and feed back to described first main circuit 11 by described feedback output end 1505, to trigger the size of described first main circuit 11 regulation output electric current.Described second source 20 also comprises the second flow equalizing circuit 25, described second flow equalizing circuit 25 comprises sampling input 2501, reference voltage input 2503 and feedback output end 2505, described sampling input 2501 is connected with described second buffer circuit 23, for obtaining the second sampled voltage from described second buffer circuit 23; Described reference voltage input 2503 is connected with described second current equalizing bus bar end 211, for obtaining current equalizing bus bar voltage; Described feedback output end 2505 is connected with described second main circuit 21.Described second flow equalizing circuit 25 is for generating the second feedback signal according to described second sampled voltage and current equalizing bus bar voltage, and feed back to described second main circuit 21 by described feedback output end 2505, to trigger the size of described second main circuit 21 regulation output electric current.Be appreciated that, owing to being connected by described current equalizing bus bar between described first current equalizing bus bar end 111 with described second current equalizing bus bar end 211, therefore the reference voltage input 1503 of described first flow equalizing circuit 15 has identical reference voltage with the reference voltage input 2503 of described second flow equalizing circuit 25, namely described current equalizing bus bar voltage is, thus by the feedback regulation effect of described first flow equalizing circuit 15 and the second flow equalizing circuit 25, described first main circuit 11 and described second main circuit 12 is made to have identical output current, realize the sharing control between described first power supply 10 and second source 20.
In embodiment of the present utility model, described first power supply 10 is identical with described second source 20 structure, namely described first main circuit 11 is identical with described second main circuit 21 structure, described first buffer circuit 13 is identical with described second buffer circuit 23 structure, and described first flow equalizing circuit 15 is identical with described second flow equalizing circuit 25 structure; Meanwhile, the annexation between described first main circuit 11, first buffer circuit 13 and the first flow equalizing circuit 15 is identical with the annexation between described second main circuit 21, second buffer circuit 23 and the second flow equalizing circuit 25.Wherein, described first main circuit 11 and the second main circuit 21 are AC-DC change-over circuit, each main circuit includes ac input end, DC output end, feedback input end and described current equalizing bus bar end, and the body structure about described first main circuit 11 and the second main circuit 21 repeats no more herein.Concrete structure and the annexation each other thereof of described first buffer circuit 13 and the first flow equalizing circuit 15 are only described for described first power supply 10 below.
Refer to Fig. 3, described first buffer circuit 13 comprises sampling isolation module 131, relatively control module 133 and auxiliary power module 135, the input of described sampling isolation module 131 is connected with the output of described first main circuit 11, the described input comparing control module 133 is connected with the output of described first main circuit 11 and the output OUTPUT+ of described sampling isolation module 131, the drived control end DRV of the described output and described sampling isolation module 131 that compare control module 133 is connected, described compare control module 133 for the voltage of the output according to described first main circuit 11 and the output OUTPUT+ of described sampling isolation module 131 voltage between magnitude relationship, export drive control signal to described drived control end DRV, to control the connection that described sampling isolation module 131 is turned on or off between the output of described first main circuit 11 and the output OUTPUT+ of described sampling isolation module 131.Described auxiliary power module 135 is connected with a DC power supply VCC, for described DC power supply VCC is converted to accessory power supply VDD, thinks that the described control module 133 that compares provides working power.
Particularly, described sampling isolation module 131 comprises isolated transistor Q5, the first sampling resistor RS1, the second sampling resistor RS2 and sampled output 5VB, described first sampling resistor RS1 is connected with the second sampling resistor RS2 is parallel with one another, one end of described first sampling resistor RS1 and the second sampling resistor RS2 is connected with the output 5VA of described first main circuit 11 and one end of an electric capacity C1, and the other end of described first sampling resistor RS1 and the second sampling resistor RS2 is connected with one end of source electrode s, the sampled output 5VB of described isolated transistor Q5 and resistance R7; The other end ground connection of described electric capacity C1; The other end of described resistance R7 is connected with the drived control end DRV of described sampling isolation module 131 with the grid g of described isolated transistor Q5; The drain electrode d of described isolated transistor Q5 is connected with the output OUTPUT+ of described sampling isolation module 131 and one end of electric capacity C4; The other end ground connection of described electric capacity C4.Wherein, the output OUTPUT+ of described sampling isolation module 131 is the output of described first buffer circuit 13.
The described control module 133 that compares comprises comparator U2-B, the first transistor Q1 and transistor seconds Q2, described comparator U2-B comprises first input end 5, second input 6 and output 7, the first input end 5 of described comparator U2-B is connected with the output 5VA of described first main circuit 11 by resistance R2, second input 6 of described comparator U2-B is connected with the output OUTPUT+ of described sampling isolation module 131 by resistance R3, the output 7 of described comparator U2-B is connected with the base stage 1 of the base stage 1 of described the first transistor Q1 and described transistor seconds Q2, the base stage 1 of described the first transistor Q1 and the base stage 1 of described transistor seconds Q2 are also connected with one end of resistance R1, the other end of described resistance R1 is connected with the collector electrode 3 of described accessory power supply VDD and described the first transistor Q1, the emitter 2 of described the first transistor Q1 is connected with the emitter 3 of described transistor seconds Q2, collector electrode 2 ground connection of described transistor seconds Q2.The emitter 2 of described the first transistor Q1 and the emitter 3 of described transistor seconds Q2 are also connected with the drived control end DRV of described sampling isolation module 131 by diode D1 parallel with one another and resistance R4, the positive pole of wherein said diode D1 is connected with described drived control end DRV, and the negative pole of described diode D1 is connected with the emitter 3 of the emitter 2 of described the first transistor Q1 and described transistor seconds Q2.
When described first main circuit 11 normally runs, described isolated transistor Q5 is in conducting state, due to described isolated transistor Q5 source electrode s and drain electrode d between there is conduction voltage drop, the voltage of the output 5VA of described first main circuit 11 is higher than the voltage of the output OUTPUT+ of described sampling isolation module 131, the output 7 of comparator U2-B exports high level signal, then the grid g of described isolated transistor Q5 is high level, thus maintains described isolated transistor Q5 and be in conducting state.If described first main circuit 11 breaks down, described second main circuit 21 normally runs, then the output 5VA output voltage of described first main circuit 11 is zero, the voltage of the output OUTPUT+ of described sampling isolation module 131 is provided by described second main circuit 21, then the voltage of the output OUTPUT+ of described sampling isolation module 131 is higher than the voltage of the output 5VA of described first main circuit 11, the output 7 output low level signal of described comparator U2-B, the level of the grid g of described isolated transistor Q5 is dragged down, then described isolated transistor Q5 ends, thus the connection disconnected between the output 5VA of described first the main circuit 11 and output OUTPUT+ of described sampling isolation module 131, thus disconnect being connected in parallel of described first power supply 10 and described second source 20.
Refer to Fig. 4, described first flow equalizing circuit 15 comprises amplification module 151, current-sharing adjustment module 153 and feedback control module 155, the input of described amplification module 151 is connected with the output 5VA of described first main circuit 11 and described sampled output 5VB, and described amplification module 151 for obtaining sampled voltage and amplifying process between the output 5VA and described sampled output 5VB of described first main circuit 11; The output of described amplification module 151 is connected with the input of described current-sharing adjustment module 153 and the input of described feedback control module 155, and described reference voltage input 1503 is connected with described current equalizing bus bar end 111, for obtaining current equalizing bus bar voltage; The output of described current-sharing adjustment module 153 is connected with the input of described feedback control module 155; The output of described feedback control module 155 is connected with the described feedback output end 1505 of the first flow equalizing circuit 15; Described feedback control module 155 is for the magnitude relationship according to the sampled voltage after the amplification of described amplification module 151 output and described current equalizing bus bar voltage, generate feedback control signal, to control the size of described first main circuit 11 regulation output voltage and output current.
Particularly, described amplification module 151 comprises operational amplifier U1-A, described operational amplifier U1-A comprises first input end 3, second input 2 and output 1, the first input end 3 of described operational amplifier U1-A is connected with the output 5VA of described first main circuit 11 by resistance R9, second input 2 of described operational amplifier U1-A is connected with described sampled output 5VB by resistance R10, the output 1 of described operational amplifier U1-A is connected with described feedback control module 155 by the resistance R14 of series connection mutually and resistance R30, the output 1 of described operational amplifier U1-A is also connected with described current-sharing adjustment module 153 by resistance R17.
Described current-sharing adjustment module 153 comprises potentiometer VR1, comparator U3-B and diode D2, described potentiometer VR1 comprises the first link 1, point adjustable side, position 2 and the second link 3, described second link 3 is connected with described resistance R17, described first link 1 is connected with the first input end 5 of described comparator U3-B, the output 7 of described comparator U3-B is connected with the positive pole of described diode D2, the negative pole of described diode D is connected with described reference voltage input 1503 by resistance R19, the negative pole of described diode D is also connected with described feedback control module 155 by resistance R20, second input 6 of described comparator U3-B is connected with the negative pole of described diode D.
Described feedback control module 155 comprises operational amplifier U3-A and transistor Q4, the first input end 2 of described operational amplifier U3-A is connected with described R30, second input 3 of described operational amplifier U3-A is connected with described resistance R20, the output 1 of described operational amplifier U3-A is connected with the base stage 1 of described transistor Q4 by resistance R24, emitter 2 ground connection of described transistor Q4, the collector electrode 3 of described transistor Q4 is connected with described feedback output end 1505 by the resistance R26 of series connection and resistance R15.
Described amplification module 151 is by detecting the sampled voltage of described first sampling resistor RS1 and the second sampling resistor RS2 two ends, namely the voltage between the output 5VA of described first main circuit 11 and described sampled output 5VB also amplifies, sampled voltage after amplification exports through the output 1 of described operational amplifier U1-A, and regulate dividing potential drop by described potentiometer VR1, described first power supply 10 can be made roughly the same with the voltage of the current equalizing bus bar end of second source 20 by regulating described potentiometer VR1, and make the sampled voltage after described amplification be substantially equal to the voltage of described current equalizing bus bar end.When the load current of described first power supply 10 is less than the average current on described current equalizing bus bar, the sampled voltage at described first sampling resistor RS1 and the second sampling resistor RS2 two ends can reduce and step-down along with load current, simultaneously crossing after amplification voltage through described operational amplifier U1-A also can step-down, and then cause the voltage of the first input end 2 of described operational amplifier U3-A to be dragged down, the voltage of second input 3 of described operational amplifier U3-A is determined by current equalizing bus bar voltage, thus described in making, state the voltage of voltage lower than the second input 3 of the first input end 2 of operational amplifier U3-A, now the output 1 of operational amplifier U3-A exports high level, make described transistor Q4 saturation conduction, and then the first feedback signal is generated on described feedback output end 1505, to trigger described first main circuit 11, output voltage is raised, increase the load capacity of described first power supply 10, and then the output current of this first power supply 10 is increased.Be appreciated that described supply unit 100 controls described first main circuit 11 and the second main circuit 21 regulation output electric current automatically by described first flow equalizing circuit 15 and the second flow equalizing circuit 25, to realize dynamic equilibrium, reach sharing control effect.In the present embodiment, the current-sharing precision of described first flow equalizing circuit 15 and the second flow equalizing circuit 25 is less than 3%.Be appreciated that and also comprise some resistance and capacity cell in described first buffer circuit 13 and the first flow equalizing circuit 15, its concrete annexation, respectively as shown in Fig. 3 and Fig. 4, repeats no more herein.
Described supply unit 100 is by arranging described first buffer circuit 13, to cut off the connection between the output of described first main circuit 11 and described LED load by described first buffer circuit 13 when described first main circuit 11 fault, and by arranging described second buffer circuit 23, to cut off the connection between the output of described second main circuit 21 and described LED load by described second buffer circuit 23 when described second main circuit 21 fault, thus effectively can prevent one of them impact on another power supply when breaking down of described first power supply 10 parallel with one another and second source 20, promote described supply unit 100 reliability.Simultaneously, described supply unit 100 also realizes described first power supply 10 control with the dynamic equilibrium of second source 20 output current by arranging described first flow equalizing circuit 15 and the second flow equalizing circuit 25, thus automatically can regulate according to different LED load and balanced described first power supply 10 and the load current size of second source 20, promote the stability of described supply unit 100.
Be appreciated that, described supply unit 100 is not limited to only comprise described first power supply 10 parallel with one another and second source 20, multiple power supplys such as the 3rd power supply, the 4th power supply, N power supply can also be comprised, described multiple power supply and described first power supply 10 and second source 20 are connected in parallel, and are connected by current equalizing bus bar between the current equalizing bus bar end of described multiple power supply and described first power supply 10, second source 20.Described multiple power supply all has the power supply architecture identical with described first power supply 10, namely each in described multiple power supply includes main circuit, buffer circuit and flow equalizing circuit, and annexation between described main circuit, buffer circuit and flow equalizing circuit is identical with the annexation between described first main circuit 11, first buffer circuit 13 and the first flow equalizing circuit 15.By arranging described flow equalizing circuit, multiple power supplys that can be parallel with one another in described supply unit 100 parallel with one another provide working power for described LED load time, realize the load current-sharing between described multiple power supply, thus the load current between effectively preventing because of multiple power supply distributes and causes partial power overload and damage unbalanced; Meanwhile, by arranging described buffer circuit, when can make that in described multiple power supply, any one breaks down, the normal work of other power supplys can not be affected, thus effectively promote stability and the reliability of described supply unit 100.
Above disclosedly be only preferred embodiment of the present utility model, certainly the interest field of the utility model can not be limited with this, one of ordinary skill in the art will appreciate that all or part of flow process realizing above-described embodiment, and according to the equivalent variations that the utility model claim is done, still belong to the scope that utility model contains.

Claims (10)

1. a supply unit, is characterized in that, described supply unit at least comprises the first power supply parallel with one another and second source; Described first power supply comprises the first main circuit and the first buffer circuit; Described second source comprises the second main circuit and the second buffer circuit; The input of described first main circuit is connected with the input of described second main circuit; The output of described first main circuit is connected with the input of described first buffer circuit; The output of described second main circuit is connected with the input of described second buffer circuit; The output of described first buffer circuit is connected with the output of described second buffer circuit; Described first buffer circuit is used for the connection cut off when described first main circuit fault between the output of described first main circuit and the output of described second main circuit; Described second buffer circuit is used for the connection cut off when described second main circuit fault between the output of described second main circuit and the output of described first main circuit.
2. supply unit as claimed in claim 1, it is characterized in that, described first main circuit comprises the first current equalizing bus bar end, and described second main circuit comprises the second current equalizing bus bar end, and described first current equalizing bus bar end is connected with described second current equalizing bus bar end.
3. supply unit as claimed in claim 2, it is characterized in that, described first power supply also comprises the first flow equalizing circuit, described first flow equalizing circuit comprises sampling input, reference voltage input and feedback output end, described sampling input is connected with described first buffer circuit, for obtaining the first sampled voltage from described first buffer circuit; Described reference voltage input is connected with described first current equalizing bus bar end, for obtaining current equalizing bus bar voltage; Described feedback output end is connected with described first main circuit; Described first flow equalizing circuit is used for generating the first feedback signal according to described first sampled voltage and current equalizing bus bar voltage, and feeds back to described first main circuit by described feedback output end, to trigger the size of described first main circuit regulation output electric current.
4. supply unit as claimed in claim 2, it is characterized in that, described second source also comprises the second flow equalizing circuit, described second flow equalizing circuit comprises sampling input, reference voltage input and feedback output end, described sampling input is connected with described second buffer circuit, for obtaining the second sampled voltage from described second buffer circuit; Described reference voltage input is connected with described second current equalizing bus bar end, for obtaining current equalizing bus bar voltage; Described feedback output end is connected with described second main circuit; Described second flow equalizing circuit is used for generating the second feedback signal according to described second sampled voltage and current equalizing bus bar voltage, and feeds back to described second main circuit by described feedback output end, to trigger the size of described second main circuit regulation output electric current.
5. supply unit as claimed in claim 4, it is characterized in that, described first main circuit is identical with described second main circuit structure, and described first buffer circuit is identical with described second buffer circuit structure, and described first flow equalizing circuit is identical with described second flow equalizing circuit structure; Annexation between described first main circuit, the first buffer circuit and the first flow equalizing circuit is identical with the annexation between described second main circuit, the second buffer circuit and the second flow equalizing circuit.
6. supply unit as claimed in claim 5, it is characterized in that, described first buffer circuit comprises sampling isolation module, compares control module and auxiliary power module, the input of described sampling isolation module is connected with the output of described first main circuit, the described input of control module that compares is connected with the output of the output of described first main circuit and described sampling isolation module, and the described output comparing control module is connected with the drived control end of described sampling isolation module.
7. supply unit as claimed in claim 6, it is characterized in that, described sampling isolation module comprises isolated transistor, first sampling resistor, second sampling resistor and sampled output, described first sampling resistor is connected with the second sampling resistor is parallel with one another, one end of described first sampling resistor and the second sampling resistor is connected with the output of described first main circuit, the other end of described first sampling resistor and the second sampling resistor is connected with the source electrode of described isolated transistor and described sampled output, the grid of described isolated transistor is connected with the drived control end of described sampling isolation module, the drain electrode of described isolated transistor is connected with the output of described sampling isolation module.
8. supply unit as claimed in claim 7, it is characterized in that, the described control module that compares comprises comparator, the first transistor and transistor seconds, described comparator comprises first input end, second input and output, the first input end of described comparator is connected with the output of described first main circuit, second input of described comparator is connected with the output of described sampling isolation module, the output of described comparator is connected with the base stage of the base stage of described the first transistor and described transistor seconds, the emitter of described the first transistor and the emitter of described transistor seconds are connected with the drived control end of described sampling isolation module.
9. supply unit as claimed in claim 7, it is characterized in that, described first flow equalizing circuit comprises amplification module, current-sharing adjustment module and feedback control module, the input of described amplification module is connected with the output of described first main circuit and described sampled output, the output of described amplification module is connected with the input of described current-sharing adjustment module and the input of described feedback control module, described reference voltage input is connected with described current equalizing bus bar end, the output of described current-sharing adjustment module is connected with the input of described feedback control module, the output of described feedback control module is connected with the described feedback output end of the first flow equalizing circuit.
10. supply unit as claimed in claim 9, it is characterized in that, described amplification module is used for from obtaining sampled voltage between the output and described sampled output of described first main circuit and amplifying process, described feedback control module is used for the magnitude relationship of the sampled voltage after the amplification exported according to described amplification module and described current equalizing bus bar voltage, generate feedback control signal, to control the size of described first main circuit regulation output voltage and output current.
CN201520768979.7U 2015-09-30 2015-09-30 Power source device Active CN205070421U (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018177389A1 (en) * 2017-03-31 2018-10-04 赤多尼科两合股份有限公司 Led constant-voltage current-sharing system
CN111158415A (en) * 2018-11-08 2020-05-15 中车株洲电力机车研究所有限公司 Current sharing control device and method for power module
CN114243328A (en) * 2022-02-24 2022-03-25 深圳市瀚强科技股份有限公司 PCB (printed circuit board) plug-in circuit and power supply equipment

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018177389A1 (en) * 2017-03-31 2018-10-04 赤多尼科两合股份有限公司 Led constant-voltage current-sharing system
CN108668403A (en) * 2017-03-31 2018-10-16 赤多尼科两合股份有限公司 A kind of LED constant pressures current-equalizing system
CN108668403B (en) * 2017-03-31 2019-12-03 赤多尼科两合股份有限公司 A kind of LED constant pressure current-equalizing system
CN111158415A (en) * 2018-11-08 2020-05-15 中车株洲电力机车研究所有限公司 Current sharing control device and method for power module
CN111158415B (en) * 2018-11-08 2022-02-15 中车株洲电力机车研究所有限公司 Current sharing control device and method for power module
CN114243328A (en) * 2022-02-24 2022-03-25 深圳市瀚强科技股份有限公司 PCB (printed circuit board) plug-in circuit and power supply equipment

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