CN205004354U - III - V compound semiconductor hall element of clan - Google Patents

Abstract

The utility model discloses a III - V compound semiconductor hall element of clan, its structure includes hall element functional layer film, assembles on the insulating radiation base through the mode of flip chip bonding, the electrode figure has been prepared in advance to the insulating radiation base. A mode, with hall element functional layer membrane separator, dear single crystal lining ground warp thread crosses simple processing back, can repeatedly be used for epitaxial growth, and the number of repetition is more than 20 times, but greatly reduced manufacturing cost for growing the single -crystal underlay of hall element functional layer film is peeled off through the substrate.

Description

A kind of Ⅲ-Ⅴ compound semiconductor Hall element

Technical field

The utility model relates to technical field of semiconductors, is specifically related to a kind of Ⅲ-Ⅴ compound semiconductor Hall element.

Background technology

21 century is the information computerization epoch, and sensor technology is the important technical basis of information-intensive society.Hall element is a kind of magneto-dependent sensor based on Hall effect, their sound construction, and volume is little, lightweight, life-span is long, easy for installation, and power consumption is little, and frequency is high, vibration resistance, is not afraid of pollution or the corrosion of dust, greasy dirt, steam and smog etc., therefore applies more and more wider in modern society.Hall element is the Primary Component in DC brushless motor, be widely used in mobile phone, automobile ABS, electronic striking and travel speed to measure, also can be used for Hall ammeter, electronic compass, current/voltage sensor, become the Primary Component that national defence, industry, many branchs of industry such as civilian are indispensable, also be the core technology of Development of Military Equipment simultaneously, in national defense industry construction, there is leading role.

Current Hall element mainly adopts ion implantation and epitaxial growth method two kinds of modes to prepare, two kinds of methods all need a thickness to reach the monocrystalline substrate material of hundreds of micron, the Hall element of preparation comprises the functional layer of several microns and the substrate layer of hundreds of micron, monocrystalline substrate material is expensive, in Hall element, do not bear the effect of functional layer, originally can reuse, in current preparation technology, but can only use once, exist and waste greatly.On the other hand, in traditional handicraft, produce monocrystalline substrate material used as Hall element, be necessary for insulation or semi-insulating single crystal backing material, its price wants expensive a lot of compared to there being the monocrystalline substrate material of certain doping.

Summary of the invention

For this reason, to be solved in the utility model is that the cost of manufacture of existing Ⅲ-Ⅴ compound semiconductor Hall element is higher, single crystalline substrate can only use once, there is the problem of serious waste, thus provides a kind of Ⅲ-Ⅴ compound semiconductor Hall element of low cost.Wherein, in the preparation process of Hall element, Hall element functional layer can be realized effectively be separated with monocrystalline substrate material, single crystalline substrate after treatment, epitaxial growth can be recycled and reused for, on the other hand, more cheap doped single crystal backing material can be adopted, instead of the semi-insulating single crystal substrate of costliness.

For solving the problems of the technologies described above, the technical solution of the utility model is as follows:

A) provide a kind of Ⅲ-Ⅴ compound semiconductor single crystalline substrate, preferably, select gallium arsenide substrate or InP substrate;

B) in Ⅲ-Ⅴ compound semiconductor single crystalline substrate, one deck sacrifice layer is grown;

C) on sacrifice layer, grow the functional layer material of Hall element;

D) at the flexible and chemically inert material of extension functional layer surface adhesion one deck, this layer material can additional substrate be peeled off, and raises the efficiency and rate of finished products;

E) select selective corrosion solution corrosion sacrifice layer, realize Hall element extension functional layer and Ⅲ-Ⅴ compound semiconductor single crystalline substrate is peeled off; Ⅲ-Ⅴ compound semiconductor single crystalline substrate after stripping, after simple process, reusable;

F) by the extension functional layer flexible material one side after stripping, stick in another rigid substrate, preferably, select silicon substrate, glass substrate, ceramic substrate or rigidity plastics substrate are as rigid substrate;

G) in Hall element functional layer, prepare metal ohmic contact, and complete the technique such as mesa etch, passivation;

H) Hall element of metal ohmic contact will be prepared, by technologies such as flip chip bondings, be assembled on the insulating radiation substrate of metal patternization in advance, then the solution that selectivity is very high is utilized, dissolve the adhesive used in previous process, Hall element is separated with passive flexible material and rigid substrate, the Hall element that thickness is only several microns can be prepared.Meanwhile, by wire-bonding package on insulating radiation substrate, instead of on Hall element metal electrode direct routing, the chip size (wire-bonding package require metal derby there is larger area) of Hall element can be effectively reduced.

According to a kind of Ⅲ-Ⅴ compound semiconductor Hall element of an embodiment of the present utility model, wherein, described Ⅲ-Ⅴ compound semiconductor single crystalline substrate is GaAs (GaAs), described sacrifice layer is aluminium arsenide (AlAs), and described selective corrosion solution is hydrofluoric acid (HF) solution.

In sum, the utility model utilizes extension lift-off technology, has prepared a kind of Hall element very with cost advantage.For Ⅲ-Ⅴ compound semiconductor single crystalline substrate, the thickness that each process consumes is no more than 10 microns, the substrate of 500 microns, at least can reuse 20 times.Simultaneously, Hall element prepared by traditional handicraft, require that Ⅲ-Ⅴ compound semiconductor single crystalline substrate is semi-insulated, its price wants expensive many relative to doped single crystal substrate, and adopt our substrate desquamation technology, for the conductivity not requirement of single crystalline substrate, doped single crystal substrate can be adopted, reduce costs further.

Accompanying drawing explanation

Below, embodiment of the present utility model is described in detail by reference to the accompanying drawings.In accompanying drawing: 001 is Ⅲ-Ⅴ compound semiconductor single crystalline substrate; 002 is sacrifice layer; 003 is Hall element functional layer; 004 is flexible material; 005 is rigid support substrate; 006 is Ohm contact electrode; 007 is patterned metal; 008 is insulating radiation base.

Fig. 1 Ⅲ-Ⅴ compound semiconductor single crystalline substrate grows Hall element extension functional layer, comprise Ⅲ-Ⅴ compound semiconductor single crystalline substrate 001, sacrifice layer 002, Hall element functional layer 003;

Fig. 2 adheres to flexible material 004 in extension functional layer 003, comprises Ⅲ-Ⅴ compound semiconductor single crystalline substrate 001, sacrifice layer 002, Hall element functional layer 003, flexible material 004;

After Fig. 3 illustrates that sacrifice layer 002 is corroded, Ⅲ-Ⅴ compound semiconductor single crystalline substrate 001 is separated with Hall element functional layer 003, flexible material 004;

Fig. 4 illustrates that the Hall element functional layer 003 after peeling off, flexible material 004 adhere to each other with rigid support substrate 005;

Fig. 5 adopts semiconductor planar technique, prepares Hall element Ohm contact electrode 006, and mesa etch, the techniques such as passivation;

Fig. 6 adopts inverse bonding technique, and the Ohm contact electrode 006 of Hall element and metallized insulating radiation base 008 are in advance fitted together, the metallization pattern of insulating radiation base is 007;

Flexible material 004, other parts of rigid support substrate 005 and Hall element, on the basis of Fig. 6, are separated by Fig. 7.

Embodiment

embodiment 1:

First an arsenide gallium monocrystal substrate is got, by metal organic chemical vapor deposition (MOCVD) or molecular beam epitaxy (MBE), at Grown one deck aluminium arsenide (AlAs) sacrifice layer, and Hall element functional layer.After having grown, get epitaxial wafer, surperficial spin coating layer of adhesive A, this adhesive and Subsequent semiconductor planar technique compatibility, can not change in technical process, then get a flexible material B and adhere on it, this flexible material also with semiconductor planar process compatible, can not change.Epitaxial wafer after process is soaked in the solution containing hydrofluoric acid, hydrofluoric acid to the selecting response ratio of aluminium arsenide (AlAs) and GaAs (GaAs) more than 10000.Utilize hydrofluoric acid to the highly corrosive of sacrifice layer aluminium arsenide (AlAs), sacrifice layer is all eroded, make Hall element functional layer and arsenide gallium monocrystal substrate desquamation.

Get a size and the duplicate silicon chip of arsenide gallium monocrystal substrate in addition again, at silicon chip surface spin coating layer of adhesive A, flexible material B and the Hall element functional layer after peeling off to be adhered to and on silicon chip, flexible material B side and silicon chip bonding.According to the technique of typical Hall element, adopt conventional lithographic methods, spin coating photoresist, exposure, development, obtains Hall element electrode pattern.Then utilize electron beam evaporation (E-beam) gold evaporation-germanium (Au-Ge) alloy, after removing photoresist and dissolving photoresist in liquid, the metal be attached on photoresist comes off, and remaining metal is then the metal ohmic contact of Hall element.Short annealing in nitrogen atmosphere, makes metal and semi-conducting material form good ohmic contact.Then adopt the method for photoetching alignment, continue at epi-layer surface spin coating photoresist, exposure, development, obtains the figure of Hall element mesa etch.Adopt chemical wet etching or dry etching, get rid of the semi-conducting material not having photoresist protection zone, obtain the pattern of Hall element bunge bedstraw herb shape.Remove the photoresist of insulation blocking, then utilize plasma enhanced chemical vapor deposition method (PECVD), in Hall element plated surface last layer silicon nitride (SiNx) passivation material, to protect Hall element.Again adopt the method for photoetching alignment, preparation erodes the figure of the passivation material that Hall element metal ohmic contact covers, and then utilizes dry etching, removes the silicon nitride (SiNx) on metal ohmic contact, finally utilizes the liquid that removes photoresist, and removes photoresist.

Get an insulating radiation substrate, substrate is arranged according to the metallic pattern of Hall element, the metallic pattern that preparation is symmetrical, then adopt inverse bonding technique, by the metal of Hall element together with the metal solder of insulating radiation base.Finally, use the solution can removing adhesive A, adhesive A is dissolved, flexible material B and silicon chip are separated with Hall element.So far, whole technical process all completes.

Claims (5)

1. a Ⅲ-Ⅴ compound semiconductor Hall element, its structure comprises the insulating radiation base, Ohm contact electrode, the Hall element functional layer film that arrange from bottom to top, it is characterized in that: not containing Ⅲ-Ⅴ compound semiconductor single crystalline substrate in Hall element structure, adopt insulating radiation base as support.

2. a kind of Ⅲ-Ⅴ compound semiconductor Hall element as claimed in claim 1, is characterized in that: described Hall element functional layer film is prepared by epitaxial growth regime.

3. a kind of Ⅲ-Ⅴ compound semiconductor Hall element as claimed in claim 1, is characterized in that: described Hall element functional layer film is peeled off mode by extension and is separated with Ⅲ-Ⅴ compound semiconductor single crystalline substrate.

4. a kind of Ⅲ-Ⅴ compound semiconductor Hall element as claimed in claim 1, is characterized in that: described insulating radiation base, previously prepared electrode pattern.

5. a kind of Ⅲ-Ⅴ compound semiconductor Hall element as claimed in claim 1, is characterized in that: described insulating radiation base is heat dissipation ceramic sheet.