CN204965704U - Multipath control warning circuit - Google Patents
Multipath control warning circuit Download PDFInfo
- Publication number
- CN204965704U CN204965704U CN201520767127.6U CN201520767127U CN204965704U CN 204965704 U CN204965704 U CN 204965704U CN 201520767127 U CN201520767127 U CN 201520767127U CN 204965704 U CN204965704 U CN 204965704U
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- sheffer stroke
- input end
- stroke gate
- switch
- pin
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Abstract
The utility model discloses a multipath control warning circuit. It includes: the RS trigger: including dual input NAND gate U2 and three -input NAND gate U3, the gating vibrates the circuit: including a switch integrated circuit chip U4 and connected resistance R5, electric capacity R3, warning circuit: it constitutes to connect alarm LS1 by switch integrated circuit chip U4, resetting means: by three -input NAND gate U3 with and input 2 linked switch S4, its input 3 is connected electric capacity C1 and is constituted, control circuit: by dual input NAND gate U1 with and input 1 linked switch S1, the switch S2 of 2 series connection of its input and S3 constitute. This circuit structure is simple, convenient to use, consumption are lower.
Description
Technical field
The present invention relates to a kind of warning circuit, be specifically related to a kind of multi-channel control warning circuit.
Background technology
The monitoring that the warning circuit of tradition multi-channel control generally uses multiple I/O interfaces of single-chip microcomputer to come multiple equipment, but single-chip microcomputer needs coding, and use difficulty large, cost is high.So propose the multi-channel control warning circuit that a kind of structure is simple, be easy to popularization.
Summary of the invention
The object of the invention is to: propose the multi-channel control warning circuit that a kind of structure is simple, easy to use, power consumption is lower.
The technical solution used in the present invention is as follows:
A kind of multi-channel control warning circuit, comprising: rest-set flip-flop: include dual input Sheffer stroke gate U2 and three input nand gate U3; Gating oscillating circuit: include a switch integrated circuit chip U4 and connected resistance R5, electric capacity R3; Warning circuit: connect alarm LS1 by switch integrated circuit chip U4 and form; Resetting means: by three input nand gate U3 and its input end 2 connecting valve S4, its input end 3 connects electric capacity C1 and forms; Control circuit: by dual input Sheffer stroke gate U1 and its input end 1 connecting valve S1, switch S 2 and the S3 of the series connection of its input end 2 are formed.
Concrete, integrated circuit (IC) chip U4 adopts chip to be TWH8751, and it is low power consumption switch integrated circuit (IC) chip.
Concrete, circuit structure is: Sheffer stroke gate U1 input end 1 is connected to VCC by resistance R2, also successively by connecting valve S1, switch S 3, switch S 2 is connected to the input end 2 of Sheffer stroke gate U1, the input end 2 of Sheffer stroke gate U1 is also connected to VCC by resistance R3, the output terminal of Sheffer stroke gate U1 connects the input end 1 of Sheffer stroke gate U2, the output terminal of Sheffer stroke gate U2 connects the input end 1 of Sheffer stroke gate U3, the output terminal of Sheffer stroke gate U3 connects the input end 2 of Sheffer stroke gate U2 and the pin 2 of integrated circuit (IC) chip U4 respectively, the input end 2 of Sheffer stroke gate U3 connects VCC by resistance R1, the input end 2 of the U3 of Sheffer stroke gate connects electric capacity C2 by switch S 4, resistance R5, VCC is connected after alarm LS1, the input end 3 of Sheffer stroke gate U3, by resistance R4 to VCC, is also connected to the pin 3 of integrated chip U4 by electric capacity C1, the pin 5 of integrated chip U4 is connected to VCC, connects electric capacity C2 between pin 3 and pin 1, pin 1 and pin 4 contact resistance R5.
When switch S 1 disconnects, there is abnormal disconnection in the arbitrary equipment be now connected with S3 as switch S 2, then Sheffer stroke gate U1 input end 1 is high level, it exports as low level, in the rest-set flip-flop that Sheffer stroke gate U2 and U3 is formed, the output of Sheffer stroke gate U3 is low level, the triggering oscillator that integrated chip U4, electric capacity C2, resistance R5 are formed starts concussion, alarm LS1 is worked and gives the alarm.During Closing Switch S4, rest-set flip-flop is reset, and oscillator quits work, and switch S 2 and S3 connection device can arbitrarily use.During warning, Closing Switch S4, by rest-set flip-flop, is that the energy that the pin 2 of integrated chip U4 can be consumed in oscillator by electric capacity C1 rapidly for low level makes warning stop.
In sum, owing to have employed technique scheme, the invention has the beneficial effects as follows: structure is simple, easy to use, power consumption is lower.
Accompanying drawing explanation
Examples of the present invention will be described by way of reference to the accompanying drawings, wherein:
Fig. 1 is circuit embodiments schematic diagram of the present invention.
Embodiment
All features disclosed in this instructions, or the step in disclosed all methods or process, except mutually exclusive feature and/or step, all can combine by any way.
Below in conjunction with Fig. 1, the present invention is elaborated.
Circuit structure is that Sheffer stroke gate U1 input end 1 is connected to VCC by resistance R2, also successively by connecting valve S1, switch S 3, switch S 2 is connected to the input end 2 of Sheffer stroke gate U1, the input end 2 of Sheffer stroke gate U1 is also connected to VCC by resistance R3, the output terminal of Sheffer stroke gate U1 connects the input end 1 of Sheffer stroke gate U2, the output terminal of Sheffer stroke gate U2 connects the input end 1 of Sheffer stroke gate U3, the output terminal of Sheffer stroke gate U3 connects the input end 2 of Sheffer stroke gate U2 and the pin 2 of integrated circuit (IC) chip U4 respectively, the input end 2 of Sheffer stroke gate U3 connects VCC by resistance R1, the input end 2 of the U3 of Sheffer stroke gate connects electric capacity C2 by switch S 4, resistance R5, VCC is connected after alarm LS1, the input end 3 of Sheffer stroke gate U3, by resistance R4 to VCC, is also connected to the pin 3 of integrated chip U4 by electric capacity C1, the pin 5 of integrated chip U4 is connected to VCC, connects electric capacity C2 between pin 3 and pin 1, pin 1 and pin 4 contact resistance R5.
In concrete use, the switch S 2 of series connection and the quantity of S3 can suitably increase to control more electric equipment.
Claims (3)
1. a multi-channel control warning circuit, is characterized in that, comprising:
Rest-set flip-flop: include dual input Sheffer stroke gate U2 and three input nand gate U3;
Gating oscillating circuit: include a switch integrated circuit chip U4 and connected resistance R5, electric capacity R3;
Warning circuit: connect alarm LS1 by switch integrated circuit chip U4 and form;
Resetting means: by three input nand gate U3 and its input end 2 connecting valve S4, its input end 3 connects electric capacity C1 and forms;
Control circuit: by dual input Sheffer stroke gate U1 and its input end 1 connecting valve S1, switch S 2 and the S3 of the series connection of its input end 2 are formed.
2. a kind of multi-channel control warning circuit according to claim 1, is characterized in that, described switch integrated circuit chip U4 adopts chip to be TWH8751.
3. a kind of multi-channel control warning circuit according to claim 1, it is characterized in that, its circuit structure is: Sheffer stroke gate U1 input end 1 is connected to VCC by resistance R2, also successively by connecting valve S1, switch S 3, switch S 2 is connected to the input end 2 of Sheffer stroke gate U1, the input end 2 of Sheffer stroke gate U1 is also connected to VCC by resistance R3, the output terminal of Sheffer stroke gate U1 connects the input end 1 of Sheffer stroke gate U2, the output terminal of Sheffer stroke gate U2 connects the input end 1 of Sheffer stroke gate U3, the output terminal of Sheffer stroke gate U3 connects the input end 2 of Sheffer stroke gate U2 and the pin 2 of integrated circuit (IC) chip U4 respectively, the input end 2 of Sheffer stroke gate U3 connects VCC by resistance R1, the input end 2 of the U3 of Sheffer stroke gate connects electric capacity C2 by switch S 4, resistance R5, VCC is connected after alarm LS1, the input end 3 of Sheffer stroke gate U3, by resistance R4 to VCC, is also connected to the pin 3 of integrated chip U4 by electric capacity C1, the pin 5 of integrated chip U4 is connected to VCC, connects electric capacity C2 between pin 3 and pin 1, pin 1 and pin 4 contact resistance R5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520767127.6U CN204965704U (en) | 2015-09-30 | 2015-09-30 | Multipath control warning circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520767127.6U CN204965704U (en) | 2015-09-30 | 2015-09-30 | Multipath control warning circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204965704U true CN204965704U (en) | 2016-01-13 |
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ID=55060754
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520767127.6U Expired - Fee Related CN204965704U (en) | 2015-09-30 | 2015-09-30 | Multipath control warning circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204965704U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185065A (en) * | 2015-09-30 | 2015-12-23 | 成都川睿科技有限公司 | Multi-control alarm circuit |
-
2015
- 2015-09-30 CN CN201520767127.6U patent/CN204965704U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185065A (en) * | 2015-09-30 | 2015-12-23 | 成都川睿科技有限公司 | Multi-control alarm circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20160421 Address after: Wan Chun road 241000 Anhui city of Wuhu province Jiujiang Development Zone (Jiujiang Electronic Industrial Park) B Patentee after: Sea vapour electronic technology Wuhu limited company Address before: 611400 Chengdu Province, Xinjin City, Tianjin town, five Jin West Street, too up Patentee before: CHENGDU CHUANRUI SCIENCE & TECHNOLOGY CO., LTD. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160113 Termination date: 20190930 |