CN204946902U - CMOS image sensor - Google Patents
CMOS image sensor Download PDFInfo
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- CN204946902U CN204946902U CN201520627123.8U CN201520627123U CN204946902U CN 204946902 U CN204946902 U CN 204946902U CN 201520627123 U CN201520627123 U CN 201520627123U CN 204946902 U CN204946902 U CN 204946902U
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Abstract
The utility model discloses a kind of cmos image sensor, it comprises filter, photosensitive active circuit element, silicon substrate, microlens array, metal interconnection dielectric layer, metal interconnection layer, silicon substrate epitaxial loayer, photosensitive active circuit element in silicon substrate epitaxial loayer corresponding below every block lenticule of microlens array and corresponding silicon substrate epitaxial layer region is a pixel cell, also comprise the silicon substrate reflecting curved surface block array being arranged on silicon substrate bottom surface, the curved surface top layer of silicon substrate reflecting curved surface block array is provided with reflecting medium layer, the exhausted potential barrier of pixel separation is provided with between adjacent two pixel cells, the exhausted potential barrier of each pixel separation extends downward through silicon substrate.The utility model can improve opto-electronic conversion quantum efficiency, reduces charge carrier signal cross-talk simultaneously, improves the image quality of imageing sensor under details in a play not acted out on stage, but told through dialogues environment.
Description
Technical field
The utility model belongs to semiconductor solid-state imaging device technology field, is specifically related to a kind of cmos image sensor.
Technical background
Complementary metal oxide image sensor because of its manufacturing process mutually compatible with manufacturing process such as signal processing chips, be easy to integrated system-on-chip, power consumption has greater advantage compared to charge coupled device class transducer simultaneously, utilize image procossing noise reduction algorithm to improve signal to noise ratio, therefore taken advantage in image sensor application field status.
The important characteristic index of imageing sensor one is exactly photosensitivity, especially under low-light (level) applied environment, plays a crucial role for picture quality.Conventional images transducer, as shown in Figure 1, comprise filter 2, photosensitive active circuit element 4, silicon substrate 6, be arranged on the microlens array 1 of filter 2 end face, be arranged on the metal interconnection dielectric layer 3 of filter 2 bottom surface, mate with photosensitive active circuit element 4 and be positioned at the metal interconnection layer 5 of metal interconnection dielectric layer 3, be positioned at the silicon substrate epitaxial loayer 7 of silicon substrate 6 end face, described photosensitive active circuit element 4 is arranged in silicon substrate epitaxial loayer 7, the end face of described silicon substrate epitaxial loayer 7 is arranged on metal interconnection dielectric layer 3 bottom surface, photosensitive active circuit element 4 in silicon substrate epitaxial loayer 7 corresponding below every block lenticule of microlens array 1 and corresponding silicon substrate epitaxial loayer 7 region is a pixel cell, the exhausted potential barrier 8 of pixel separation is provided with between adjacent two pixel cells.
The quantum efficiency improving opto-electronic conversion is wanted for this traditional imageing sensor, the particularly quantum efficiency of long wavelength, the method of usual employing is the depletion region depth increasing PN junction in silicon epitaxy layer, such as adopts darker ion implantation or low-doped silicon substrate epitaxial loayer.But the depletion depth of this kind of approach silicon substrate is still limited.And because the long wavelength light line absorption degree of depth is comparatively large, the charge carrier that substrate depths produces easily exceeds the control area of drift field, diffuses laterally in neighbor, produces signal cross-talk.In addition, if isolated potential barrier is not accomplished enough dark between the region neighbor for substrate depths, do not stop photo-generated carrier horizontal proliferation, easily produce signal cross-talk yet.The signal cross-talk that this horizontal proliferation brings can produce harmful effect to the imaging resolution under half-light and color noise.
Utility model content
The purpose of this utility model is for above-mentioned technical problem, a kind of cmos image sensor is provided, this transducer can improve opto-electronic conversion quantum efficiency, reduces charge carrier signal cross-talk simultaneously, improves the image quality of imageing sensor under details in a play not acted out on stage, but told through dialogues environment.
For realizing this object, cmos image sensor designed by the utility model, it comprises filter, photosensitive active circuit element, silicon substrate, be arranged on the microlens array of filter end face, be arranged on the metal interconnection dielectric layer of filter bottom surface, mate with photosensitive active circuit element and be positioned at the metal interconnection layer of metal interconnection dielectric layer, be positioned at the silicon substrate epitaxial loayer of silicon substrate end face, photosensitive active circuit element is arranged in silicon substrate epitaxial loayer, the end face of silicon substrate epitaxial loayer is arranged on metal interconnection dielectric layer bottom surface, photosensitive active circuit element in silicon substrate epitaxial loayer corresponding below every block lenticule of microlens array and corresponding silicon substrate epitaxial layer region is a pixel cell, it is characterized in that: it also comprises the silicon substrate reflecting curved surface block array being arranged on silicon substrate bottom surface, each silicon substrate reflecting curved surface block one_to_one corresponding in every block lenticule in microlens array and silicon substrate reflecting curved surface block array and coaxially arranging, the curved surface top layer of silicon substrate reflecting curved surface block array is provided with reflecting medium layer,
Be provided with the exhausted potential barrier of pixel separation between adjacent two pixel cells, the exhausted potential barrier of each pixel separation extends downward through silicon substrate.
The reflectivity range formed between described silicon substrate reflecting curved surface block array and reflecting medium layer is 20 ~ 50%.
The beneficial effects of the utility model are:
The utility model make use of the boundary reflection effect (reflectivity range namely formed between silicon substrate reflecting curved surface block array and reflecting medium layer is 20 ~ 50%) of the dielectric layer of silicon and high index of refraction, can the light portion of depths in silicon substrate ground be reflexed in silicon substrate uptake zone again, make it again absorb and convert photo-generated carrier to, simultaneously because the three dimension arch interface of silicon substrate reflecting curved surface block array is to the reflecting focal effect of light, the substrate uptake zone that reflection ray did not enter or seldom entered into adjacent pixel unit can be controlled.And because silicon substrate reflecting curved surface block array (three dimension arch interface), in the region that pixel is adjacent with pixel, silicon substrate is thinner, and dielectric layer is thicker, add the isolated potential barrier adopting deep trouth or ion implantation to be formed between pixel, stop the horizontal proliferation of photo-generated carrier.Therefore, while raising opto-electronic conversion quantum efficiency, improve the ability of the dual anti-signal cross-talk of optics and electricity.
Accompanying drawing explanation
Fig. 1 is the structural representation of existing complementary metal oxide image sensor;
Fig. 2 is structural representation of the present utility model;
In figure, e represents the trend of electronics, and electronics can bring the harmful effect of signal cross-talk in the left and right diffusion of substrate depths.
Wherein, 1-lenticule, 2-filter, 3-metal interconnection dielectric layer, 4-photosensitive active circuit element, 5-metal interconnection layer, 6-silicon substrate, 7-silicon substrate epitaxial loayer, the exhausted potential barrier of 8-pixel separation, 9-reflecting medium layer, 10-silicon substrate reflecting curved surface block array, 11-slide glass wafer layer.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described in further detail:
Cmos image sensor of the present utility model, as shown in Figure 2, it comprises filter 2, photosensitive active circuit element 4, silicon substrate 6, be arranged on the microlens array 1 (be arranged side by side by multiple lenticule and formed) of filter 2 end face, be arranged on the metal interconnection dielectric layer 3 of filter 2 bottom surface, mate with photosensitive active circuit element 4 and be positioned at the metal interconnection layer 5 of metal interconnection dielectric layer 3, be positioned at the silicon substrate epitaxial loayer 7 of silicon substrate 6 end face, photosensitive active circuit element 4 is arranged in silicon substrate epitaxial loayer 7, photosensitive active circuit element 4 is for controlling the pixel cell operation needed for cmos image sensor imaging, signal amplifies and Signal transmissions, the end face of silicon substrate epitaxial loayer 7 is arranged on metal interconnection dielectric layer 3 bottom surface, photosensitive active circuit element 4 in silicon substrate epitaxial loayer 7 corresponding below every block lenticule of microlens array 1 and corresponding silicon substrate epitaxial loayer 7 region is that a pixel cell (comprises photodiode, reset transistor, transmission transistor, source follower transistor, the row gate transistor etc. of pixel unit array), it is characterized in that: it also comprises the silicon substrate reflecting curved surface block array 10 (be arranged side by side by multiple silicon substrate reflecting curved surface block and formed) being arranged on silicon substrate 6 bottom surface, each silicon substrate reflecting curved surface block one_to_one corresponding in every block lenticule in microlens array 1 and silicon substrate reflecting curved surface block array 10 and coaxially arranging, the curved surface top layer of silicon substrate reflecting curved surface block array 10 is provided with reflecting medium layer 9, the reflectivity range formed between described silicon substrate reflecting curved surface block array 10 and reflecting medium layer 9 is 20 ~ 50%, this reflectivity range is under ensureing that the utility model has the prerequisite of above-mentioned beneficial effect, and manufacturing process is relatively simple, is beneficial to volume production.
Be provided with the exhausted potential barrier 8 of pixel separation between adjacent two pixel cells, the exhausted potential barrier 8 of each pixel separation extends downward through silicon substrate 6, and effect is that the electronics of depths can not pass through the exhausted potential barrier 8 of pixel separation and arrive neighbor, thus decreases electrical cross talk.Technique scheme of the present utility model can improve the quantum efficiency of opto-electronic conversion, particularly the quantum efficiency of long wavelength's light, reduces the crosstalk of long wavelength light signal simultaneously, comprises optical crosstalk and cross talk of electrons.Thus effectively improve the photosensitivity of imageing sensor at low irradiance, and the image quality of long wavelength particularly ruddiness and near infrared light.
In technique scheme, the bottom surface of described reflecting medium layer 9 is provided with slide glass wafer layer 11.Slide glass wafer layer 11 ensure that the utility model has certain intensity in use, manufacture and transportation.
In technique scheme, described reflecting medium layer 9 is 1.4 ~ 2.3 to the refractive index of 400 ~ 1100 nanometer optical waves.This ranges of indices of refraction is under ensureing that the utility model has the prerequisite of above-mentioned beneficial effect, and manufacturing process is relatively simple, is beneficial to volume production.
In technique scheme, the thickness of described silicon substrate 6 is 1 ~ 20 micron; In described silicon substrate reflecting curved surface block array 10, the relief height of each silicon substrate reflecting curved surface block is equal and the scope of relief height is 0.5 ~ 5 micron.This size range is conducive to the curvature of silicon substrate reflecting curved surface block and the pixel length of side matches.
In technique scheme, described silicon substrate 6 is identical with the material of silicon substrate reflecting curved surface block array 10 is silicon crystal, the sheet resistance of silicon substrate 6 and silicon substrate reflecting curved surface block array 10 between 1 ~ 2000 ohm * centimetre, the also substrate of optional gradual change dopant concentration;
Described reflecting medium layer 9 is the mixed layer of silicon oxide layer or silicon nitride layer or nitrogen oxide silicon or silica, silicon nitride and nitrogen oxide silicon;
In technique scheme, described reflecting medium layer 9 is also alumina layer or hafnium oxide layer or tantalum oxide layers;
Or reflecting medium layer 9 is also the mixed reflection dielectric layer be made up of silica, silicon nitride, nitrogen oxide silicon, aluminium oxide, hafnium oxide, tantalum oxide metallic aluminium and tungsten.
Above-mentioned reflecting medium layer 9 can on low refractive index dielectric layer or high refractive index medium layer covering metal layer, metal level is aluminium lamination or tungsten layer.Above-mentioned reflecting medium layer 9 can continue to do cmp, improves evenness.Then deposit or bonding light absorbing zone can be continued in reflecting medium layer 9, to reduce the crosstalk that pixel is mixed with light signal further.
In technique scheme, described silicon substrate epitaxial loayer 7 is N type semiconductor or P type semiconductor, doping content at 1E+12 atom/cubic centimetre to 1E+16 atom/cubic centimetre.Silicon substrate epitaxial loayer 7 adulterates also can adopt graded concentration.
A manufacture method for above-mentioned cmos image sensor, it comprises the steps:
Step 1: silicon substrate 6 is set, and silicon substrate epitaxial loayer 7 is generated in epitaxially grown mode on silicon substrate 6;
Step 2: manufacture pixel cell in silicon substrate epitaxial loayer 7;
Step 3: adopt deep trench isolation or ion implantation to form the exhausted potential barrier 8 of pixel separation between adjacent two pixel cells, the exhausted potential barrier 8 of each pixel separation extends downward through silicon substrate 6;
Step 4: arrange metal interconnection dielectric layer 3 at the end face of silicon substrate epitaxial loayer 7, makes the metal interconnection layer 5 mated with the photosensitive active circuit element 4 in pixel cell in metal interconnection dielectric layer 3;
Step 5: after formation metal interconnection layer 5, adopted by metal interconnection dielectric layer 3 end face the mode of interim bonding that temporary carrier wafer (the temporary carrier wafer side of setting continues the making of silicon substrate reflecting curved surface block array 10 and deposit reflecting medium layer 9 after an action of the bowels) is set, then (the absorption degree of depth of light in silicon substrate 6 is greatly about 1 ~ 5um silicon substrate 6 to be thinned to 1 ~ 20 micron, the absorption degree of depth of long wavelength is larger, if subtract thin not, the exhausted potential barrier 8 of pixel separation does not just reach the effect of insulating electron, and is difficult to the route controlling reflecting medium layer 9 reverberation);
Step 6: after silicon substrate 6 is thinning, arranges silicon substrate reflecting curved surface block array 10 in silicon substrate 6 bottom surface; Producing dark current for reducing silicon substrate 6 surface recombination center, affecting picture quality, ion implantation can be carried out on silicon substrate 6 surface, and be annealed;
Step 7: deposit reflecting medium layer 9 on silicon substrate reflecting curved surface block array 10; Because the larger difference of silicon substrate reflecting curved surface block array 10 (silicon crystal) and reflecting medium layer 9 refractive index, reflection effect is formed at the interface of two kinds of materials, can reflect light to largely in silicon substrate 6, refractive index difference is larger, boundary reflection rate is larger, and reverberation is again absorbed in silicon substrate 6, improves light conversion quantum efficiency, especially for the light of long wavelength, effect is particularly remarkable;
In addition, because reflecting medium layer 9 has the effect being similar to concave mirror, the light overwhelming majority of reflection only reflexes in the pixel (pixel that silicon substrate reflecting curved surface block is corresponding) of self, therefore optical crosstalk is reduced, simultaneously because the junction depth needed for photodiode does not increase, do not have influence on carrier transport efficiency, in addition, due to curve form, between adjacent two pixel cells, the thickness of the silicon substrate 6 of part is relatively little, and reflecting medium layer 9 (dielectric) is thicker, the charge carrier produced is difficult to cross potential barrier and is diffused in adjacent pixel unit, therefore electrical cross talk is also significantly inhibited,
Step 7.1: mode planarization reflecting medium layer 9 being adopted cmp;
Step 8: the bonding slide glass wafer layer 11 again in the bottom surface of reflecting medium layer 9, then just the temporary carrier wafer of metal interconnection dielectric layer 3 end face is peeled off, after stripping, make filter 2 at metal interconnection dielectric layer 3 end face, make microlens array 1 at filter 2 end face.
In technique scheme, the method of silicon substrate reflecting curved surface block array 10 is set in silicon substrate 6 bottom surface in described step 6 for adopting photoresist exposure, the mode of post-development heat baking first forms the micro-surface of surface patch, then take the method for plasma etching to be transferred to by curve form on silicon substrate 6, silicon substrate 6 is formed silicon substrate reflecting curved surface block 10.
In the step 5 of technique scheme, grinding, chemistry or the method for plasma etching is adopted by silicon substrate 6 to be thinned to 1 ~ 20 micron.Also grinding, chemistry or the mixed method of plasma etching can be adopted thinning.
Above-mentioned cmos image sensor manufacture method is while the quantum efficiency improving opto-electronic conversion, do not have influence on carrier transport efficiency, and signal cross-talk between pixel can be suppressed significantly, thus improve the image quality under image quality, particularly half-light.
Above to a kind of cmos image sensor manufacture method that the utility model embodiment provides, be described in detail, apply specific case herein to set forth principle of the present utility model and execution mode, the explanation of above embodiment just understands method of the present utility model and core concept thereof for helping; Meanwhile, for one of ordinary skill in the art, according to thought of the present utility model, all will change in specific embodiments and applications, in sum, this description should not be construed as restriction of the present utility model.
The content that this specification is not described in detail belongs to the known prior art of professional and technical personnel in the field.
Claims (5)
1. a cmos image sensor, it comprises filter (2), photosensitive active circuit element (4), silicon substrate (6), be arranged on the microlens array (1) of filter (2) end face, be arranged on the metal interconnection dielectric layer (3) of filter (2) bottom surface, mate with photosensitive active circuit element (4) and be positioned at the metal interconnection layer (5) of metal interconnection dielectric layer (3), be positioned at the silicon substrate epitaxial loayer (7) of silicon substrate (6) end face, photosensitive active circuit element (4) is arranged in silicon substrate epitaxial loayer (7), the end face of silicon substrate epitaxial loayer (7) is arranged on metal interconnection dielectric layer (3) bottom surface, photosensitive active circuit element (4) in silicon substrate epitaxial loayer (7) corresponding below every block lenticule of microlens array (1) and corresponding silicon substrate epitaxial loayer (7) region is a pixel cell, it is characterized in that: it also comprises the silicon substrate reflecting curved surface block array (10) being arranged on silicon substrate (6) bottom surface, each silicon substrate reflecting curved surface block one_to_one corresponding in every block lenticule in microlens array (1) and silicon substrate reflecting curved surface block array (10) and coaxially arranging, the curved surface top layer of silicon substrate reflecting curved surface block array (10) is provided with reflecting medium layer (9),
Be provided with the exhausted potential barrier of pixel separation (8) between adjacent two pixel cells, the exhausted potential barrier of each pixel separation (8) extends downward through silicon substrate (6).
2. cmos image sensor according to claim 1, is characterized in that: the reflectivity range formed between described silicon substrate reflecting curved surface block array (10) and reflecting medium layer (9) is 20 ~ 50%.
3. cmos image sensor according to claim 1, is characterized in that: the bottom surface of described reflecting medium layer (9) is provided with slide glass wafer layer (11).
4. cmos image sensor according to claim 1, is characterized in that: described reflecting medium layer (9) is 1.4 ~ 2.3 to the refractive index of 400 ~ 1100 nanometer optical waves.
5. cmos image sensor according to claim 1, is characterized in that: the thickness of described silicon substrate (6) is 1 ~ 20 micron; In described silicon substrate reflecting curved surface block array (10), the relief height of each silicon substrate reflecting curved surface block is equal and the scope of relief height is 0.5 ~ 5 micron.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520627123.8U CN204946902U (en) | 2015-08-19 | 2015-08-19 | CMOS image sensor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201520627123.8U CN204946902U (en) | 2015-08-19 | 2015-08-19 | CMOS image sensor |
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| CN204946902U true CN204946902U (en) | 2016-01-06 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185800A (en) * | 2015-08-19 | 2015-12-23 | 启芯瑞华科技（武汉）有限公司 | Complementary metal oxide semiconductor image sensor and manufacturing method thereof |
| CN107919374A (en) * | 2017-12-15 | 2018-04-17 | 德淮半导体有限公司 | A kind of imaging sensor and forming method thereof |
| CN109411491A (en) * | 2017-08-17 | 2019-03-01 | 台湾积体电路制造股份有限公司 | Integrated chip and Image Sensor and forming method thereof |
| CN109983580A (en) * | 2016-12-05 | 2019-07-05 | 凸版印刷株式会社 | Solid-state image pickup element |
| CN110729320A (en) * | 2019-10-18 | 2020-01-24 | 深圳市光微科技有限公司 | Pixel unit, TOF image sensor including the same, and imaging apparatus |
-
2015
- 2015-08-19 CN CN201520627123.8U patent/CN204946902U/en not_active Withdrawn - After Issue
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105185800A (en) * | 2015-08-19 | 2015-12-23 | 启芯瑞华科技（武汉）有限公司 | Complementary metal oxide semiconductor image sensor and manufacturing method thereof |
| CN105185800B (en) * | 2015-08-19 | 2017-08-25 | 启芯瑞华科技（武汉）有限公司 | Cmos image sensor and its manufacture method |
| CN109983580A (en) * | 2016-12-05 | 2019-07-05 | 凸版印刷株式会社 | Solid-state image pickup element |
| CN109411491A (en) * | 2017-08-17 | 2019-03-01 | 台湾积体电路制造股份有限公司 | Integrated chip and Image Sensor and forming method thereof |
| CN109411491B (en) * | 2017-08-17 | 2024-06-11 | 台湾积体电路制造股份有限公司 | Integrated chip and image sensor and forming method thereof |
| CN107919374A (en) * | 2017-12-15 | 2018-04-17 | 德淮半导体有限公司 | A kind of imaging sensor and forming method thereof |
| CN110729320A (en) * | 2019-10-18 | 2020-01-24 | 深圳市光微科技有限公司 | Pixel unit, TOF image sensor including the same, and imaging apparatus |
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Granted publication date: 20160106 Effective date of abandoning: 20170825 |
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| AV01 | Patent right actively abandoned |