CN204908704U - Semiconductor refrigeration mattress circuit - Google Patents
Semiconductor refrigeration mattress circuit Download PDFInfo
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- CN204908704U CN204908704U CN201520382474.7U CN201520382474U CN204908704U CN 204908704 U CN204908704 U CN 204908704U CN 201520382474 U CN201520382474 U CN 201520382474U CN 204908704 U CN204908704 U CN 204908704U
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- Devices For Blowing Cold Air, Devices For Blowing Warm Air, And Means For Preventing Water Condensation In Air Conditioning Units (AREA)
Abstract
The utility model discloses a semiconductor refrigeration mattress circuit, including chip IC1, one -way silicon controlled rectifier Q1, rectifier bridge T and transformer W, chip IC1's 1 pin connecting resistance R3, resistance R4, electric capacity C3, potentiometre RP1's slip end, potentiometre RP1's a stiff end, chip IC2's 4 pins, chip IC3's 4 pins and chip IC4's 3 pins, chip IC1's 2 pin connecting resistance R1 and electric capacity C1, electric capacity C1's other end connecting resistance R2 and triode VT1's base. The utility model discloses semiconductor refrigeration mattress circuit uses the cooling structure of semiconductor refrigeration piece as the mattress to use pyroelectric sensor as switch element, someone is in bed and the bed temperature is higher than can intelligence open when setting for the temperature, and the people leaves bed or temperature and reduces and turn -off when following to setting for the temperature, so the circuit has saving electric energy, intelligent control and convenient to use's advantage.
Description
Technical field
The utility model relates to a kind of mattress, specifically a kind of semiconductor refrigerating mattress circuit.
Background technology
Electric blanket is warming tool common in daily life, people are brought warm in winter, but but do not have to make the household articles that on bed, temperature reduces in summer, the air-conditioning bed mattress released in recent years can effectively address these problems, but the most complex structure of air-conditioning bed mattress in the market, power consumption are high, and therefore popularity rate is not high.
Utility model content
The purpose of this utility model is to provide the semiconductor refrigerating mattress circuit that a kind of structure is simple, save electric energy, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme:
A kind of semiconductor refrigerating mattress circuit, comprise chip IC 1, one-way SCR Q1, rectifier bridge T and transformer W, 1 pin contact resistance R3 of described chip IC 1, resistance R4, electric capacity C3, the sliding end of potentiometer RP1, a stiff end of potentiometer RP1, 4 pins of chip IC 2, 4 pins of chip IC 3 and 3 pins of chip IC 4, 2 pin contact resistance R1 of chip IC 1 and electric capacity C1, the other end contact resistance R2 of electric capacity C1 and the base stage of triode VT1, the other end of the colelctor electrode contact resistance R2 of triode VT1, the other end of resistance R3, the colelctor electrode of electric capacity C2 and triode VT1, the other end contact resistance R5 of electric capacity C2, the other end of resistance R5 connects 1 pin of chip IC 2, the other end of 2 pin contact resistance R4 of chip IC 2, 1 pin of resistance R6 and chip IC 3, the other end of 3 pin contact resistance R1 of chip IC 1, the other end of resistance R6, resistance R7, electric capacity C6, a stiff end of potentiometer RP2, the emitter stage of triode VT1, semiconductor refrigerating block G, 5 pins of chip IC 2 ~ IC3 and 2 ports of rectifier bridge T, the other end of another stiff end contact resistance R7 of potentiometer RP1 and 1 pin of chip IC 3, 3 pins of chip IC 2 connect 1 pin of NAND gate U1, 3 pins of chip IC 3 connect 2 pins of NAND gate U1, 3 pins of NAND gate U1 connect 1 pin of NAND gate U2 and 2 pins of NAND gate U2 respectively, 3 pins of NAND gate U2 connect the anode of diode D1, the negative electrode of diode D1 connects the other end of electric capacity C6, another stiff end of potentiometer RP2, the sliding end of potentiometer RP2, 1 pin of NAND gate U3 and 2 pins of NAND gate U3, 3 pins of NAND gate U3 connect 1 pin and 2 pins of NAND gate U4 respectively, the 3 pin contact resistance R9 of NAND gate U4, the other end of resistance R9 connects the control pole of one-way SCR Q1, the anode contact resistance R8 of one-way SCR Q1 and 4 ports of rectifier bridge T, the other end of resistance R8 connects electric capacity C4, 1 pin of electric capacity C5 and chip IC 4, ground connection after the other end of electric capacity C3 ~ C5 is connected with 2 pins of chip IC 4, the negative electrode of one-way SCR Q1 connects the other end of semiconductor refrigerating block G, the two ends of the winding L 1 of 1 port of rectifier bridge T and 3 ports difference connection transformer W, one end of the winding L 2 of transformer W connects fuse FU, the other end of the winding L 2 of transformer W connects 220VAC, the other end of fuse FU connects the other end of 220VAC.
As preferred version of the present utility model: described chip IC 1 is PIS209 type Thermoelectric Infrared Sensor, and described chip IC 2 and chip IC 3 are LM32 type operational amplifier, described chip IC 4 is 7805 three terminal regulators.
Compared with prior art, the beneficial effects of the utility model are: the utility model semiconductor refrigerating mattress circuit uses semiconductor refrigerating block as the cooling structure of mattress, and use pyroelectric sensor as switch element, someone in bed and on bed temperature higher than can intelligent opening during design temperature, people leaves when bed or temperature are reduced to below design temperature and turns off, and therefore circuit has and saves electric energy, Based Intelligent Control and advantage easy to use.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of semiconductor refrigerating mattress circuit.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1, a kind of semiconductor refrigerating mattress circuit, comprise chip IC 1, one-way SCR Q1, rectifier bridge T and transformer W, 1 pin contact resistance R3 of described chip IC 1, resistance R4, electric capacity C3, the sliding end of potentiometer RP1, a stiff end of potentiometer RP1, 4 pins of chip IC 2, 4 pins of chip IC 3 and 3 pins of chip IC 4, 2 pin contact resistance R1 of chip IC 1 and electric capacity C1, the other end contact resistance R2 of electric capacity C1 and the base stage of triode VT1, the other end of the colelctor electrode contact resistance R2 of triode VT1, the other end of resistance R3, the colelctor electrode of electric capacity C2 and triode VT1, the other end contact resistance R5 of electric capacity C2, the other end of resistance R5 connects 1 pin of chip IC 2, the other end of 2 pin contact resistance R4 of chip IC 2, 1 pin of resistance R6 and chip IC 3, the other end of 3 pin contact resistance R1 of chip IC 1, the other end of resistance R6, resistance R7, electric capacity C6, a stiff end of potentiometer RP2, the emitter stage of triode VT1, semiconductor refrigerating block G, 5 pins of chip IC 2 ~ IC3 and 2 ports of rectifier bridge T, the other end of another stiff end contact resistance R7 of potentiometer RP1 and 1 pin of chip IC 3, 3 pins of chip IC 2 connect 1 pin of NAND gate U1, 3 pins of chip IC 3 connect 2 pins of NAND gate U1, 3 pins of NAND gate U1 connect 1 pin of NAND gate U2 and 2 pins of NAND gate U2 respectively, 3 pins of NAND gate U2 connect the anode of diode D1, the negative electrode of diode D1 connects the other end of electric capacity C6, another stiff end of potentiometer RP2, the sliding end of potentiometer RP2, 1 pin of NAND gate U3 and 2 pins of NAND gate U3, 3 pins of NAND gate U3 connect 1 pin and 2 pins of NAND gate U4 respectively, the 3 pin contact resistance R9 of NAND gate U4, the other end of resistance R9 connects the control pole of one-way SCR Q1, the anode contact resistance R8 of one-way SCR Q1 and 4 ports of rectifier bridge T, the other end of resistance R8 connects electric capacity C4, 1 pin of electric capacity C5 and chip IC 4, ground connection after the other end of electric capacity C3 ~ C5 is connected with 2 pins of chip IC 4, the negative electrode of one-way SCR Q1 connects the other end of semiconductor refrigerating block G, the two ends of the winding L 1 of 1 port of rectifier bridge T and 3 ports difference connection transformer W, one end of the winding L 2 of transformer W connects fuse FU, the other end of the winding L 2 of transformer W connects 220VAC, the other end of fuse FU connects the other end of 220VAC.
Described chip IC 1 is PIS209 type Thermoelectric Infrared Sensor, and described chip IC 2 and chip IC 3 are LM32 type operational amplifier, and described chip IC 4 is 7805 three terminal regulators.
Operation principle of the present utility model is: 220V civil power is through transformer W step-down pressure, stream bridge T rectification, power to after three terminal regulator 7805 voltage stabilizing each control circuit, respond to human body infrared: when the infrared signal that the human body radiation that Thermoelectric Infrared Sensor IC1 detects on bed goes out, 2 pin of this sensor export the faint signal of telecommunication, be coupled through electric capacity C1, again through C2 after triode VT1 amplifies, R4, be input in operational amplifier IC1, because of IC1, C2, the elements such as R4 form comparator, when the 1 pin current potential of amplifier IC3 is greater than 2 pin current potential, its 3 pin exports high level, send in 4 NAND gate circuits.Resistance R6, potentiometer RP1, thermistor R7 form bridge circuit, for the change of detected temperatures, change desired temperature by regulating RP1, when temperature is higher than setting value, the 2 pin current potentials of IC3 are lower than 1 pin current potential, and 3 pin of IC3 export high level, deliver to 2 pin of NAND gate U1.Four NAND gates and electric capacity C6, diode D1 form delay driving circuit.Under these conditions, U1 two input is all high level, therefore exports as low level, and after U2 is anti-phase, export high level, D1 conducting, C6 is charged, when the current potential on C6 rises to high level.After U3, U4 two-stage is anti-phase, exports high level triggering unidirectional thyristor makes its conducting, semiconductor refrigerating block G obtains electric work, plays the effect of cooling.
Claims (2)
1. a semiconductor refrigerating mattress circuit, comprises chip IC 1, one-way SCR Q1, rectifier bridge T and transformer W, it is characterized in that, 1 pin contact resistance R3 of described chip IC 1, resistance R4, electric capacity C3, the sliding end of potentiometer RP1, a stiff end of potentiometer RP1, 4 pins of chip IC 2, 4 pins of chip IC 3 and 3 pins of chip IC 4, 2 pin contact resistance R1 of chip IC 1 and electric capacity C1, the other end contact resistance R2 of electric capacity C1 and the base stage of triode VT1, the other end of the colelctor electrode contact resistance R2 of triode VT1, the other end of resistance R3, the colelctor electrode of electric capacity C2 and triode VT1, the other end contact resistance R5 of electric capacity C2, the other end of resistance R5 connects 1 pin of chip IC 2, the other end of 2 pin contact resistance R4 of chip IC 2, 1 pin of resistance R6 and chip IC 3, the other end of 3 pin contact resistance R1 of chip IC 1, the other end of resistance R6, resistance R7, electric capacity C6, a stiff end of potentiometer RP2, the emitter stage of triode VT1, semiconductor refrigerating block G, 5 pins of chip IC 2 ~ IC3 and 2 ports of rectifier bridge T, the other end of another stiff end contact resistance R7 of potentiometer RP1 and 1 pin of chip IC 3, 3 pins of chip IC 2 connect 1 pin of NAND gate U1, 3 pins of chip IC 3 connect 2 pins of NAND gate U1, 3 pins of NAND gate U1 connect 1 pin of NAND gate U2 and 2 pins of NAND gate U2 respectively, 3 pins of NAND gate U2 connect the anode of diode D1, the negative electrode of diode D1 connects the other end of electric capacity C6, another stiff end of potentiometer RP2, the sliding end of potentiometer RP2, 1 pin of NAND gate U3 and 2 pins of NAND gate U3, 3 pins of NAND gate U3 connect 1 pin and 2 pins of NAND gate U4 respectively, the 3 pin contact resistance R9 of NAND gate U4, the other end of resistance R9 connects the control pole of one-way SCR Q1, the anode contact resistance R8 of one-way SCR Q1 and 4 ports of rectifier bridge T, the other end of resistance R8 connects electric capacity C4, 1 pin of electric capacity C5 and chip IC 4, ground connection after the other end of electric capacity C3 ~ C5 is connected with 2 pins of chip IC 4, the negative electrode of one-way SCR Q1 connects the other end of semiconductor refrigerating block G, the two ends of the winding L 1 of 1 port of rectifier bridge T and 3 ports difference connection transformer W, one end of the winding L 2 of transformer W connects fuse FU, the other end of the winding L 2 of transformer W connects 220VAC, the other end of fuse FU connects the other end of 220VAC.
2. a kind of semiconductor refrigerating mattress circuit according to claim 1, it is characterized in that, described chip IC 1 is PIS209 type Thermoelectric Infrared Sensor, and described chip IC 2 and chip IC 3 are LM32 type operational amplifier, and described chip IC 4 is 7805 three terminal regulators.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520382474.7U CN204908704U (en) | 2015-06-07 | 2015-06-07 | Semiconductor refrigeration mattress circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520382474.7U CN204908704U (en) | 2015-06-07 | 2015-06-07 | Semiconductor refrigeration mattress circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204908704U true CN204908704U (en) | 2015-12-30 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520382474.7U Expired - Fee Related CN204908704U (en) | 2015-06-07 | 2015-06-07 | Semiconductor refrigeration mattress circuit |
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| Country | Link |
|---|---|
| CN (1) | CN204908704U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106766567A (en) * | 2016-12-14 | 2017-05-31 | 陆丽曼 | A kind of biomass energy converting apparatus with intelligent refrigerating function |
| CN107594991A (en) * | 2017-10-10 | 2018-01-19 | 佛山市三水区白坭镇巨财红木厂 | A kind of highest-ranking imperial concubine's chair with refrigerating function |
| WO2020173375A1 (en) * | 2019-02-26 | 2020-09-03 | 华为技术有限公司 | Multi-intelligent device linkage control method, device and system |
-
2015
- 2015-06-07 CN CN201520382474.7U patent/CN204908704U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106766567A (en) * | 2016-12-14 | 2017-05-31 | 陆丽曼 | A kind of biomass energy converting apparatus with intelligent refrigerating function |
| CN107594991A (en) * | 2017-10-10 | 2018-01-19 | 佛山市三水区白坭镇巨财红木厂 | A kind of highest-ranking imperial concubine's chair with refrigerating function |
| WO2020173375A1 (en) * | 2019-02-26 | 2020-09-03 | 华为技术有限公司 | Multi-intelligent device linkage control method, device and system |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151230 Termination date: 20160607 |