CN204904127U - Electric current limit circuit and integrated circuit - Google Patents
Electric current limit circuit and integrated circuit Download PDFInfo
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- CN204904127U CN204904127U CN201520449429.9U CN201520449429U CN204904127U CN 204904127 U CN204904127 U CN 204904127U CN 201520449429 U CN201520449429 U CN 201520449429U CN 204904127 U CN204904127 U CN 204904127U
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Abstract
The utility model discloses an electric current limit circuit and integrated circuit, this integrated circuit include electric current limit circuit, and this electric current limit circuit is used for various circuit system's arrival current amplitude limiting, including first amplitude limiting module, second amplitude limiting module, third amplitude limiting module. First amplitude limiting module, second amplitude limiting module and third amplitude limiting module are all connected between the input of the output of higher level's current signal and subordinate's current signal, first amplitude limiting module is used for restricting the maximum value of the circuit arrival current of subordinate signal, and second amplitude limiting module is used for restricting the minimum of the circuit arrival current of subordinate signal, and third amplitude limiting module is used for restricting the maximum value and the minimum of the circuit arrival current of subordinate signal, through the combination with the first amplitude limiting module of the aforesaid, second amplitude limiting module, third amplitude limiting module or above -mentioned three amplitude limiting module for even the scope of the output electric current of higher level's circuit surpasss the rated range of subordinate's circuit, the corresponding circuit of subordinate also can normally be worked.
Description
Technical field
The utility model relates to electric circuit electronics technical field, relates to a kind of current limit circuit extensively but be not limited to be applied in integrated circuit (IC) design.
Background technology
Current mirror technique is applied widely in analogue layout, and be the electrical block diagram of existing nmos type current mirror with reference to Fig. 1 and Fig. 2, Fig. 1, Fig. 2 is the electrical block diagram of existing pmos type current mirror; When inputting a reference current Iin at the input end of current mirror, the output terminal of current mirror will obtain all consistent with the reference current output current Iout of a size and Orientation.
Current mirroring circuit structure is simple, and signal input range is large, and the gain of electric current is simply controlled by the number changing MOS.But in the process of process current signal, the output current Iout of current mirror may be used for for next stage circuit provides the input of current offset or current signal, because subordinate's circuit all can have the working range of electrical specification, if exceed this scope, circuit is by cisco unity malfunction, thus, require that output current Iout also can change in given range.
Utility model content
Fundamental purpose of the present utility model is to provide a kind of current limit circuit, aims to provide the current mirroring circuit that a kind of output current can limit.
For achieving the above object, the utility model provides a kind of current limit circuit, this current limit circuit is used for the amplitude limit of the input current signal of circuit at different levels, it comprises the first clipping module and/or the second clipping module and/or the 3rd clipping module, described first clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit the maximal value of subordinate's circuit input current signal; Described second clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit the minimum value of subordinate's circuit input current signal; Described 3rd clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit maximal value and the minimum value of subordinate's circuit input current signal.
Preferably, described first clipping module comprises the first current lens unit, the second current lens unit and the 3rd current lens unit, the input end of described first current lens unit is connected with the output terminal of described higher level's circuit current signal, and the output terminal of described first current lens unit is connected with the input end of the output terminal of the first reference current source, the second current lens unit; The output terminal of described second current lens unit is connected with the input end of the output terminal of the first reference current source, the 3rd current lens unit; The output terminal of described 3rd current lens unit is connected with the input end of subordinate's circuit current signal.
Preferably, described first current lens unit, the second current lens unit, the 3rd current lens unit are nmos type to tube current mirror, or pmos type is to tube current mirror, or positive-negative-positive is to tube current mirror, or NPN type is to tube current mirror.
Preferably, described second clipping module comprises the 4th current lens unit, the 5th current lens unit and the 6th current lens unit, the input end of described 4th current lens unit is connected with the output terminal of described higher level's circuit current signal, and the output terminal of described 4th current lens unit is connected with the input end of the output terminal of the second reference current source, the 5th current lens unit; The output terminal of described 5th current lens unit is connected with the input end of the output terminal of the second reference current source, the 6th current lens unit; The output terminal of described 6th current lens unit is connected with the input end of subordinate's circuit current signal.
Preferably, described 4th current lens unit and the 6th current lens unit are nmos type to tube current mirror, or positive-negative-positive is to tube current mirror; Described 5th current lens unit be pmos type to tube current mirror, or NPN type is to tube current mirror.
Preferably, described 3rd clipping module comprises the 7th current lens unit, the 8th current lens unit, the 9th current lens unit, the tenth current lens unit and the 11 current lens unit, the input end of described 7th current lens unit is connected with the output terminal of described higher level's circuit current signal, and the output terminal of described 7th current lens unit is connected with the input end of the output terminal of the first reference current source, the 8th current lens unit; The output terminal of described 8th current lens unit is connected with the input end of the output terminal of the first reference current source, the 9th current lens unit; The output terminal of described 9th current lens unit is connected with the input end of the output terminal of the second reference current source, the tenth current lens unit; The output terminal of described tenth current lens unit is connected with the output terminal of the second reference current source, the input end of the 11 current lens unit; The output terminal of described 11 current lens unit is connected with the input end of subordinate's circuit current signal.
Preferably, described 7th current lens unit, the 8th current lens unit, the 9th current lens unit and the 11 current lens unit are nmos type to tube current mirror, or positive-negative-positive is to tube current mirror; Described tenth current lens unit be pmos type to tube current mirror, or NPN type is to tube current mirror.
In addition, for achieving the above object, the utility model additionally provides a kind of integrated circuit, this integrated circuit comprises current limit circuit, this current limit circuit is used for the level and smooth amplitude limit of the input current signal of circuit at different levels, it comprises the first clipping module and/or the second clipping module and/or the 3rd clipping module, and described first clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit the maximal value of subordinate's circuit input current signal; Described second clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit the minimum value of subordinate's circuit input current signal; Described 3rd clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit maximal value and the minimum value of subordinate's circuit input current signal.
A kind of current limit circuit provided by the utility model and comprise the integrated circuit of this current limit circuit, by the first clipping module by above-mentioned current limit circuit, or second clipping module, or the 3rd combination of clipping module or above-mentioned three clipping module, be connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, can to the maximal value of the input current of corresponding subordinate circuit, minimum value, maximum/minimum limits, even if thus make the electric current scope of the output terminal of higher level's circuit current signal large, corresponding subordinate circuit also can normally work.
Accompanying drawing explanation
Fig. 1 is the electrical block diagram of existing nmos type current mirror;
Fig. 2 is the electrical block diagram of existing pmos type current mirror;
Fig. 3 is the high-level schematic functional block diagram of current limit circuit one embodiment of the present utility model;
Fig. 4 is the electrical block diagram of an embodiment of the first clipping module of the utility model current limit circuit;
Fig. 5 is the electrical block diagram of an embodiment of the second clipping module of the utility model current limit circuit;
Fig. 6 is the electrical block diagram of an embodiment of the second clipping module of the utility model current limit circuit;
Fig. 7 is the input and output current waveform schematic diagram of the utility model current limit circuit.
The realization of the utility model object, functional characteristics and advantage will in conjunction with the embodiments, are described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
The utility model provides a kind of current limit circuit.
With reference to the high-level schematic functional block diagram that Fig. 3, Fig. 3 are current limit circuit one embodiment of the present utility model, in the present embodiment; This current limit circuit is used for the amplitude limit of the input current signal of circuit at different levels, it comprises the first clipping module 100 and/or the second clipping module 200 and/or the 3rd clipping module 300, described first clipping module 100 is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, with the maximal value of limiting input current signal; Described second clipping module 200 is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit the minimum value of subordinate's circuit input current signal; Described 3rd clipping module 300 is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit maximal value and the minimum value of subordinate's circuit input current signal.
Above-mentioned current limit circuit is generally used in integrated circuit (IC) design, is especially applied in the design of current mirroring circuit.The output of current mirroring circuit is generally used for other offset signal at different levels or current input signal, and the input range of current mirroring circuit is wider, other circuit at different levels is according to the electrical specification of himself, its offset signal or current input signal have amplitude to limit usually, and such as maximum amplitude limits or minimum amplitude restriction or the restriction of minimax amplitude etc.
By current limit circuit of the present utility model, first clipping module 100 is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, when the current value of the output of higher level's circuit current signal is less than the first preset reference value, by identical with the size of current of the output of higher level's circuit current signal for the size of the input current signal making this corresponding subordinate circuit current signal, direction is consistent; And when the size of the electric current of the output of higher level's circuit current signal is more than or equal to the first preset reference value, then the large young pathbreaker of the input current signal of this corresponding subordinate circuit current signal is consistent with the first preset reference value, therefore, the maximal value of the current signal of corresponding subordinate circuit current signal input is made to obtain restriction by the first clipping module 100.
Second clipping module 200 is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, when the size of the electric current that higher level's circuit current signal exports is more than or equal to the second preset reference value, by identical with the size of current that higher level's circuit current signal exports for the size of the current signal making this corresponding subordinate circuit current signal input, direction is consistent; And when the size of the electric current that higher level's circuit current signal exports is less than the second preset reference value, then the large young pathbreaker of the current signal of this subordinate's circuit current signal input is consistent with the second preset reference value, therefore, the minimum value of the current signal of corresponding subordinate circuit current signal input is made to obtain restriction by the second clipping module 200.
3rd clipping module 300 is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, when the current value that higher level's circuit current signal exports is less than the first preset reference value, by identical with the size of current that higher level's circuit current signal exports for the size of the current signal making this corresponding subordinate circuit current signal input, direction is consistent; And when the size of the electric current that higher level's circuit current signal exports is more than or equal to the first preset reference value, then the large young pathbreaker of the current signal of this corresponding subordinate circuit current signal input is consistent with the first preset reference value; When the size of the electric current that higher level's circuit current signal exports is more than or equal to the second preset reference value, by identical with the size of current that higher level's current signal exports for the size of the current signal making this corresponding subordinate circuit current signal input, direction is consistent; And when the size of the electric current that higher level's circuit current signal exports is less than the second preset reference value, then the large young pathbreaker of the current signal of this corresponding subordinate circuit current signal input is consistent with the second preset reference value, therefore, the maximal value of the current signal of corresponding subordinate circuit current signal input and minimum value is made all to obtain restriction by the 3rd clipping module 300.
Particularly, above-mentioned first preset reference value is the reference value of maximum input current, second preset reference value is the reference value of minimum input current, and the first preset reference value and the second preset reference value all can be provided by corresponding current source, concrete numerical value can be selected according to the actual requirements, in this no limit.
And above-mentioned first clipping module 100, second clipping module 200 and the 3rd clipping module 300 can be applied separately, also application capable of being combined, embody rule can be selected according to the actual requirements, in this no limit.
Further, reference Fig. 4, Fig. 4 is the electrical block diagram of an embodiment of the first clipping module of the utility model current limit circuit; In the present embodiment, described first clipping module 100 comprises the first current lens unit 110, second current lens unit 120 and the 3rd current lens unit 130, the input end of described first current lens unit 110 is connected with the output terminal of higher level's circuit current signal, and the output terminal of described first current lens unit 110 is connected with the input end of the output terminal of the first reference current source, the second current lens unit 120; The output terminal of described second current lens unit 120 is connected with the input end of the output terminal of the first reference current source, the 3rd current lens unit 130; The output terminal of described 3rd current lens unit 130 is connected with the input end of subordinate's circuit current signal.
Particularly, described first current lens unit 110 comprises NMOS tube N1, NMOS tube N2, second current lens unit 120 comprises NMOS tube N3, NMOS tube N4,3rd current lens unit 130 comprises NMOS tube N5, NMOS tube N6, in the present embodiment, with NMOS tube N1, NMOS tube N2, NMOS tube N3, NMOS tube N4, it is that example is described that the current mirror ratio of NMOS tube N5, NMOS tube N6 is 1:1, and this ratio also can be set as other values according to the actual requirements, in this no limit; The drain electrode of NMOS tube N1 is the input end of the first current lens unit 110, the drain electrode of NMOS tube N2 is the output terminal of the first current lens unit 110, the drain electrode of NMOS tube N3 is the input end of the second current lens unit 120, the drain electrode of NMOS tube N4 is the output terminal of the second current lens unit 120, the drain electrode of NMOS tube N5 is the input end of the 3rd current lens unit 130, and the drain electrode of NMOS tube N6 is the output terminal of the 3rd current lens unit 130.
The drain electrode of NMOS tube N1 is connected with the output terminal of higher level's current signal, the grid of NMOS tube N1, and the grid of NMOS tube N1 is connected with the grid of NMOS tube N2, the source ground of NMOS tube N1; The drain electrode of NMOS tube N2 is connected with the output terminal of the first reference current source, the drain electrode of NMOS tube N3, the source ground of NMOS tube N2; Thus NMOS tube N1 and NMOS tube N2 forms common-source common-gate current mirror.
The drain electrode of NMOS tube N3 is connected with the grid of the grid of NMOS tube N3, NMOS tube N4, the source ground of NMOS tube N3; The drain electrode of NMOS tube N4 is connected with the output terminal of the first reference current source, the drain electrode of NMOS tube N5, the source ground of NMOS tube N4; Thus NMOS tube N3 and NMOS tube N4 also forms common-source common-gate current mirror.
The drain electrode of NMOS tube N5 is connected with the grid of the grid of NMOS tube N5, NMOS tube N6, the source ground of NMOS tube N5; The drain electrode of NMOS tube N6 is connected with the input end of corresponding subordinate current signal, the source ground of NMOS tube N6; Thus NMOS tube N5 and NMOS tube N6 also forms common-source common-gate current mirror.
In the present embodiment, the electric current that the first reference current source exports is the maximum restriction current value of the first clipping module 100, and the electric current setting the output terminal of this first reference current source is I
ref_max, the electric current of the output terminal of setting higher level current signal is I
in; According to the principle of current mirror, the electric current of the input end of current mirror and the size of current of output terminal, direction are identical, thus the electric current of output terminal equals the electric current I of input end in the first current lens unit 110
in, i.e. the electric current of the drain electrode of NMOS tube N2 equals I
in, and the output end current I of the first reference current source
ref_maxdirection be point to the drain electrode of NMOS tube N2, thus according to current distributing principle, draw the electric current I A of the input end of the second current lens unit 120:
IA＝I
ref_max-I
in(1)
The condition that above-mentioned (1) sets up is I
in<I
ref_max; And work as I
in≤ I
ref_maxtime,
IA＝0(2)
And the electric current of output terminal also equals the electric current I A of input end in the second current lens unit 120, i.e. the electric current of the drain electrode of NMOS tube N4 equals IA, does same analysis, draw the electric current I B of the input end of the 3rd current lens unit 130 with reference to the first current lens unit 110:
IB＝I
ref_max-IA(3)
The condition that above-mentioned (3) set up is IA<I
ref_max, according to (1), (2) formula, IA must be less than I
ref_max.
With reference to above-mentioned analysis, in 3rd current lens unit 130, the electric current I out1 of output terminal also equals the electric current I B of input end, namely the output current of the first clipping module 100 is IB, according to (1), (3) formula, can obtain the output current Iout1 of the first clipping module 100:
Iout1＝IB＝I
ref_max-IA＝I
ref_max-(I
ref_max-I
in)＝I
in(4)
The precondition that above-mentioned (4) formula is set up is I
in<I
ref_max, and work as I
in≤ I
ref_maxtime, according to (2), (3) Shi Ke get:
Iout1＝IB＝I
ref_max-IA＝I
ref_max-0＝I
ref_max(5)
According to above-mentioned inference, reached the object of restriction output current maximal value by the first clipping module 100.
Further, reference Fig. 5, Fig. 5 is the electrical block diagram of an embodiment of the second clipping module of the utility model current limit circuit; In the present embodiment, described second clipping module 200 comprises the 4th current lens unit 210, the 5th current lens unit 220 and the 6th current lens unit 230, the input end of described 4th current lens unit 210 is connected with the output terminal of higher level's circuit current signal, and the output terminal of described 4th current lens unit 210 is connected with the input end of the output terminal of the second reference current source, the 5th current lens unit 220; The output terminal of described 5th current lens unit 220 is connected with the input end of the output terminal of the second reference current source, the 6th current lens unit 230; The output terminal of described 6th current lens unit 230 is connected with the input end of corresponding subordinate circuit current signal.
Particularly, described 4th current lens unit 210 comprises NMOS tube N7, NMOS tube N8,5th current lens unit 220 comprises PMOS P1, PMOS P2,6th current lens unit 230 comprises NMOS tube N9, NMOS tube N10, in the present embodiment, with NMOS tube N7, NMOS tube N8, NMOS tube N9, NMOS tube N10, it is that example is described that the current mirror ratio of PMOS P1, PMOS P2 is 1:1, and this ratio also can be set as other values according to the actual requirements, in this no limit; The drain electrode of NMOS tube N7 is the input end of the 4th current lens unit 210, the drain electrode of NMOS tube N8 is the output terminal of the 4th current lens unit 210, the drain electrode of PMOS P1 is the input end of the 5th current lens unit 220, the drain electrode of PMOS P2 is the output terminal of the 5th current lens unit 220, the drain electrode of NMOS tube N9 is the input end of the 6th current lens unit 230, and the drain electrode of NMOS tube N10 is the output terminal of the 6th current lens unit 230.
The drain electrode of NMOS tube N7 is connected with the grid of the output terminal of external power supply, NMOS tube N7, and the grid of NMOS tube N7 is connected with the grid of NMOS tube N8, the source ground of NMOS tube N7; The drain electrode of NMOS tube N8 is connected with the output terminal of the second reference current source, the drain electrode of PMOS P1, the source ground of NMOS tube N8; Thus NMOS tube N7 and NMOS tube N8 forms common-source common-gate current mirror.
The drain electrode of PMOS P1 is connected with the grid of the grid of PMOS P1, PMOS P2, and the source electrode of PMOS P1 connects working power; The drain electrode of PMOS P2 is connected with the output terminal of the second reference current source, the drain electrode of NMOS tube N9, and the source electrode of PMOS P2 connects working power; Thus PMOS P1 and PMOS P2 also forms common-source common-gate current mirror.
The drain electrode of NMOS tube N9 is connected with the grid of the grid of NMOS tube N9, NMOS tube N10, the source ground of NMOS tube N9; The drain electrode of NMOS tube N10 is connected with the input end of corresponding subordinate current signal, the source ground of NMOS tube N10; Thus NMOS tube N9 and NMOS tube N10 also forms common-source common-gate current mirror.
In the present embodiment, the electric current that the second reference current source exports is the minimum restriction current value of the second clipping module 200, and the electric current setting the output terminal of this setting second reference current source is I
ref_min, the electric current of the output terminal of setting higher level circuit current signal is I
in; According to the principle of current mirror, the electric current of the input end of current mirror and the size of current of output terminal, direction are identical, thus the electric current of output terminal equals the electric current I of input end in the 4th current lens unit 210
in, i.e. the electric current of the drain electrode of NMOS tube N7 equals I
in, and the output end current I of the second reference current source
ref_mindirection be point to the drain electrode of NMOS tube N8, thus according to current distributing principle, draw the electric current I C of the input end of the 5th current lens unit 220:
IC＝I
in-I
ref_min(6)
The condition that above-mentioned (6) set up is I
in≤ I
ref_min; And work as I
in<I
ref_mintime,
IC＝0(7)
And the electric current of output terminal also equals the electric current I C of input end in the 5th current lens unit 220, i.e. the electric current of the drain electrode of PMOS P2 equals IC, does same analysis, draw the electric current I D of the input end of the 6th current lens unit 230 with reference to the 4th current lens unit 210:
ID＝I
ref_min+IC(8)
With reference to above-mentioned analysis, in 6th current lens unit 230, the electric current I out2 of output terminal also equals the electric current I D of input end, namely the output current of the second clipping module 200 is ID, according to (6), (8) formula, can obtain the output current Iout2 of the second clipping module 200:
Iout2＝ID＝I
ref_min+IC＝I
ref_min+(I
in-I
ref_min)＝I
in(9)
The precondition that above-mentioned (9) formula is set up is I
in≤ I
ref_min, and work as I
in<I
ref_mintime, according to (7), (8) formula
Iout2＝ID＝I
ref_min+IC＝I
ref_min+0＝I
ref_min(10)
According to above-mentioned inference, reached the object of restriction output current minimum value by the second clipping module 200.
Further, reference Fig. 6, Fig. 6 is the electrical block diagram of an embodiment of the 3rd clipping module of the utility model current limit circuit; In the present embodiment, described 3rd clipping module 300 comprises the 7th current lens unit 310, the 8th current lens unit 320, the 9th current lens unit 330, the tenth current lens unit the 340 and the 11 current lens unit 350, the input end of described 7th current lens unit 310 is connected with the output terminal of higher level's circuit current signal, and the output terminal of described 7th current lens unit 310 is connected with the input end of the output terminal of the first reference current source, the 8th current lens unit 320; The output terminal of described 8th current lens unit 320 is connected with the input end of the output terminal of the first reference current source, the 9th current lens unit 330; The output terminal of described 9th current lens unit 330 is connected with the input end of the output terminal of the second reference current source, the tenth current lens unit 340; The output terminal of described tenth current lens unit 340 is connected with the output terminal of the second reference current source, the input end of the 11 current lens unit 350; The output terminal of described 11 current lens unit 350 is connected with the input end of corresponding subordinate circuit current signal.
Particularly, described 7th current lens unit 310 comprises NMOS tube N11, NMOS tube N12, 8th current lens unit 320 comprises NMOS tube N13, NMOS tube N14, 9th current lens unit 330 comprises NMOS tube N15, NMOS tube N16, tenth current lens unit 340 comprises PMOS P3, PMOS P4, 11 current lens unit 350 comprises NMOS tube N17, NMOS tube N18, in the present embodiment, with NMOS tube N11, NMOS tube N12, NMOS tube N13, NMOS tube N14, NMOS tube N15, NMOS tube N16, NMOS tube N17, NMOS tube N18, PMOS P3, it is that example is described that the current mirror ratio of PMOS P4 is 1:1, this ratio also can be set as other values according to the actual requirements, in this no limit, the drain electrode of NMOS tube N11 is the input end of the 7th current lens unit 310, the drain electrode of NMOS tube N12 is the output terminal of the 7th current lens unit 310, the drain electrode of NMOS tube N13 is the input end of the 8th current lens unit 320, the drain electrode of NMOS tube N14 is the output terminal of the 8th current lens unit 320, the drain electrode of NMOS tube N15 is the input end of the 9th current lens unit 330, the drain electrode of NMOS tube N16 is the output terminal of the 9th current lens unit 330, the drain electrode of PMOS P3 is the input end of the tenth current lens unit 340, the drain electrode of PMOS P4 is the output terminal of the tenth current lens unit 340, the drain electrode of NMOS tube N17 is the input end of the 11 current lens unit 350, the drain electrode of NMOS tube N18 is the output terminal of the 11 current lens unit 350.
The drain electrode of NMOS tube N11 is connected with the output terminal of higher level's current signal, the grid of NMOS tube N11, and the grid of NMOS tube N11 is connected with the grid of NMOS tube N12, the source ground of NMOS tube N11; The drain electrode of NMOS tube N12 is connected with the output terminal of the first reference current source, the drain electrode of NMOS tube N13, the source ground of NMOS tube N12; Thus NMOS tube N11 and NMOS tube N12 forms common-source common-gate current mirror.
The drain electrode of NMOS tube N13 is connected with the grid of the grid of NMOS tube N13, NMOS tube N14, the source ground of NMOS tube N13; The drain electrode of NMOS tube N14 is connected with the output terminal of the first reference current source, the drain electrode of NMOS tube N15, the source ground of NMOS tube N14; Thus NMOS tube N13 and NMOS tube N14 also forms common-source common-gate current mirror.
The drain electrode of NMOS tube N15 is connected with the grid of the grid of NMOS tube N15, NMOS tube N16, the source ground of NMOS tube N15; The drain electrode of NMOS tube N16 is connected with the output terminal of the second reference current source, the drain electrode of PMOS P3, the source ground of NMOS tube N16; Thus NMOS tube N15 and NMOS tube N16 also forms common-source common-gate current mirror.
The drain electrode of PMOS P3 is connected with the grid of the grid of PMOS P3, PMOS P4, and the source electrode of PMOS P3 connects working power; The drain electrode of PMOS P4 is connected with the output terminal of the second reference current source, the drain electrode of NMOS tube N17, and the source electrode of PMOS P4 connects working power; Thus PMOS P3 and PMOS P4 also forms common-source common-gate current mirror.
The drain electrode of NMOS tube N17 is connected with the grid of the grid of NMOS tube N17, NMOS tube N18, the source ground of NMOS tube N17; The drain electrode of NMOS tube N18 is connected with the input end of corresponding subordinate current signal, the source ground of NMOS tube N18; Thus NMOS tube N17 and NMOS tube N18 also forms common-source common-gate current mirror.
In the present embodiment, according to the principle of current mirror, the electric current of the input end of current mirror and the size of current of output terminal, direction are identical, thus the electric current of output terminal equals the electric current I of input end in the 7th current lens unit 310
in, i.e. the electric current of the drain electrode of NMOS tube N12 equals I
in, and the output end current I of the first reference current source
ref_maxdirection be point to the drain electrode of NMOS tube N12, thus according to current distributing principle, draw the electric current I E of the input end of the 8th current lens unit 320:
IE＝I
ref_max-I
in(11)
The condition that above-mentioned (11) set up is I
in<I
ref_max; And work as I
in≤ I
ref_maxtime,
IE＝0(12)
And the electric current of output terminal also equals the electric current I E of input end in the 8th current lens unit 320, i.e. the electric current of the drain electrode of NMOS tube N14 equals IE, does same analysis, draw the electric current I F of the input end of the 9th current lens unit 330 with reference to the 7th current lens unit 310:
IF＝I
ref_max-IE(13)
The condition that above-mentioned (13) set up is IE<I
ref_max, according to (11), (12) formula, IE must be less than I
ref_max.
And the electric current of output terminal also equals the electric current I F of input end in the 9th current lens unit 330, i.e. the electric current of the drain electrode of NMOS tube N16 equals IE, does same analysis, draw the electric current I G of the input end of the tenth current lens unit 340 with reference to the 7th current lens unit 310:
IG＝IF-I
ref_min(14)
The condition that above-mentioned (14) set up is IF≤I
ref_min; And work as IF<I
ref_mintime,
IG＝0(15)
And the electric current of output terminal also equals the electric current I G of input end in the tenth current lens unit 340, i.e. the electric current of the drain electrode of PMOS P4 equals IG, does same analysis, draw the electric current I H of the input end of the 11 current lens unit 350 with reference to the 7th current lens unit 310:
IH＝I
ref_min+IG(16)
With reference to above-mentioned analysis, in 11 current lens unit 350, the electric current I out3 of output terminal also equals the electric current I H of input end, namely the output current of the 3rd clipping module 300 is IH, according to (11), (13), (14), (16) formula, the output current Iout3 of the 3rd clipping module 300 can be obtained:
Iout3＝IH＝I
ref_min+IG＝I
ref_min+(IF-I
ref_min)＝IF
＝I
ref_max-IE＝I
ref_max-(I
ref_max-I
in)＝I
in(17)
The precondition that above-mentioned (17) formula is set up is IF≤I
ref_minand I
in<I
ref_max, according to (17) formula, IF=I
in, the precondition that namely (17) formula is set up is I
in≤ I
ref_minand I
in<I
ref_max.
And as IF≤I
ref_minand I
in≤ I
ref_maxtime, due to I
ref_maxi must be greater than
ref_min, above-mentioned condition is actual is I
in≤ I
ref_max, according to (12), (13), (14), (16) formula:
Iout3＝IF＝I
ref_max-IE＝I
ref_max-0＝I
ref_max(18)
According to the known IF=I of (18) formula
ref_max, due to I
ref_maxi must be greater than
ref_min, the condition that above-mentioned (18) formula is set up can be adjusted to I
in≤ I
ref_max.
And work as IF<I
ref_mintime, comprehensive (17), (18) formula, known IF can only equal I
in; Namely I is worked as
in<I
ref_mintime, according to (15), (16) formula
Iout3＝IH＝I
ref_min+IG＝I
ref_min+0＝I
ref_min(19)
According to above-mentioned inference, reached the object of restriction output current minimum value and maximal value by the 3rd clipping module 300.
To sum up, with reference to the input and output current waveform schematic diagram that Fig. 7, Fig. 7 are the utility model current limit circuit, by above-mentioned current limit circuit, the transition that current signal is level and smooth between KB limit and minimum limit value can also be realized, the shake avoiding electric current to occur near limits value and overshoot.
The utility model also provides a kind of integrated circuit, and this integrated circuit comprises current limit circuit, and the structure of this current limit circuit, principle of work and the beneficial effect that brings, all with reference to the description of above-described embodiment, do not repeat them here.
These are only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model instructions and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (8)
1. a current limit circuit, for the amplitude limit of the input current signal of circuit at different levels, it is characterized in that, comprise the first clipping module and/or the second clipping module and/or the 3rd clipping module, described first clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit the maximal value of subordinate's circuit input current signal; Described second clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit the minimum value of subordinate's circuit input current signal; Described 3rd clipping module is connected between the output terminal of higher level's circuit current signal and the input end of subordinate's circuit current signal, to limit maximal value and the minimum value of subordinate's circuit input current signal.
2. current limit circuit as claimed in claim 1, it is characterized in that, described first clipping module comprises the first current lens unit, the second current lens unit and the 3rd current lens unit, the input end of described first current lens unit is connected with the output terminal of described higher level's circuit current signal, and the output terminal of described first current lens unit is connected with the input end of the output terminal of the first reference current source, the second current lens unit; The output terminal of described second current lens unit is connected with the input end of the output terminal of the first reference current source, the 3rd current lens unit; The output terminal of described 3rd current lens unit is connected with the input end of subordinate's circuit current signal.
3. current limit circuit as claimed in claim 2, it is characterized in that, described first current lens unit, the second current lens unit, the 3rd current lens unit are nmos type to tube current mirror, or pmos type is to tube current mirror, or positive-negative-positive is to tube current mirror, or NPN type is to tube current mirror.
4. current limit circuit as claimed in claim 1, it is characterized in that, described second clipping module comprises the 4th current lens unit, the 5th current lens unit and the 6th current lens unit, the input end of described 4th current lens unit is connected with the output terminal of described higher level's circuit current signal, and the output terminal of described 4th current lens unit is connected with the input end of the output terminal of the second reference current source, the 5th current lens unit; The output terminal of described 5th current lens unit is connected with the input end of the output terminal of the second reference current source, the 6th current lens unit; The output terminal of described 6th current lens unit is connected with the input end of subordinate's circuit current signal.
5. current limit circuit as claimed in claim 4, it is characterized in that, described 4th current lens unit and the 6th current lens unit are nmos type to tube current mirror, or positive-negative-positive is to tube current mirror; Described 5th current lens unit be pmos type to tube current mirror, or NPN type is to tube current mirror.
6. current limit circuit as claimed in claim 1, it is characterized in that, described 3rd clipping module comprises the 7th current lens unit, the 8th current lens unit, the 9th current lens unit, the tenth current lens unit and the 11 current lens unit, the input end of described 7th current lens unit is connected with the output terminal of described higher level's circuit current signal, and the output terminal of described 7th current lens unit is connected with the input end of the output terminal of the first reference current source, the 8th current lens unit; The output terminal of described 8th current lens unit is connected with the input end of the output terminal of the first reference current source, the 9th current lens unit; The output terminal of described 9th current lens unit is connected with the input end of the output terminal of the second reference current source, the tenth current lens unit; The output terminal of described tenth current lens unit is connected with the output terminal of the second reference current source, the input end of the 11 current lens unit; The output terminal of described 11 current lens unit is connected with the input end of subordinate's circuit current signal.
7. current limit circuit as claimed in claim 6, it is characterized in that, described 7th current lens unit, the 8th current lens unit, the 9th current lens unit and the 11 current lens unit are nmos type to tube current mirror, or positive-negative-positive is to tube current mirror; Described tenth current lens unit be pmos type to tube current mirror, or NPN type is to tube current mirror.
8. an integrated circuit, is characterized in that, described integrated circuit comprises the current limit circuit according to any one of the claims 1 to 7.
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|---|---|---|---|
| CN201520449429.9U CN204904127U (en) | 2015-06-26 | 2015-06-26 | Electric current limit circuit and integrated circuit |
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|---|---|---|---|
| CN201520449429.9U CN204904127U (en) | 2015-06-26 | 2015-06-26 | Electric current limit circuit and integrated circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109696937A (en) * | 2019-02-15 | 2019-04-30 | 上海艾为电子技术股份有限公司 | The electric current source generating circuit of the current foldback circuit of external resistance and external resistance |
-
2015
- 2015-06-26 CN CN201520449429.9U patent/CN204904127U/en active Active
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109696937A (en) * | 2019-02-15 | 2019-04-30 | 上海艾为电子技术股份有限公司 | The electric current source generating circuit of the current foldback circuit of external resistance and external resistance |
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Effective date of registration: 20180605 Address after: 523808 Guangdong, Dongguan, Dongguan, Songshan Lake hi tech Industrial Development Zone headquarters two road 17, A506 Co-patentee after: Shanghai Changyuan Wayon Circuit Protection Co.,Ltd. Patentee after: DONGGUAN XINCHENG ELECTRONIC TECHNOLOGY CO.,LTD. Address before: 518000 Nanshan District science and Technology Park, Shenzhen, Guangdong, 9, No. 3 Yuexing Road, Hongkong science and Technology Park, Hongkong 3 Co-patentee before: Shanghai Changyuan Wayon Circuit Protection Co.,Ltd. Patentee before: SHENZHEN AMPLIFY ELECTRONICS CO.,LTD. |
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Address after: 523808 a506, No.17, No.2 Road, headquarters, Songshanhu high tech Industrial Development Zone, Dongguan City, Guangdong Province Co-patentee after: Shanghai Wei'an Electronic Co.,Ltd. Patentee after: DONGGUAN XINCHENG ELECTRONIC TECHNOLOGY CO.,LTD. Address before: A506, No.17, No.2 Road, headquarters, Songshan Lake high tech Industrial Development Zone, Dongguan City, East China Co-patentee before: Shanghai Changyuan Wayon Circuit Protection Co.,Ltd. Patentee before: DONGGUAN XINCHENG ELECTRONIC TECHNOLOGY CO.,LTD. |
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Address after: 523808 a506, No.17, 2nd headquarters Road, Songshanhu high tech Industrial Development Zone, Dongguan City, Guangdong Province Patentee after: DONGGUAN XINCHENG ELECTRONIC TECHNOLOGY CO.,LTD. Patentee after: Shanghai Weian Electronics Co.,Ltd. Address before: 523808 a506, No.17, 2nd headquarters Road, Songshanhu high tech Industrial Development Zone, Dongguan City, Guangdong Province Patentee before: DONGGUAN XINCHENG ELECTRONIC TECHNOLOGY CO.,LTD. Patentee before: Shanghai Wei'an Electronic Co.,Ltd. |