CN204886981U - Ground tacan signal is apart from analog device - Google Patents
Ground tacan signal is apart from analog device Download PDFInfo
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- CN204886981U CN204886981U CN201520693121.9U CN201520693121U CN204886981U CN 204886981 U CN204886981 U CN 204886981U CN 201520693121 U CN201520693121 U CN 201520693121U CN 204886981 U CN204886981 U CN 204886981U
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Abstract
The utility model relates to a wireless technical field, concretely relates to ground tacan signal is apart from analog device. Equipment includes FPGA, signal driver circuit, antenna circuit, signal amplification circuit, detection circuit, signal comparison circuit, has solved that traditional system is bulky, the consumption is high, shortcomings such as poor stability.
Description
Technical field
The utility model relates to wireless communication field, is specifically related to a kind of ground Tacan signal range simulation equipment.
Background technology
In wireless domain, Tacan surface beacon platform and Airplane Navigation Equipment support the use, and flight director sys tem resolves navigation data, realize the measurement of orientation and distance between Air-Ground and air-air range measurement.Tradition ground Tacan signal analog machine needs a large amount of analog circuit to carry out the signal modulation process of front end, and while simulated range, take into account orientation simulation, and systems bulky, power consumption are high, less stable.
Utility model content
Goal of the invention of the present utility model is: for prior art Problems existing, there is provided a kind of only for ground Tacan signal range simulation equipment, this equipment use device is few, low in energy consumption, autgmentability is strong, can play the effect of correcting to the distance results of general Tacan signal systematic survey.
To achieve these goals, the technical solution adopted in the utility model is:
A kind of ground Tacan signal range simulation equipment, includes:
FPGA: send output signal to signal drive circuit, the input signal of Received signal strength comparison circuit, and signal is processed, calculate the distance of ground Tacan signal; Signal drive circuit: amplification process is carried out to the output signal that FPGA sends over, the output signal after process is sent to antenna circuit; Antenna circuit: the output signal sending signal drive circuit, is sent to signal amplification circuit by the input signal returned, carries out impedance matching to signal, ensures signal maximum transmission distance; Signal amplification circuit: receive and the input signal of amplifying antenna circuit transmission, input signal is transferred to detecting circuit; Detecting circuit: the input signal that Received signal strength amplifying circuit exports, separation input signal is pulse signal, and pulse signal is sent to signal comparator circuit; Signal comparator circuit: the pulse signal receiving detecting circuit transmission compares with reference voltage, Output rusults is sent to FPGA end.
As preferred version of the present utility model, signal drive circuit adopts that inverter is multistage increases progressively structure, and its structure is: inverter U1 input connects the signal output part of FPGA, and output connects the input of inverter U2, inverter U5 and inverter U6; The output of inverter U2 connects the input of inverter U3 and inverter U4; Electric capacity C7 one end connects the output of inverter U3 and inverter U4, the signal positive output end of the other end; Electric capacity C8 one end connects the output of inverter U5 and inverter U6, the signal negative output terminal of the other end, and this structure adopts and recommends form, and multistage amplification, structure is simple.
As preferred version of the present utility model, antenna circuit except antenna integrated also containing SMA interface, when antenna integrated can not meet user demand, can external stand-alone antenna expansion using function.
As preferred version of the present utility model, signal amplification circuit adopts secondary integrated transporting discharging amplifying circuit, and secondary integrated transporting discharging amplifying circuit doubly to 500 times, can ensure that system is normally run by amplifying signal 200 when ensureing precision.
As preferred version of the present utility model, detecting circuit comprises two Schottky diodes, and concrete structure is that signal input part connects the input of diode D1 and the output of diode D2; Signal output part connects the output of diode D1 and passes through electric capacity C12 ground connection; The output head grounding of diode D2; The multiplication of voltage detecting circuit formed effectively is isolated and is detected pulse signal feeding signal comparator.
As preferred version of the present utility model, signal comparator circuit comprises integrated transporting discharging comparison circuit, and structure simply only needs an integrated transporting discharging chip to complete the function of voltage compare.
As preferred version of the present utility model, positive input terminal contact resistance R11 and the electric capacity C13 ground connection respectively of the integrated transporting discharging chip U9A in signal comparator circuit, the earth terminal of resistance R11 also connects the output of diode D3, the input of diode D3 connects FPGA as control end, sends signal facilitate control system operating state by FPGA.
System produces signal by FPGA, is sent to object after treatment returns by antenna, antenna receive inverse signal through granting large, detection, relatively after turn back to FPGA, FPGA counts into ground Tacan signal range simulation by question and answer mode round trip range measurement principle.
In sum, owing to have employed technique scheme, the beneficial effects of the utility model are:
Use FPGA to simplify hardware configuration, use device few, low in energy consumption, autgmentability is strong, and certainty of measurement is high, and simulate effect is good.
Accompanying drawing explanation
Fig. 1 is structural representation of the present utility model.
Fig. 2 is FPGA circuit diagram of the present utility model.
Fig. 3 is signal drive circuit figure of the present utility model.
Fig. 4 is signal comparator circuit figure of the present utility model.
Fig. 5 is detecting circuit figure of the present utility model.
Fig. 6 is signal amplification circuit figure of the present utility model.
Fig. 7 is antenna circuit figure of the present utility model.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in detail.
Fig. 1 is structural representation of the present utility model, FPGA: send output signal to signal drive circuit, the input signal of Received signal strength comparison circuit, and process signal, calculate the distance of ground Tacan signal; Signal drive circuit: amplification process is carried out to the output signal that FPGA sends over, the output signal after process is sent to antenna circuit; Antenna circuit: the output signal sending signal drive circuit, is sent to signal amplification circuit by the input signal returned, carries out impedance matching to signal, ensures signal maximum transmission distance; Signal amplification circuit: receive and the input signal of amplifying antenna circuit transmission, input signal is transferred to detecting circuit; Detecting circuit: the input signal that Received signal strength amplifying circuit exports, separation input signal is pulse signal, and pulse signal is sent to signal comparator circuit;
Signal comparator circuit: the pulse signal receiving detecting circuit transmission compares with reference voltage, Output rusults is sent to FPGA end.
Fig. 2 is FPGA circuit diagram of the present utility model, FPGA port RF_P and RF_N exports and input respectively as signal, any I/O mouth can be selected as the control port ctr of control port and signal comparator circuit, external clock uses crystal oscillator Y1, can carry out frequency inverted meet use effectiveness to no sample requirement in FPGA inside.
Fig. 3 is signal drive circuit figure of the present utility model, signal drive circuit adopts that inverter is multistage increases progressively structure, its structure is: inverter U1 input connects the signal output part of FPGA, and output connects the input of inverter U2, inverter U5 and inverter U6; The output of inverter U2 connects the input of inverter U3 and inverter U4; Electric capacity C7 one end connects the output of inverter U3 and inverter U4, the signal positive output end of the other end; Electric capacity C8 one end connects the output of inverter U5 and inverter U6, the signal negative output terminal of the other end.
Fig. 4 is signal comparator circuit figure of the present utility model, positive input terminal contact resistance R11 and the electric capacity C13 ground connection respectively of the integrated transporting discharging chip U9A in signal comparator circuit, the earth terminal of resistance R11 also connects the output of diode D3, the input of diode D3 connects FPGA as control end, send signal by FPGA and facilitate control system operating state, the negative input end connection signal input of integrated transporting discharging chip U9A, output exports as signal and is connected to VCC by resistance R9; The positive input terminal of integrated transporting discharging chip U9A is also connected to VCC by resistance R10.
Fig. 5 is detecting circuit figure of the present utility model, comprises two Schottky diodes, and concrete structure is that signal input part connects the input of diode D1 and the output of diode D2; Signal output part connects the output of diode D1 and passes through electric capacity C12 ground connection; The output head grounding of diode D2; The multiplication of voltage detecting circuit formed effectively is isolated and is detected pulse signal feeding signal comparator.
Fig. 6 is signal amplification circuit figure of the present utility model, adopt secondary integrated transporting discharging amplifying circuit, the positive input terminal of two integrated transporting discharging chip U7A and U8A is connected to VCC respectively by resistance R7 and resistance R8, and the resistance of regulating resistance R7 and resistance R8 meets the bias voltage of amplifier.
Fig. 7 is antenna circuit figure of the present utility model, and inductance and electric capacity form impedance matching filter circuit, be parallel with SMA interface, conveniently expand use when antenna integrated.
Claims (7)
1. a ground Tacan signal range simulation equipment, is characterized in that, include:
FPGA: send output signal to signal drive circuit, the input signal of Received signal strength comparison circuit, and signal is processed, calculate the distance of ground Tacan signal;
Signal drive circuit: amplification process is carried out to the output signal that FPGA sends over, the output signal after process is sent to antenna circuit;
Antenna circuit: the output signal sending signal drive circuit, is sent to signal amplification circuit by the input signal returned, carries out impedance matching to signal, ensures signal maximum transmission distance;
Signal amplification circuit: receive and the input signal of amplifying antenna circuit transmission, input signal is transferred to detecting circuit;
Detecting circuit: the input signal that Received signal strength amplifying circuit exports, separation input signal is pulse signal, and pulse signal is sent to signal comparator circuit;
Signal comparator circuit: the pulse signal receiving detecting circuit transmission compares with reference voltage, Output rusults is sent to FPGA end.
2. a kind of ground according to claim 1 Tacan signal range simulation equipment, it is characterized in that: described signal drive circuit adopts that inverter is multistage increases progressively structure, its structure is: inverter U1 input connects the signal output part of FPGA, and output connects the input of inverter U2, inverter U5 and inverter U6; The output of inverter U2 connects the input of inverter U3 and inverter U4; Electric capacity C7 one end connects the output of inverter U3 and inverter U4, the signal positive output end of the other end; Electric capacity C8 one end connects the output of inverter U5 and inverter U6, the signal negative output terminal of the other end.
3. a kind of ground according to claim 1 Tacan signal range simulation equipment, is characterized in that: described antenna circuit also contains SMA interface except antenna integrated.
4. a kind of ground according to claim 1 Tacan signal range simulation equipment, is characterized in that: described signal amplification circuit adopts secondary integrated transporting discharging amplifying circuit.
5. a kind of ground according to claim 1 Tacan signal range simulation equipment, is characterized in that: described detecting circuit comprises two Schottky diodes, and concrete structure is that signal input part connects the input of diode D1 and the output of diode D2; Signal output part connects the output of diode D1 and passes through electric capacity C12 ground connection; The output head grounding of diode D2.
6. a kind of ground according to claim 1 Tacan signal range simulation equipment, is characterized in that: described signal comparator circuit comprises integrated transporting discharging comparison circuit.
7. a kind of ground according to claim 6 Tacan signal range simulation equipment, it is characterized in that: positive input terminal contact resistance R11 and the electric capacity C13 ground connection respectively of the integrated transporting discharging chip U9A in described signal comparator circuit, the earth terminal of resistance R11 also connects the output of diode D3, and the input of diode D3 connects FPGA as control end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520693121.9U CN204886981U (en) | 2015-09-08 | 2015-09-08 | Ground tacan signal is apart from analog device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520693121.9U CN204886981U (en) | 2015-09-08 | 2015-09-08 | Ground tacan signal is apart from analog device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204886981U true CN204886981U (en) | 2015-12-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520693121.9U Expired - Fee Related CN204886981U (en) | 2015-09-08 | 2015-09-08 | Ground tacan signal is apart from analog device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204886981U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107807351A (en) * | 2017-11-28 | 2018-03-16 | 天津七六四通信导航技术有限公司 | A kind of Tacan test and supervising device |
-
2015
- 2015-09-08 CN CN201520693121.9U patent/CN204886981U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107807351A (en) * | 2017-11-28 | 2018-03-16 | 天津七六四通信导航技术有限公司 | A kind of Tacan test and supervising device |
| CN107807351B (en) * | 2017-11-28 | 2024-05-07 | 天津七六四通信导航技术有限公司 | Takang test and monitoring device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151216 Termination date: 20180908 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |