CN204883676U - NGFF changes USB's switching device for solid state hard drives and control circuit thereof - Google Patents
NGFF changes USB's switching device for solid state hard drives and control circuit thereof Download PDFInfo
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- CN204883676U CN204883676U CN201520625632.7U CN201520625632U CN204883676U CN 204883676 U CN204883676 U CN 204883676U CN 201520625632 U CN201520625632 U CN 201520625632U CN 204883676 U CN204883676 U CN 204883676U
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Abstract
The utility model relates to a NGFF changes USB's switching device for solid state hard drives and control circuit thereof, including USB interface, PCB circuit board and adapter, the USB interface welding is in the edge of PCB circuit board, and the adapter welds at the middle part of PCB circuit board, and the switching is realized with the USB interface to the circuit that the adapter passes through on the PCB circuit board, the adapter is the NGFF adapter. NGFF changes USB's switching device's control circuit for the solid state hard drives, including main control chip control circuit, USB interface, NGFF interface, big current output power control circuit, upgrading firmware and save firmware control circuit. The utility model has the advantages of structural design is reasonable, production low in manufacturing cost and small, the solid state hard drives that makes is small, conveniently carry, has improved reading and writing and transmission speed simultaneously, and compatible problem is solved to usable inside the upgrading, is applicable to the solid state hard drives of different capacity.
Description
Technical field
The utility model relates to solid state hard disc technical field, is specifically related to switching device and control circuit thereof that solid state hard disc NGFF turns USB.
Background technology
Existing flash memory movable storage device has USB flash disk, solid state hard disc etc., along with the continuous innovation of memory technology, capacity and the transmission speed of USB flash disk, solid state hard disc also get a promotion, as the USB flash disk of company of Netac, adopt the technology of flash memory, achieve fast reading and writing and the transmission of data, the use for people provides conveniently.But the volume of this USB flash disk is fixing, limitation is comparatively large, and read or write speed is compared with hard disk, relatively slow.
Traditional mechanical hard disk due to volume larger, be inconvenient to carry, read-write limits by motor, can not meet actual read-write and transmission speed fast, user demand that dirigibility is high, therefore a kind of new substitute mode of active demand, to improve the performance of portable hard drive, thus meet the user demand of people better.
Summary of the invention
In order to solve deficiency existing in prior art, the utility model proposes a kind of reasonable in design, manufacturing cost is low, volume is little, solid state hard disc is convenient for carrying and improves the device read and write with transmission speed simultaneously, namely solid state hard disc NGFF turns switching device and the control circuit thereof of USB.
Solid state hard disc NGFF turns the switching device of USB, comprise USB interface, PCB and adapter, described USB interface is welded on the edge of PCB, and described adapter is welded on the middle part of PCB, and described adapter realizes transferring by the circuit in PCB and USB interface;
Described adapter is NGFF adapter.The utility model adopts NGFF adapter, namely the switching of NGFF adapter and USB interface is achieved, not only reduce overall volume, make the solid state hard disc volume made little, be convenient for carrying, and improve read-write and transmission speed, stability and compatibility higher, the user demand of people can be better met.
Solid state hard disc NGFF turns the control circuit of the switching device of USB, comprise main control chip control circuit, USB interface, NGFF interface, High-current output power control circuit, firmware updating and preservation firmware control circuit, described USB interface, NGFF interface, High-current output power control circuit, firmware updating turn USB with preservation firmware control circuit by being connected to realize NGFF with main control chip control circuit.The utility model adopts High-current output power control circuit to be that solid state hard disc is powered, to ensure that solid state hard disc can normally run; Adopt firmware updating and preserve firmware control circuit, to realize internal upgrade ensure compatibility, thus compensate for the weak point of traditional solid state hard disc; The utility model have employed small size and the electronic devices and components of precision, thus makes overall stability higher; Utilize main control chip control circuit, the function realizing auto sleep can be assisted, possess the function of power and energy saving so in use; The utility model can realize the bi-directional conversion bridge joint of NGFF and USB, complete the communication of main side and main frame and equipment end and solid state hard disc, main side is according to manual operation, give an order to the utility model, order is then assigned to equipment end by the utility model further, after equipment end has notice, message to the utility model, then is uploaded to main side through the utility model by meeting feedback; The utility model also can according to user demand, and change the capacity of solid state hard disc at any time, dirigibility is high.
Described main control chip control circuit comprises chip, the first module, the second module, the 3rd module, four module, the 5th module, the 6th module, the 7th module, the 8th module, the 9th module, the tenth module, the 11 module and the 12 module.Wherein, the first module mainly serves the effect of filtering, to avoid the humorous wave interference in circuit, ensures overall stability.
1 pin of described chip is connected with+3.3V power interface, 2 pin of described chip, 3 pin, 5 pin, 6 pin respectively with firmware updating with preserve firmware control circuit and be connected, 4 pin of described chip are connected with+3.3V power interface, and 7 pin of described chip are connected with+1.2V power interface, 9 pin of described chip respectively with four module, 9th module is connected, 10 pin of described chip are connected with the 12 module, 11 pin of described chip are connected with+5V power interface, 12 pin of described chip are connected with+3.3V power interface, and 12 pin of described chip are serially connected with ground connection after the 24 electric capacity, 21 pin ground connection of described chip, 13 pin of described chip, 24 pin are also connected with+1.2V power interface after connecing, 14 pin of described chip, 18 pin are also connected with+3.3V power interface after connecing, 15 pin of described chip, 16 pin, 22 pin, 23 pin respectively with 3 pin of USB interface, 2 pin, 8 pin, 9 pin are connected, and 17 pin of described chip are connected with the 7th module, 19 pin of described chip, 5 pin of USB interface are linked into respectively after 20 pin and the tenth model calling, on 6 pin, 25 pin of described chip, 26 pin are connected with the 6th module, 27 pin of described chip, 34 pin are also connected with+3.3V power interface after connecing, 28 pin of described chip, 36 pin are also connected with+1.2V power interface after connecing, 29 pin of described chip, 30 pin, 32 pin, 33 pin are connected with the 8th module, 31 pin ground connection of described chip, 37 pin of described chip, 42 pin are connected with the 9th module, and 38 pin of described chip are connected with the 5th module, and 38 pin of described chip are connected with+3.3V power interface, and 46 pin of described chip are connected with+1.2V power interface, 47 pin of described chip, 49 pin ground connection, are linked on+1.2V power interface after 48 pin of described chip and the 3rd model calling.
Described first module comprises the 3rd electric capacity and the 4th electric capacity, 2 pin of described 3rd electric capacity are connected with power supply one interface, and 2 pin of described 3rd electric capacity are connected with+1.2V power interface, 1 pin ground connection of described 3rd electric capacity, 2 pin of described 4th electric capacity are connected with power supply two interface, and 2 pin of described 4th electric capacity are connected with+3.3V power interface, 1 pin ground connection of described 4th electric capacity.After the filtering process of the first module 4, thus provide noiseless voltage, to guarantee the normal work of circuit for other electronic devices and components.
Described second module comprises the 5th electric capacity, 7th electric capacity, 9th electric capacity, 11 electric capacity, 21 electric capacity, 16 electric capacity, 6th electric capacity, 8th electric capacity, tenth electric capacity, 12 electric capacity, 13 electric capacity, 18 electric capacity and the 22 electric capacity, 1 pin of described 5th electric capacity, 1 pin of the 7th electric capacity, 1 pin of the 9th electric capacity, 1 pin of the 11 electric capacity, 1 pin of the 21 electric capacity, 1 pin of the 16 electric capacity is also connected with+1.2V power interface after connecing, 2 pin of described 5th electric capacity, 2 pin of the 7th electric capacity, 2 pin of the 9th electric capacity, 2 pin of the 11 electric capacity, 2 pin of the 21 electric capacity, the equal ground connection of 2 pin of the 16 electric capacity, 1 pin of described 6th electric capacity, 1 pin of the 8th electric capacity, 1 pin of the tenth electric capacity, 1 pin of the 12 electric capacity, 1 pin of the 13 electric capacity, 1 pin of the 18 electric capacity, 1 pin of the 22 electric capacity is also connected with+3.3V power interface after connecing, 2 pin of described 6th electric capacity, 2 pin of the 8th electric capacity, 2 pin of the tenth electric capacity, 2 pin of the 12 electric capacity, 2 pin of the 13 electric capacity, 2 pin of the 18 electric capacity, the equal ground connection of 2 pin of the 22 electric capacity.
Described 3rd module comprises the 14 electric capacity, the 15 electric capacity and inductance one, described 2 pin of the 14 electric capacity, 1 pin of the 15 electric capacity being connected with 1 pin of inductance one after connecing, described 2 pin of the 14 electric capacity, 1 pin of the 15 electric capacity being connected with+1.2V power interface after connecing, 1 pin of described 14 electric capacity, the equal ground connection of 2 pin of the 15 electric capacity, 2 pin of described inductance one are connected with 48 pin of chip.
Described four module comprises the second resistance and light emitting diode, and 1 pin of described second resistance is connected with 9 pin of chip, and 2 pin of described second resistance are connected with 2 pin of light emitting diode, and 1 pin of described light emitting diode is connected with+3.3V power interface;
Described 5th module comprises the first resistance and the second electric capacity, and 1 pin of described first resistance is linked on 38 pin of chip after being connected with 2 pin of the second electric capacity, and 2 pin of described first resistance are connected with+3.3V power interface, 1 pin ground connection of described second electric capacity.
Described 6th module comprises the first electric capacity and crystal oscillator, and 1 pin of described first electric capacity and 3 pin of crystal oscillator are also linked on 26 pin of chip after connecing, and 2 pin of described first electric capacity and 1 pin of crystal oscillator are also linked on 25 pin of chip after connecing, the earthing of casing of described crystal oscillator.
Described 7th module comprises the 3rd resistance, and described 1 pin of the 3rd resistance is connected with 17 pin of chip, 2 pin ground connection of described 3rd resistance.
Described 8th module comprises the 19 electric capacity, the 20 electric capacity, the 17 electric capacity, the 23 electric capacity, 1 pin of 1 pin of described 19 electric capacity, 1 pin of the 20 electric capacity, the 17 electric capacity, 1 pin of the 23 electric capacity respectively corresponding 33 pin with chip, 32 pin, 30 pin, 29 pin are connected, and 2 pin of 2 pin of described 19 electric capacity, 2 pin of the 20 electric capacity, the 17 electric capacity, 2 pin of the 23 electric capacity respectively corresponding 49 pin with NGFF interface, 47 pin, 43 pin, 41 pin are connected.
Described 9th module comprises the 4th resistance, the 5th resistance, the 6th resistance, 1 pin of 1 pin of described 4th resistance, 1 pin of the 5th resistance, the 6th resistance respectively corresponding 9 pin with chip, 37 pin, 42 pin is connected, the equal ground connection of 2 pin of 2 pin of described 4th resistance, 2 pin of the 5th resistance, the 6th resistance.
Described tenth module comprises the 25 electric capacity and the 26 electric capacity, 2 pin of described 25 electric capacity, 2 pin of the 26 electric capacity are connected with 20 pin of chip, 19 pin respectively, and 1 pin of described 25 electric capacity, 1 pin of the 26 electric capacity are connected with 6 pin of USB interface, 5 pin respectively.
Described 11 module comprises the 27 electric capacity and the 28 electric capacity, described 2 pin of the 27 electric capacity, 1 pin of the 28 electric capacity being connected with 1 pin of USB interface after connecing, described 1 pin of the 27 electric capacity, 2 pin of the 28 electric capacity connect rear ground connection.
Described 12 module comprises the 7th resistance, and described 1 pin of the 7th resistance is connected with 10 pin of chip, and described 2 pin of the 7th resistance are connected with 1 pin of USB interface.
1 pin of described USB interface is connected with+5V power interface, 4 pin of described USB interface, 7 pin, 10 pin and 11 pin ground connection.
1 pin of described NGFF interface, 3 pin, 5 pin, 27 pin, 33 pin, 39 pin, 45 pin, 51 pin, 57 pin, 71 pin, 73 pin and the equal ground connection of 75 pin, ground connection after 38 pin serial connection the 12 resistance of described NGFF interface, ground connection after 69 pin serial connection the 13 resistance of described NGFF interface, 2 pin of described NGFF interface, 4 pin, 70 pin, 72 pin, 74 pin are all connected with power supply three interface.
Described High-current output power control circuit comprises the 29 electric capacity, 30 electric capacity, 31 electric capacity, 32 electric capacity, high electric current out-put supply, 8th resistance, 9th resistance, inductance two, described one end of 29 electric capacity and 2 pin of the 30 electric capacity also connect rear ground connection, the described other end of the 29 electric capacity and 1 pin of the 30 electric capacity and connect rear respectively with 1 pin of high electric current out-put supply, 4 pin serial connections, the described other end of the 29 electric capacity is with 1 pin of the 30 electric capacity and be connected with+5V power interface after connecing, 2 pin ground connection of described high electric current out-put supply, 3 pin of described high electric current out-put supply, inductance two is connected with power supply three interface after being connected in series, 5 pin of described high electric current out-put supply are connected in series rear ground connection with the 9th resistance, be connected with power supply three interface after 5 pin of described high electric current out-put supply are connected in series with the 8th resistance, described one end of 32 electric capacity and 2 pin of the 31 electric capacity also connect rear ground connection, the other end of described 32 electric capacity, 1 pin of the 31 electric capacity is also connected with power supply three interface after connecing.The utility model adopts high electric current out-put supply, thus powers for solid state hard disc, ensures to run normally.
Described firmware updating and preservation firmware control circuit comprise cd-rom recorder, tenth resistance, 33 electric capacity, 11 resistance, 1 pin of described cd-rom recorder, 2 pin, 5 pin, 6 pin respectively with 6 pin of chip, 2 pin, 5 pin, 3 pin are connected, 2 pin of described cd-rom recorder are connected with 1 pin of the tenth resistance, 2 pin of described tenth resistance are connected with+3.3V power interface, 3 pin of described cd-rom recorder are connected with 2 pin of the 11 resistance, 1 pin of described 11 resistance is connected with+3.3V power interface, 4 pin ground connection of described cd-rom recorder, described 1 pin of the 33 electric capacity and 7 pin of cd-rom recorder, 8 pin are linked on+3.3V power interface after being connected, 2 pin ground connection of described 33 electric capacity.Cd-rom recorder of the present utility model, employing is serial SPIFLASH, and internal upgrade can be utilized to solve compatible problem.
The beneficial effects of the utility model are: the utility model has the advantages such as the low and volume of reasonable in design, manufacturing cost is little, adopt the solid state hard disc volume made of the technical solution of the utility model little, be convenient for carrying, improve read-write and transmission speed simultaneously, have employed serial SPIFLASH, internal upgrade can be utilized to solve compatible problem, be applicable to the solid state hard disc of different capabilities, widely applicable, compensate for the limitation that the interface of traditional solid state hard disc existence is single, improve the portability of solid state hard disc.
Accompanying drawing explanation
Below in conjunction with drawings and Examples, the utility model is further illustrated.
Fig. 1 is perspective view of the present utility model;
Fig. 2 is the structural representation of chip of the present utility model;
Fig. 3 is the structural representation of the first module of the present utility model;
Fig. 4 is the structural representation of the second module of the present utility model;
Fig. 5 is the structural representation of the 3rd module of the present utility model;
Fig. 6 is the structural representation of four module of the present utility model;
Fig. 7 is the structural representation of the 5th module of the present utility model;
Fig. 8 is the structural representation of the 6th module of the present utility model;
Fig. 9 is the structural representation of the 7th module of the present utility model;
Figure 10 is the structural representation of the 8th module of the present utility model;
Figure 11 is the structural representation of the 9th module of the present utility model;
Figure 12 is the structural representation of the tenth module of the present utility model;
Figure 13 is the structural representation of the 11 module of the present utility model;
Figure 14 is the structural representation of the 12 module of the present utility model;
Figure 15 is the structural representation of USB interface of the present utility model;
Figure 16 is the structural representation of NGFF interface of the present utility model;
Figure 17 is the structural representation of High-current output power control circuit of the present utility model;
Figure 18 is firmware updating of the present utility model and the structural representation preserving firmware control circuit.
Embodiment
The technological means realized to make the utility model, creation characteristic, reaching object and effect is easy to understand, below the utility model being set forth further.
As shown in Figure 1, solid state hard disc NGFF turns the switching device of USB, comprise usb 1, PCB 2 and adapter 3, described usb 1 is welded on the edge of PCB 2, described adapter 3 is welded on the middle part of PCB 2, and described adapter 3 realizes transferring by the circuit in PCB 2 and usb 1;
Described adapter 3 is NGFF adapter.The utility model adopts NGFF adapter, namely the switching of NGFF adapter and usb 1 is achieved, not only reduce overall volume, make the solid state hard disc volume made little, be convenient for carrying, and improve read-write and transmission speed, stability and compatibility higher, the user demand of people can be better met.
As shown in Fig. 2 to Figure 18, solid state hard disc NGFF turns the control circuit of the switching device of USB, comprise main control chip control circuit, usb 17, NGFF interface 18, High-current output power control circuit 19, firmware updating and preservation firmware control circuit 20, described usb 17, NGFF interface 18, High-current output power control circuit 19, firmware updating turn USB with preservation firmware control circuit 20 by being connected to realize NGFF with main control chip control circuit.The utility model adopts High-current output power control circuit 19 to power, to ensure that solid state hard disc can normally run for solid state hard disc; Adopt firmware updating and preserve firmware control circuit 20, to realize internal upgrade ensure compatibility, thus compensate for the weak point of traditional solid state hard disc; The utility model have employed small size and the electronic devices and components of precision, thus makes overall stability higher; Utilize main control chip control circuit, the function realizing auto sleep can be assisted, possess the function of power and energy saving so in use; The utility model can realize the bi-directional conversion bridge joint of NGFF and USB, complete the communication of main side and main frame and equipment end and solid state hard disc, main side is according to manual operation, give an order to the utility model, order is then assigned to equipment end by the utility model further, after equipment end has notice, message to the utility model, then is uploaded to main side through the utility model by meeting feedback; The utility model also can according to user demand, and change the capacity of solid state hard disc at any time, dirigibility is high.
Described main control chip control circuit comprises chip 13, first module 4, second module 5, the 3rd module 6, four module 7, the 5th module 8, the 6th module 9, the 7th module 10, the 8th module 11, the 9th module 12, the tenth module the 14, the 11 module the 15 and the 12 module 16.Wherein, the first module 4 mainly serves the effect of filtering, to avoid the humorous wave interference in circuit, ensures overall stability.
1 pin of described chip 13 is connected with+3.3V power interface, 2 pin of described chip 13, 3 pin, 5 pin, 6 pin respectively with firmware updating with preserve firmware control circuit 20 and be connected, 4 pin of described chip 13 are connected with+3.3V power interface, and 7 pin of described chip 13 are connected with+1.2V power interface, 9 pin of described chip 13 respectively with four module 7, 9th module 12 is connected, 10 pin of described chip 13 are connected with the 12 module 16, 11 pin of described chip 13 are connected with+5V power interface, 12 pin of described chip 13 are connected with+3.3V power interface, and 12 pin of described chip 13 are serially connected with ground connection after the 24 electric capacity C24, 21 pin ground connection of described chip 13,13 pin of described chip 13, 24 pin are also connected with+1.2V power interface after connecing, 14 pin of described chip 13, 18 pin are also connected with+3.3V power interface after connecing, 15 pin of described chip 13, 16 pin, 22 pin, 23 pin respectively with 3 pin of usb 17, 2 pin, 8 pin, 9 pin are connected, and 17 pin of described chip 13 are connected with the 7th module 10,19 pin of described chip 13, 20 pin are linked into 5 pin of usb 17 respectively after being connected with the tenth module 14, on 6 pin, 25 pin of described chip 13, 26 pin are connected with the 6th module 9,27 pin of described chip 13, 34 pin are also connected with+3.3V power interface after connecing, 28 pin of described chip 13, 36 pin are also connected with+1.2V power interface after connecing, 29 pin of described chip 13, 30 pin, 32 pin, 33 pin are connected with the 8th module 11,31 pin ground connection of described chip 13,37 pin of described chip 13, 42 pin are connected with the 9th module 12, and 38 pin of described chip 13 are connected with the 5th module 8, and 38 pin of described chip 13 are connected with+3.3V power interface, and 46 pin of described chip 13 are connected with+1.2V power interface, 47 pin of described chip 13, 49 pin ground connection, are linked on+1.2V power interface after 48 pin of described chip 13 are connected with the 3rd module 6.
Described first module 4 comprises the 3rd electric capacity C3 and the 4th electric capacity C4,2 pin of described 3rd electric capacity C3 are connected with power supply one interface V1, and 2 pin of described 3rd electric capacity C3 are connected with+1.2V power interface, the 1 pin ground connection of described 3rd electric capacity C3,2 pin of described 4th electric capacity C4 are connected with power supply two interface V2, and 2 pin of described 4th electric capacity C4 are connected with+3.3V power interface, the 1 pin ground connection of described 4th electric capacity C4.After the filtering process of the first module 4, thus provide noiseless voltage, to guarantee the normal work of circuit for other electronic devices and components.
Described second module 5 comprises the 5th electric capacity C5, 7th electric capacity C7, 9th electric capacity C9, 11 electric capacity C11, 21 electric capacity C21, 16 electric capacity C16, 6th electric capacity C6, 8th electric capacity C8, tenth electric capacity C10, 12 electric capacity C12, 13 electric capacity C13, 18 electric capacity C18 and the 22 electric capacity C22,1 pin of described 5th electric capacity C5, 1 pin of the 7th electric capacity C7, 1 pin of the 9th electric capacity C9, 1 pin of the 11 electric capacity C11, 1 pin of the 21 electric capacity C21, 1 pin of the 16 electric capacity C16 is also connected with+1.2V power interface after connecing, 2 pin of described 5th electric capacity C5, 2 pin of the 7th electric capacity C7, 2 pin of the 9th electric capacity C9, 2 pin of the 11 electric capacity C11, 2 pin of the 21 electric capacity C21, the equal ground connection of 2 pin of the 16 electric capacity C16,1 pin of described 6th electric capacity C6, 1 pin of the 8th electric capacity C8, 1 pin of the tenth electric capacity C10, 1 pin of the 12 electric capacity C12, 1 pin of the 13 electric capacity C13, 1 pin of the 18 electric capacity C18, 1 pin of the 22 electric capacity C22 is also connected with+3.3V power interface after connecing, 2 pin of described 6th electric capacity C6, 2 pin of the 8th electric capacity C8, 2 pin of the tenth electric capacity C10, 2 pin of the 12 electric capacity C12, 2 pin of the 13 electric capacity C13, 2 pin of the 18 electric capacity C18, the equal ground connection of 2 pin of the 22 electric capacity C22.
Described 3rd module 6 comprises the 14 electric capacity C14, the 15 electric capacity C15 and inductance one L1, described 2 pin of the 14 electric capacity C14,1 pin of the 15 electric capacity C15 being connected with 1 pin of inductance one L1 after connecing, described 2 pin of the 14 electric capacity C14,1 pin of the 15 electric capacity C15 being connected with+1.2V power interface after connecing, 1 pin of described 14 electric capacity C14, the equal ground connection of 2 pin of the 15 electric capacity C15, described 2 pin of inductance one L1 are connected with 48 pin of chip 13.
Described four module 7 comprises the second resistance R2 and LED, described 1 pin of the second resistance R2 is connected with 9 pin of chip 13, described 2 pin of the second resistance R2 are connected with 2 pin of LED, and 1 pin of described LED is connected with+3.3V power interface;
Described 5th module 8 comprises the first resistance R1 and the second electric capacity C2, be linked on 38 pin of chip 13 after 1 pin of described first resistance R1 is connected with 2 pin of the second electric capacity C2,2 pin of described first resistance R1 are connected with+3.3V power interface, the 1 pin ground connection of described second electric capacity C2.
Described 6th module 9 comprises the first electric capacity C1 and crystal oscillator X1, described 1 pin of the first electric capacity C1 and 3 pin of crystal oscillator X1 are also linked on 26 pin of chip 13 after connecing, described 2 pin of the first electric capacity C1 and 1 pin of crystal oscillator X1 are also linked on 25 pin of chip 13 after connecing, the earthing of casing of described crystal oscillator X1.
Described 7th module 10 comprises the 3rd resistance R3, and described 1 pin of the 3rd resistance R3 is connected with 17 pin of chip 13, the 2 pin ground connection of described 3rd resistance R3.
Described 8th module 11 comprises the 19 electric capacity C19, the 20 electric capacity C20, the 17 electric capacity C17, the 23 electric capacity C23,1 pin of 1 pin of described 19 electric capacity C19,1 pin of the 20 electric capacity C20, the 17 electric capacity C17,1 pin of the 23 electric capacity C23 respectively corresponding 33 pin with chip 13,32 pin, 30 pin, 29 pin are connected, and 2 pin of 2 pin of described 19 electric capacity C19,2 pin of the 20 electric capacity C20, the 17 electric capacity C17,2 pin of the 23 electric capacity C23 respectively corresponding 49 pin with NGFF interface 18,47 pin, 43 pin, 41 pin are connected.
Described 9th module 12 comprises the 4th resistance R4, the 5th resistance R5, the 6th resistance R6,1 pin of 1 pin of described 4th resistance R4,1 pin of the 5th resistance R5, the 6th resistance R6 respectively corresponding 9 pin with chip 13,37 pin, 42 pin is connected, the equal ground connection of 2 pin of 2 pin of described 4th resistance R4,2 pin of the 5th resistance R5, the 6th resistance R6.
Described tenth module 14 comprises the 25 electric capacity C25 and the 26 electric capacity C26,2 pin of described 25 electric capacity C25,2 pin of the 26 electric capacity C26 are connected with 20 pin of chip 13,19 pin respectively, and 1 pin of described 25 electric capacity C25,1 pin of the 26 electric capacity C26 are connected with 6 pin of usb 17,5 pin respectively.
Described 11 module 15 comprises the 27 electric capacity C27 and the 28 electric capacity C28, described 2 pin of the 27 electric capacity C27,1 pin of the 28 electric capacity C28 being connected with 1 pin of usb 17 after connecing, described 1 pin of the 27 electric capacity C27,2 pin of the 28 electric capacity C28 connect rear ground connection.
Described 12 module 16 comprises the 7th resistance R7, and described 1 pin of the 7th resistance R7 is connected with 10 pin of chip 13, and described 2 pin of the 7th resistance R7 are connected with 1 pin of usb 17.
1 pin of described usb 17 is connected with+5V power interface, 4 pin of described usb 17,7 pin, 10 pin and 11 pin ground connection.
1 pin of described NGFF interface 18,3 pin, 5 pin, 27 pin, 33 pin, 39 pin, 45 pin, 51 pin, 57 pin, 71 pin, 73 pin and the equal ground connection of 75 pin, ground connection after 38 pin serial connection the 12 resistance R12 of described NGFF interface 18, ground connection after 69 pin serial connection the 13 resistance R13 of described NGFF interface 18,2 pin of described NGFF interface 18,4 pin, 70 pin, 72 pin, 74 pin are all connected with power supply three interface VCC33.
Described High-current output power control circuit 19 comprises the 29 electric capacity C29, 30 electric capacity C30, 31 electric capacity C31, 32 electric capacity C32, high electric current out-put supply U2, 8th resistance R8, 9th resistance R9, inductance two L2, described one end of 29 electric capacity C29 and 2 pin of the 30 electric capacity C30 also connect rear ground connection, the described other end of the 29 electric capacity C29 and 1 pin of the 30 electric capacity C30 and connect rear respectively with 1 pin of high electric current out-put supply U2, 4 pin serial connections, the described other end of the 29 electric capacity C29 is with 1 pin of the 30 electric capacity C30 and be connected with+5V power interface after connecing, the 2 pin ground connection of described high electric current out-put supply U2, 3 pin of described high electric current out-put supply U2, inductance two L2 is connected with power supply three interface VCC33 after being connected in series, 5 pin of described high electric current out-put supply U2 are connected in series rear ground connection with the 9th resistance R9, be connected with power supply three interface VCC33 after 5 pin of described high electric current out-put supply U2 are connected in series with the 8th resistance R8, described one end of 32 electric capacity C32 and 2 pin of the 31 electric capacity C31 also connect rear ground connection, the other end of described 32 electric capacity C32, 1 pin of the 31 electric capacity C31 is also connected with power supply three interface VCC33 after connecing.The utility model adopts high electric current out-put supply U2, thus powers for solid state hard disc, ensures to run normally.
Described firmware updating and preservation firmware control circuit 20 comprise cd-rom recorder U3, tenth resistance R10, 33 electric capacity C33, 11 resistance R11, 1 pin of described cd-rom recorder U3, 2 pin, 5 pin, 6 pin respectively with 6 pin of chip 13, 2 pin, 5 pin, 3 pin are connected, 2 pin of described cd-rom recorder U3 are connected with 1 pin of the tenth resistance R10, 2 pin of described tenth resistance R10 are connected with+3.3V power interface, 3 pin of described cd-rom recorder U3 are connected with 2 pin of the 11 resistance R11, 1 pin of described 11 resistance R11 is connected with+3.3V power interface, the 4 pin ground connection of described cd-rom recorder U3, described 1 pin of the 33 electric capacity C33 and 7 pin of cd-rom recorder U3, 8 pin are linked on+3.3V power interface after being connected, the 2 pin ground connection of described 33 electric capacity C33.Cd-rom recorder U3 of the present utility model, employing is serial SPIFLASH, and internal upgrade can be utilized to solve compatible problem.
The utility model greatly improves the speed of read-write and transmission, possesses compatible and high stability simultaneously, is applicable to the solid state hard disc of different capabilities, widely applicable, compensate for the limitation of traditional solid state hard disc.
More than show and describe ultimate principle of the present utility model, principal character and advantage of the present utility model.The technician of the industry should understand; the utility model is not restricted to the described embodiments; the just principle of the present utility model described in above-described embodiment and instructions; under the prerequisite not departing from the utility model spirit and scope; the utility model also has various changes and modifications, and these changes and improvements all fall within the scope of claimed the utility model.The claimed scope of the utility model is defined by appending claims and equivalent thereof.
Claims (5)
1. solid state hard disc NGFF turns the switching device of USB, it is characterized in that: comprise USB interface (1), PCB (2) and adapter (3), described USB interface (1) is welded on the edge of PCB (2), described adapter (3) is welded on the middle part of PCB (2), and described adapter (3) realizes transferring by the circuit in PCB (2) and USB interface (1);
Described adapter (3) is NGFF adapter.
2. solid state hard disc NGFF according to claim 1 turns the control circuit of the switching device of USB, it is characterized in that: comprise main control chip control circuit, USB interface (17), NGFF interface (18), High-current output power control circuit (19), firmware updating and preservation firmware control circuit (20), described USB interface (17), NGFF interface (18), High-current output power control circuit (19), firmware updating turn USB with preservation firmware control circuit (20) by being connected to realize NGFF with main control chip control circuit.
3. solid state hard disc NGFF according to claim 2 turns the control circuit of the switching device of USB, it is characterized in that: described main control chip control circuit comprises chip (13), the first module (4), the second module (5), the 3rd module (6), four module (7), the 5th module (8), the 6th module (9), the 7th module (10), the 8th module (11), the 9th module (12), the tenth module (14), the 11 module (15) and the 12 module (16);
1 pin of described chip (13) is connected with+3.3V power interface, 2 pin of described chip (13), 3 pin, 5 pin, 6 pin respectively with firmware updating with preserve firmware control circuit (20) and be connected, 4 pin of described chip (13) are connected with+3.3V power interface, 7 pin of described chip (13) are connected with+1.2V power interface, 9 pin of described chip (13) respectively with four module (7), 9th module (12) is connected, 10 pin of described chip (13) are connected with the 12 module (16), 11 pin of described chip (13) are connected with+5V power interface, 12 pin of described chip (13) are connected with+3.3V power interface, and 12 pin of described chip (13) are serially connected with the 24 electric capacity (C24) ground connection afterwards, 21 pin ground connection of described chip (13), 13 pin of described chip (13), 24 pin are also connected with+1.2V power interface after connecing, 14 pin of described chip (13), 18 pin are also connected with+3.3V power interface after connecing, 15 pin of described chip (13), 16 pin, 22 pin, 23 pin respectively with 3 pin of USB interface (17), 2 pin, 8 pin, 9 pin are connected, 17 pin of described chip (13) are connected with the 7th module (10), 19 pin of described chip (13), 20 pin are linked into 5 pin of USB interface (17) respectively after being connected with the tenth module (14), on 6 pin, 25 pin of described chip (13), 26 pin are connected with the 6th module (9), 27 pin of described chip (13), 34 pin are also connected with+3.3V power interface after connecing, 28 pin of described chip (13), 36 pin are also connected with+1.2V power interface after connecing, 29 pin of described chip (13), 30 pin, 32 pin, 33 pin are connected with the 8th module (11), 31 pin ground connection of described chip (13), 37 pin of described chip (13), 42 pin are connected with the 9th module (12), 38 pin of described chip (13) are connected with the 5th module (8), 38 pin of described chip (13) are connected with+3.3V power interface, 46 pin of described chip (13) are connected with+1.2V power interface, 47 pin of described chip (13), 49 pin ground connection, be linked on+1.2V power interface after 48 pin of described chip (13) are connected with the 3rd module (6),
Described first module (4) comprises the 3rd electric capacity (C3) and the 4th electric capacity (C4), 2 pin of described 3rd electric capacity (C3) are connected with power supply one interface (V1), and 2 pin of described 3rd electric capacity (C3) are connected with+1.2V power interface, 1 pin ground connection of described 3rd electric capacity (C3), 2 pin of described 4th electric capacity (C4) are connected with power supply two interface (V2), and 2 pin of described 4th electric capacity (C4) are connected with+3.3V power interface, 1 pin ground connection of described 4th electric capacity (C4);
Described second module (5) comprises the 5th electric capacity (C5), 7th electric capacity (C7), 9th electric capacity (C9), 11 electric capacity (C11), 21 electric capacity (C21), 16 electric capacity (C16), 6th electric capacity (C6), 8th electric capacity (C8), tenth electric capacity (C10), 12 electric capacity (C12), 13 electric capacity (C13), 18 electric capacity (C18) and the 22 electric capacity (C22), 1 pin of described 5th electric capacity (C5), 1 pin of the 7th electric capacity (C7), 1 pin of the 9th electric capacity (C9), 1 pin of the 11 electric capacity (C11), 1 pin of the 21 electric capacity (C21), 1 pin of the 16 electric capacity (C16) is also connected with+1.2V power interface after connecing, 2 pin of described 5th electric capacity (C5), 2 pin of the 7th electric capacity (C7), 2 pin of the 9th electric capacity (C9), 2 pin of the 11 electric capacity (C11), 2 pin of the 21 electric capacity (C21), the equal ground connection of 2 pin of the 16 electric capacity (C16), 1 pin of described 6th electric capacity (C6), 1 pin of the 8th electric capacity (C8), 1 pin of the tenth electric capacity (C10), 1 pin of the 12 electric capacity (C12), 1 pin of the 13 electric capacity (C13), 1 pin of the 18 electric capacity (C18), 1 pin of the 22 electric capacity (C22) is also connected with+3.3V power interface after connecing, 2 pin of described 6th electric capacity (C6), 2 pin of the 8th electric capacity (C8), 2 pin of the tenth electric capacity (C10), 2 pin of the 12 electric capacity (C12), 2 pin of the 13 electric capacity (C13), 2 pin of the 18 electric capacity (C18), the equal ground connection of 2 pin of the 22 electric capacity (C22),
Described 3rd module (6) comprises the 14 electric capacity (C14), 15 electric capacity (C15) and inductance one (L1), 2 pin of described 14 electric capacity (C14), 1 pin of the 15 electric capacity (C15) is also connected with 1 pin of inductance one (L1) after connecing, 2 pin of described 14 electric capacity (C14), 1 pin of the 15 electric capacity (C15) is also connected with+1.2V power interface after connecing, 1 pin of described 14 electric capacity (C14), the equal ground connection of 2 pin of the 15 electric capacity (C15), 2 pin of described inductance one (L1) are connected with 48 pin of chip (13),
Described four module (7) comprises the second resistance (R2) and light emitting diode (LED), 1 pin of described second resistance (R2) is connected with 9 pin of chip (13), 2 pin of described second resistance (R2) are connected with 2 pin of light emitting diode (LED), and 1 pin of described light emitting diode (LED) is connected with+3.3V power interface;
Described 5th module (8) comprises the first resistance (R1) and the second electric capacity (C2), be linked on 38 pin of chip (13) after 1 pin of described first resistance (R1) is connected with 2 pin of the second electric capacity (C2), 2 pin of described first resistance (R1) are connected with+3.3V power interface, 1 pin ground connection of described second electric capacity (C2);
Described 6th module (9) comprises the first electric capacity (C1) and crystal oscillator (X1), 1 pin of described first electric capacity (C1) and 3 pin of crystal oscillator (X1) are also linked on 26 pin of chip (13) after connecing, 2 pin of described first electric capacity (C1) and 1 pin of crystal oscillator (X1) are also linked on 25 pin of chip (13) after connecing, the earthing of casing of described crystal oscillator (X1);
Described 7th module (10) comprises the 3rd resistance (R3), and 1 pin of described 3rd resistance (R3) is connected with 17 pin of chip (13), 2 pin ground connection of described 3rd resistance (R3);
Described 8th module (11) comprises the 19 electric capacity (C19), 20 electric capacity (C20), 17 electric capacity (C17), 23 electric capacity (C23), 1 pin of described 19 electric capacity (C19), 1 pin of the 20 electric capacity (C20), 1 pin of the 17 electric capacity (C17), 1 pin difference correspondence of the 23 electric capacity (C23) and 33 pin of chip (13), 32 pin, 30 pin, 29 pin are connected, 2 pin of described 19 electric capacity (C19), 2 pin of the 20 electric capacity (C20), 2 pin of the 17 electric capacity (C17), 2 pin difference correspondences of the 23 electric capacity (C23) and 49 pin of NGFF interface (18), 47 pin, 43 pin, 41 pin are connected,
Described 9th module (12) comprises the 4th resistance (R4), the 5th resistance (R5), the 6th resistance (R6), 1 pin difference correspondence of 1 pin of described 4th resistance (R4), 1 pin of the 5th resistance (R5), the 6th resistance (R6) is connected with 9 pin of chip (13), 37 pin, 42 pin, the equal ground connection of 2 pin of 2 pin of described 4th resistance (R4), 2 pin of the 5th resistance (R5), the 6th resistance (R6);
Described tenth module (14) comprises the 25 electric capacity (C25) and the 26 electric capacity (C26), 2 pin of described 25 electric capacity (C25), 2 pin of the 26 electric capacity (C26) are connected with 20 pin of chip (13), 19 pin respectively, and 1 pin of described 25 electric capacity (C25), 1 pin of the 26 electric capacity (C26) are connected with 6 pin of USB interface (17), 5 pin respectively;
Described 11 module (15) comprises the 27 electric capacity (C27) and the 28 electric capacity (C28), described 2 pin of the 27 electric capacity (C27), 1 pin of the 28 electric capacity (C28) being connected with 1 pin of USB interface (17) after connecing, described 1 pin of the 27 electric capacity (C27), 2 pin of the 28 electric capacity (C28) connect rear ground connection;
Described 12 module (16) comprises the 7th resistance (R7), 1 pin of described 7th resistance (R7) is connected with 10 pin of chip (13), and 2 pin of described 7th resistance (R7) are connected with 1 pin of USB interface (17);
1 pin of described USB interface (17) is connected with+5V power interface, 4 pin of described USB interface (17), 7 pin, 10 pin and 11 pin ground connection;
1 pin of described NGFF interface (18), 3 pin, 5 pin, 27 pin, 33 pin, 39 pin, 45 pin, 51 pin, 57 pin, 71 pin, 73 pin and the equal ground connection of 75 pin, 38 pin serial connection the 12 resistance (R12) ground connection afterwards of described NGFF interface (18), 69 pin serial connection the 13 resistance (R13) ground connection afterwards of described NGFF interface (18), 2 pin of described NGFF interface (18), 4 pin, 70 pin, 72 pin, 74 pin are all connected with power supply three interface (VCC33).
4. solid state hard disc NGFF according to claim 3 turns the control circuit of the switching device of USB, it is characterized in that: described High-current output power control circuit (19) comprises the 29 electric capacity (C29), 30 electric capacity (C30), 31 electric capacity (C31), 32 electric capacity (C32), high electric current out-put supply (U2), 8th resistance (R8), 9th resistance (R9), inductance two (L2), described one end of 29 electric capacity (C29) and 2 pin of the 30 electric capacity (C30) also connect rear ground connection, the described other end of the 29 electric capacity (C29) and 1 pin of the 30 electric capacity (C30) and connect rear respectively with 1 pin of high electric current out-put supply (U2), 4 pin serial connections, the described other end of the 29 electric capacity (C29) is with 1 pin of the 30 electric capacity (C30) and be connected with+5V power interface after connecing, 2 pin ground connection of described high electric current out-put supply (U2), 3 pin of described high electric current out-put supply (U2), be connected with power supply three interface (VCC33) after inductance two (L2) serial connection, 5 pin of described high electric current out-put supply (U2) are connected in series rear ground connection with the 9th resistance (R9), 5 pin and the 8th resistance (R8) of described high electric current out-put supply (U2) are connected in series and are connected with power supply three interface (VCC33) afterwards, described one end of 32 electric capacity (C32) and 2 pin of the 31 electric capacity (C31) also connect rear ground connection, the other end of described 32 electric capacity (C32), 1 pin of the 31 electric capacity (C31) is also connected with power supply three interface (VCC33) after connecing.
5. solid state hard disc NGFF according to claim 3 turns the control circuit of the switching device of USB, it is characterized in that: described firmware updating and preservation firmware control circuit (20) comprise cd-rom recorder (U3), tenth resistance (R10), 33 electric capacity (C33), 11 resistance (R11), 1 pin of described cd-rom recorder (U3), 2 pin, 5 pin, 6 pin respectively with 6 pin of chip (13), 2 pin, 5 pin, 3 pin are connected, 2 pin of described cd-rom recorder (U3) are connected with 1 pin of the tenth resistance (R10), 2 pin of described tenth resistance (R10) are connected with+3.3V power interface, 3 pin of described cd-rom recorder (U3) are connected with 2 pin of the 11 resistance (R11), 1 pin of described 11 resistance (R11) is connected with+3.3V power interface, 4 pin ground connection of described cd-rom recorder (U3), described 1 pin of the 33 electric capacity (C33) and 7 pin of cd-rom recorder (U3), 8 pin are linked on+3.3V power interface after being connected, 2 pin ground connection of described 33 electric capacity (C33).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520625632.7U CN204883676U (en) | 2015-08-18 | 2015-08-18 | NGFF changes USB's switching device for solid state hard drives and control circuit thereof |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520625632.7U CN204883676U (en) | 2015-08-18 | 2015-08-18 | NGFF changes USB's switching device for solid state hard drives and control circuit thereof |
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|---|---|
| CN204883676U true CN204883676U (en) | 2015-12-16 |
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| CN201520625632.7U Expired - Fee Related CN204883676U (en) | 2015-08-18 | 2015-08-18 | NGFF changes USB's switching device for solid state hard drives and control circuit thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105045538A (en) * | 2015-08-18 | 2015-11-11 | 芜湖金胜电子科技股份有限公司 | NGFF-to-USB switching device and control circuit thereof for solid-state disk |
-
2015
- 2015-08-18 CN CN201520625632.7U patent/CN204883676U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105045538A (en) * | 2015-08-18 | 2015-11-11 | 芜湖金胜电子科技股份有限公司 | NGFF-to-USB switching device and control circuit thereof for solid-state disk |
| CN105045538B (en) * | 2015-08-18 | 2018-08-07 | 芜湖金胜电子科技股份有限公司 | Solid state disk NGFF turns the switching device and its control circuit of USB |
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