CN204760385U - Nonvolatile hinders and becomes active integrated morphology of memory - Google Patents
Nonvolatile hinders and becomes active integrated morphology of memory Download PDFInfo
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- CN204760385U CN204760385U CN201520423342.4U CN201520423342U CN204760385U CN 204760385 U CN204760385 U CN 204760385U CN 201520423342 U CN201520423342 U CN 201520423342U CN 204760385 U CN204760385 U CN 204760385U
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- metal electrode
- film
- integrated morphology
- active integrated
- storing device
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Abstract
The utility model relates to a storage technology field specifically, relates to a nonvolatile hinders and becomes active integrated morphology of memory. On it includes the srTiO3 substrate, locates the laAlO3 film on the srTiO3 substrate and locates the srTiO3 substrate and pass a metal electrode of laAlO3 film, a metal electrode is as source electrode S and bit line, is provided with as the 2nd metal electrode of grid G and word line on the laAlO3 film and regards as the 3rd metal electrode of printed line, forms two dimensional electron gas between the interface of srTiO3 substrate and laAlO3 film. The utility model discloses with the channel layer of FET selector with hinder the bottom electrode that becomes the memory and pass through two dimensional electron gas and is connected, the preparation that can save the FET drain electrode, the laAlO3 film can be simultaneously hinders the storage medium who becomes the memory with nonvolatile as the dielectric layer of FET selector, can simplify integrated device structure unit by a wide margin, reduce the device alternately the array prepare cost and high density and intersect array preparation technology.
Description
Technical field
The utility model relates to technical field of memory, particularly, relates to the active integrated morphology of a kind of non-volatile resistance-variable storing device.
Background technology
Non-volatility memorizer has the advantage still can preserved for a long time for the logical data that seasonable device stores at non-transformer, is one of of paramount importance hardware in digital information technique, enjoys the concern of scholar and enterprise.
At present, on market, the non-volatility memorizer of main flow is the flash memory (Flashmemory) based on charge-storage mechanism, however its because large, the erasable speed of operating current is slow, durability compared with, high write voltage, device size be difficult to narrow down to the such as the following shortcoming of 22 nanometer and can not have met the needs that electronic information technology industry develops rapidly.Develop the active demand that a kind of information storage technology of future generation has completely newly become semiconductor information industry.For non-volatile resistance-change memory, except the key factor that microphysics mechanism is its development of obstruction and application, its integration mode is also a key factor.
Utility model content
The utility model, for overcoming at least one defect (deficiency) described in above-mentioned prior art, provides a kind of active integrated morphology of non-volatile resistance-variable storing device that significantly can simplify integrated device structure unit.
For solving the problems of the technologies described above, the technical solution of the utility model is as follows:
The active integrated morphology of a kind of non-volatile resistance-variable storing device, comprises SrTiO
3substrate, be located at SrTiO
3laAlO on substrate
3film and be located at SrTiO
3also through LaAlO on substrate
3first metal electrode of film, the first metal electrode as source S and bit line, LaAlO
3film is provided with as grid G and the second metal electrode of wordline and the 3rd metal electrode as printed line, SrTiO
3substrate and LaAlO
3two-dimensional electron gas is formed between the interface of film.
In such scheme, the first metal electrode is platinum electrode.
In such scheme, the second metal electrode is platinum electrode.
In such scheme, the 3rd metal electrode is platinum electrode.
In such scheme, LaAlO
3film is monocrystal thin films.
In such scheme, utilize molecular beam epitaxy at SrTiO
3substrate forms LaAlO
3monocrystal thin films.
In such scheme, the generation type of the first metal electrode and the 3rd metal electrode is: preparing channel layer length by photoetching method and wet etching is certain size Hall FET device, and utilizes ion beam etching technology to prepare and the first metal electrode of two-dimensional electron gas ohmic contact and the 3rd metal electrode.
In such scheme, described certain size is 100 μm.
In such scheme, the first metal electrode and the 3rd metal electrode lay respectively at the both sides of the second metal electrode.
Compared with prior art, the beneficial effect of technical solutions of the utility model is:
The channel layer of FET selector is connected by two-dimensional electron gas with the hearth electrode of resistance-variable storing device by the utility model, can save the preparation of FET drain electrode, LaAlO
3film simultaneously as the dielectric layer of FET selector and the storage medium of non-volatile resistance-variable storing device, can significantly simplify integrated device structure unit, reduces device crossed array preparation cost and high density crossed array preparation technology.
Accompanying drawing explanation
Fig. 1 is that traditional high-density memory technology adopts FET device to form the structural representation of active integration mode as the selected cell of memory.
Fig. 2 is the stereogram of the active integrated morphology of a kind of non-volatile resistance-variable storing device of the utility model.
Fig. 3 is the sectional view of the active integrated morphology of a kind of non-volatile resistance-variable storing device of the utility model.
1 is SrTiO
3substrate, 2 is LaAlO
3film, 3 is the first metal electrode, and 4 is the second metal electrode, and 5 is the 3rd metal electrode, and 6 is two-dimensional electron gas, and 7 is selector, and 8 is memory.
Embodiment
Accompanying drawing, only for exemplary illustration, can not be interpreted as the restriction to this patent;
In order to better the present embodiment is described, some parts of accompanying drawing have omission, zoom in or out, and do not represent the size of actual product;
To those skilled in the art, in accompanying drawing, some known features and explanation thereof may be omitted is understandable.
In description of the present utility model, it is to be appreciated that term " first ", " second ", " the 3rd " only for describing object, and can not be interpreted as the quantity of instruction or hint relative importance or implicit indicated technical characteristic.Thus, one or more these features can be expressed or impliedly be comprised to the feature of " first ", " second " of restriction.In description of the present utility model, except as otherwise noted, the implication of " multiple " is two or more.
In description of the present utility model, it should be noted that, unless otherwise clearly defined and limited, term " installation ", " connection " should be interpreted broadly, and such as, can be fixedly connected with, also can be removably connect, or connect integratedly; Can be mechanical connection, also can be electrical connection; Can be directly be connected, also can be indirectly connected by intermediary, the connection of two element internals can be said.For the ordinary skill in the art, concrete condition above-mentioned term can be understood at concrete meaning of the present utility model.
Below in conjunction with drawings and Examples, the technical solution of the utility model is described further.
Embodiment 1
As shown in Figures 2 and 3, the active integrated morphology of the non-volatile resistance-variable storing device of the utility model specifically comprises SrTiO
3substrate 1, be located at SrTiO
3laAlO on substrate 1
3film 2 and be located at SrTiO
3also through LaAlO on substrate 1
3first metal electrode 3, first metal electrode 3 of film 2 is as source S and bit line Bitline, LaAlO
3film 2 is provided with as grid G and second metal electrode 4 of wordline Wordline and the 3rd metal electrode 5, SrTiO as printed line Plateline
3substrate 1 and LaAlO
3two-dimensional electron gas 6 is formed between the interface of film 2.
First metal electrode 3, second metal electrode 4 and the 3rd metal electrode 5 are platinum electrode.
The structure expression of the memory that the utility model realizes is: Pt/LaAlO
3/ SrTiO
3, in this structure, the channel layer of FET selector is connected by two-dimensional electron gas with the hearth electrode of resistance-variable storing device, the preparation of FET drain electrode can be saved, LaAlO
3film simultaneously as the dielectric layer of FET selector and the storage medium of non-volatile resistance-variable storing device, can significantly simplify integrated device structure unit, reduces device crossed array preparation cost and high density crossed array preparation technology.
In specific implementation process, LaAlO
3film is monocrystal thin films.
In specific implementation process, utilize molecular beam epitaxy or laser molecular beam epitaxy at SrTiO
3substrate is formed the LaAlO of different-thickness
3monocrystal thin films.
In specific implementation process, the generation type of the first metal electrode 3 and the 3rd metal electrode 5 is: preparing channel layer length by photoetching method and wet etching is certain size Hall FET device, and utilizes ion beam etching technology to prepare and the first metal electrode 3 of two-dimensional electron gas ohmic contact and the 3rd metal electrode 5.Preferably, channel layer length 100 μm of Hall FET device are prepared by photoetching method and wet etching.
In specific implementation process, the first metal electrode 3 and the 3rd metal electrode 5 lay respectively at the both sides of the second metal electrode 4.
Make the channel layer between the source and drain of FET selector (two-dimensional electron gas) be in low resistance state when applying voltage to a certain wordline (wordline) of the active integrated morphology of memory of the present utility model, then to non-volatile resistance-variable storing device write or logic state can be read; Otherwise make the channel layer of FET selector be in high-resistance state when applying opposite voltage to this wordline, then memory can not be written into or read corresponding logic state.So make LaAlO
3film both can be used as the dielectric layer of FET selector, also can be used as the storage medium of non-volatile resistance-variable storing device, can significantly simplify integrated device structure unit.
The corresponding same or analogous parts of same or analogous label;
Describe in accompanying drawing position relationship for only for exemplary illustration, the restriction to this patent can not be interpreted as;
Obviously, above-described embodiment of the present utility model is only for the utility model example is clearly described, and is not the restriction to execution mode of the present utility model.For those of ordinary skill in the field, can also make other changes in different forms on the basis of the above description.Here exhaustive without the need to also giving all execution modes.All do within spirit of the present utility model and principle any amendment, equivalent to replace and improvement etc., within the protection range that all should be included in the utility model claim.
Claims (9)
1. the active integrated morphology of non-volatile resistance-variable storing device, is characterized in that, comprise SrTiO
3substrate, be located at SrTiO
3laAlO on substrate
3film and be located at SrTiO
3also through LaAlO on substrate
3first metal electrode of film, the first metal electrode as source S and bit line, LaAlO
3film is provided with as grid G and the second metal electrode of wordline and the 3rd metal electrode as printed line, SrTiO
3substrate and LaAlO
3two-dimensional electron gas is formed between the interface of film.
2. the active integrated morphology of non-volatile resistance-variable storing device according to claim 1, is characterized in that, the first metal electrode is platinum electrode.
3. the active integrated morphology of non-volatile resistance-variable storing device according to claim 1, is characterized in that, the second metal electrode is platinum electrode.
4. the active integrated morphology of non-volatile resistance-variable storing device according to claim 1, is characterized in that, the 3rd metal electrode is platinum electrode.
5. the active integrated morphology of non-volatile resistance-variable storing device according to claim 1, is characterized in that, LaAlO
3film is monocrystal thin films.
6. the active integrated morphology of non-volatile resistance-variable storing device according to claim 5, is characterized in that, utilize molecular beam epitaxy at SrTiO
3substrate forms LaAlO
3monocrystal thin films.
7. the active integrated morphology of non-volatile resistance-variable storing device according to claim 1, it is characterized in that, the generation type of the first metal electrode and the 3rd metal electrode is: preparing channel layer length by photoetching method and wet etching is certain size Hall FET device, and utilizes ion beam etching technology to prepare and the first metal electrode of two-dimensional electron gas ohmic contact and the 3rd metal electrode.
8. the active integrated morphology of non-volatile resistance-variable storing device according to claim 7, is characterized in that, described certain size is 100 μm.
9. the active integrated morphology of non-volatile resistance-variable storing device according to any one of claim 1 to 8, is characterized in that, the first metal electrode and the 3rd metal electrode lay respectively at the both sides of the second metal electrode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520423342.4U CN204760385U (en) | 2015-06-18 | 2015-06-18 | Nonvolatile hinders and becomes active integrated morphology of memory |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520423342.4U CN204760385U (en) | 2015-06-18 | 2015-06-18 | Nonvolatile hinders and becomes active integrated morphology of memory |
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| Publication Number | Publication Date |
|---|---|
| CN204760385U true CN204760385U (en) | 2015-11-11 |
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ID=54475065
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520423342.4U Expired - Fee Related CN204760385U (en) | 2015-06-18 | 2015-06-18 | Nonvolatile hinders and becomes active integrated morphology of memory |
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| Country | Link |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104882462A (en) * | 2015-06-18 | 2015-09-02 | 中山大学 | Active integrated structure of non-volatile resistive random access memory |
| CN110010676A (en) * | 2019-04-16 | 2019-07-12 | 中南大学 | A kind of lanthanum aluminate with high carrier concentration and high electron mobility/strontium titanates hetero-junctions and its preparation method and application |
-
2015
- 2015-06-18 CN CN201520423342.4U patent/CN204760385U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104882462A (en) * | 2015-06-18 | 2015-09-02 | 中山大学 | Active integrated structure of non-volatile resistive random access memory |
| CN104882462B (en) * | 2015-06-18 | 2018-03-16 | 中山大学 | A kind of active integrated morphology of non-volatile resistance-variable storing device |
| CN110010676A (en) * | 2019-04-16 | 2019-07-12 | 中南大学 | A kind of lanthanum aluminate with high carrier concentration and high electron mobility/strontium titanates hetero-junctions and its preparation method and application |
| CN110010676B (en) * | 2019-04-16 | 2020-10-02 | 中南大学 | Lanthanum aluminate/strontium titanate heterojunction with high carrier concentration and high electron mobility and preparation method and application thereof |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151111 Termination date: 20160618 |