CN204681319U - Electric discharge road before the degenerative CMOS of bridge-type input resistance - Google Patents
Electric discharge road before the degenerative CMOS of bridge-type input resistance Download PDFInfo
- Publication number
- CN204681319U CN204681319U CN201520372601.5U CN201520372601U CN204681319U CN 204681319 U CN204681319 U CN 204681319U CN 201520372601 U CN201520372601 U CN 201520372601U CN 204681319 U CN204681319 U CN 204681319U
- Authority
- CN
- China
- Prior art keywords
- amplifier section
- importation
- detector
- resistance
- ohm
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Amplifiers (AREA)
Abstract
This patent discloses a kind of bridge-type input resistance negative feedback C MOS front electric discharge road, be made up of importation and amplifier section, importation is connected with amplifier section direct-coupling.This circuit adopts balance bridge type input structure in importation, and two branch roads of importation all adopt 1K ohm biasing resistor, and a branch road is connected with detector, form a path, another branch road is connected with blind element, forms another path, and two paths form balance bridge type structure.For meeting different multiplication factor requirements, the amplification adapting to different responsiveness detector signal reads, amplifier section adopts the resistive degeneration structure of variable gain, adopt the feedback resistance of alternative 5M, 2M or 1M ohm between the negative input end of amplifier section and output, formed the feedback resistance of different size by two MOS switch control rule.For making circuit can work under liquid nitrogen cryogenics, the differential amplifier in amplifier section adopts cascodes, positive-negative power supply.
Description
Technical field
This patent relates to a kind of cmos circuit, road of particularly discharging before the degenerative CMOS of bridge-type input resistance.
Background technology
In space remote sensing field, infrared detector module is the core component of infrared imaging system, guide type Infrared Detectors has very large advantage because of it in long wave field, so most LONG WAVE INFRARED detection uses guide type Infrared Detectors, but its internal resistance is very low, generally lower than 100 ohm, and be operated in liquid nitrogen cryogenics, so just the circuit interconnected with such detector is had higher requirement, require that circuit can mate with Low ESR detector, also can work under liquid nitrogen cryogenics.What current most long-wave light-guide Infrared Detectors signal read employing is the method for designing that detector separates with circuit, detector works at low temperatures, circuit works at normal temperatures, and signal is the as easy as rolling off a log interference that induces one in transmitting procedure, is unfavorable for the raising of detection system performance.
For realizing high performance detection and reading, require that long-wave light-guide detector is closely connected with circuit, designed circuit also can work at low temperatures, but the design of integrated circuit mostly adopts cmos circuit at present, and its internal resistance is higher, in order to realize mating of high resistant cmos circuit and Low ESR detector, need a kind of novel topological structure of design to realize, before this circuit have employed the degenerative CMOS of a kind of bridge-type input resistance, electric discharge road solves this problem well.The high-performance that this circuit is not only suitable for long-wave light-guide detector signal reads, and is also applicable to the measurement of other low-impedance Minitype resistance change, provides important technical foundation to large-scale LONG WAVE INFRARED focal plane detection technology.
Summary of the invention
This patent proposes a kind of CMOS front electric discharge road, bridge-type input mode is adopted in importation, overcome existing cmos circuit and the unmatched problem of Low ESR detector, this circuit is applicable to the amplification of the Low ESR detector signal of less than 100 ohm, also can normally can work under liquid nitrogen cryogenics, before such CMOS, electric discharge road and detector normally can work after interconnecting under liquid nitrogen cryogenics, overcome present detector to work at low temperatures, circuit works at normal temperatures, and signal is the as easy as rolling off a log shortcoming inducing one to disturb in transmitting procedure.
Its operation principle is: circuit input end is balance bridge type mode, and the minor variations of Low ESR detector resistance makes bridge disequilibrium, and the positive-negative input end that its voltage difference is directly inputted to amplifier realizes differential amplification.Different arranging of feedback resistance can meet different bandwidth requirements and different equivalent input noises, uses large feedback resistance to reduce the equivalent input noise of circuit as far as possible when ensureing amplifier bandwidth.Increase the signal that bias current can increase detector, if but the electric current flowing through detector is too large, detector can be made to generate heat aggravate, improve cooling system requirement, but the voltage signal that too little electric current can make detector produce is too little, be unfavorable for that the high-performance of signal reads, so biasing resistor is designed to 1K ohm, ± 1.5 volts to ± 5 volts electric currents flowing through detector when powering are 1.5 milliamperes to 5 milliamperes.
The technical solution of this patent is:
Adopt balance bridge type input structure in importation, two bridge-type branch roads of importation all adopt 1K ohm biasing resistor, and double-width grinding Single-end output amplifier adopts positive-negative power supply; Adopt the feedback resistance of alternative 5M, 2M or 1M ohm between the negative input end of differential amplifier and output, be characterized in:
A) in FIG, R4, R5, detector and blind element form bridge-type input structure, and R4 is connected with infrared photoconductive detector, and form a path, R5 is connected with blind element, forms another path, and two paths form balance bridge type structure.R5 and R4 is corresponding, and its resistance is equal, and this circuit design is 1K ohm, and when detector and blind element resistance are all less than 100 ohm, the noise suppressed ratio introduced from bias voltage input is greater than 20dB;
B) Fig. 2 is differential amplifier circuit topology diagram.Adopt the one-level folded cascode configuration of Differential Input.Wherein PM7 and PM8 is that input is to pipe, PM7, PM8, NM4, NM5 form the cascodes of Differential Input, PM4, PM5 are the active load of difference output, and NM6, NM7 provide current source to cascade, and In-, In+ are the positive-negative input end of differential operational amplifier.NM3 and NM0 forms first order current mirror, and PM0 and PM1 forms second level current mirror, and NM6, NM7 of NM1 and amplifier section form current mirror, and the PM3 of PM0 and amplifier section forms current mirror.Because this amplifier adopts positive-negative power supply, input is without minimum voltage requirement;
C) feedback resistance of alternative 5M, 2M or 1M ohm is adopted between the negative input end of differential amplifier and output, when switch 1 and switch 2 are high entirely, total feedback resistance is about 0.6M ohm, when switch 1 and switch 2 are low entirely, total feedback resistance is 5M ohm, may be combined with into different feedback resistance sizes by selector switch 1 and switch 2.The amplification that this amplifier is suitable for different responsiveness detector signal reads.
This patent has the following advantages:
1, this circuit topological structure adopts the method for balance bridge type input and resistive degeneration, successfully solves the problem that cmos circuit mates with Low ESR detector.
2, because this circuit can work under liquid nitrogen cryogenics, realizing circuit and detector together can encapsulate and can work under liquid nitrogen cryogenics, greatly reducing the equivalent input noise of assembly.
3, feedback resistance is designed to the feedback resistance of 5M, 2M or 1M ohm, can realize different multiplication factors.
4, biasing resistor is designed to 1K ohm, and when resistance that is first when detector and blind element is less than 100 ohm, the noise suppressed ratio introduced from bias voltage input is greater than 20dB, is conducive to the reduction of equivalent input noise.
Accompanying drawing explanation
Fig. 1 is electric discharge road overall construction drawing before the degenerative CMOS of bridge-type input resistance.
Fig. 2 is DIF-AMP differential amplifier circuit topology diagram.
Embodiment
Embodiment 1
Fig. 1 is electric discharge road overall construction drawing before the degenerative CMOS of bridge-type input resistance.R4 is connected with infrared photoconductive detector, and form a path, R5 is connected with detector blind element, forms another path, and two paths form balance bridge type structure.To strengthen or reduce to flow through the electric current of optical waveguide detector, can strengthen or reduce the resistance sizes of R4 and R5.R5 and R4 is corresponding, and its resistance should be designed to equal, and this circuit design is 1K ohm.The resistance sizes of blind element and detector is equal, if detector resistance and the not of uniform size of blind element resistance cause, circuit normally can be worked by regulating Vbias.This amplifier is applicable to the amplification of the low input impedance optical waveguide detector signal of less than 100 ohm.After infrared photoconductive detector accepts infrared signal, its resistance generation minor variations, the voltage difference causing in and ref to hold changes, and its knots modification makes infrared signal read smoothly by amplifier.
When detector resistance and blind element resistance are 100 ohm, biasing resistor 1K ohm is 10 times of detector resistance or blind element resistance, and when arriving amplifier in from the noise of Vbias end introducing like this, its noise is just suppressed 10 times.When biasing resistor is certain, the resistance of detector and blind element is less, and the suppression multiple of its noise is larger.The difference of biasing resistor and detector resistance is larger more beneficial to noise suppressed.
In order to ensure suitable multiplication factor, this circuit design is that the feedback resistance of 5M, 2M or 1M ohm is optional, when switch 1 and switch 2 are high entirely, total feedback resistance is about 0.6M ohm, when switch 1 and switch 2 are low entirely, total feedback resistance is 5M ohm, may be combined with into different feedback resistance sizes by selector switch 1 and switch 2.To increase multiplication factor, can increase feedback resistance size, but may cause diminishing of amplifier bandwidth, concrete condition should decide according to the responsiveness of detector.This electronic feedback capacitor design is 2PF, and this capacitance size can do suitable adjustment according to the concrete condition of CMOS technology, and object ensures that amplifier can realize phase margin when normal work and compensate, and eliminates the higher-order of oscillation, play stabilizing circuit.
Embodiment 2
Fig. 2 is differential amplifier circuit topology diagram.Adopt the one-level folded cascode configuration of Differential Input.Wherein PM7 and PM8 is that input is to pipe, PM7, PM8, NM4, NM5 form the cascodes of Differential Input, PM4, PM5 are the active load of difference output, and NM6, NM7 provide current source to cascade, and In-, In+ are the positive-negative input end of differential operational amplifier.NM3 and NM0 forms first order current mirror, and PM0 and PM1 forms second level current mirror, and NM6, NM7 of NM1 and amplifier section form current mirror, and the PM3 of PM0 and amplifier section forms current mirror.Pipe reference dimension (unit is micron) as shown in the table.
This differential amplifier adopts cascodes, and can utilize positive-negative power supply, such differential input end is without minimum voltage requirement, and when differential input end is zero volt, circuit also can normally work.Because this differential amplifier have employed folded cascode configuration, can normally work under normal temperature and liquid nitrogen cryogenics, operating voltage range is comparatively large, normally can work, but need consider the power consumption difference that the difference of operating voltage causes between ± 2.5 volts and ± 1 volt.
Embodiment 3
Under liquid nitrogen cryogenics, test road of discharging before this CMOS, its minimum multiplication factor is 400 times (feedback resistances of 0.6M ohm).Then discharge before CMOS road and Low ESR detector are carried out interconnected, test this assembly, the operating state of circuit and detector is good, and the three dB bandwidth of assembly is greater than 2KHZ, and equivalent inpnt spot noise is less than 30nV/Hz
-1/2.Utilize lock-in amplifier EG Model 117 to test its pass-band noise, result is as shown in the table:
From test result, before the degenerative CMOS of this bridge-type input resistance electric discharge road be connected with Low ESR detector after under liquid nitrogen cryogenics signal can read smoothly, noise testing result is excellent, successfully achieves mating of high resistant cmos circuit and Low ESR detector.
By specific embodiment, this patent is illustrated above, but this patent is not limited to these specific embodiments.It will be understood by those skilled in the art that and can also make various amendment, equivalent replacement, change etc. to the present invention, as long as these conversion do not deviate from the spirit of this patent, all should within the protection range of this patent.
Claims (1)
1. an electric discharge road before the degenerative CMOS of bridge-type input resistance, is made up of importation and amplifier section, it is characterized in that:
Described importation adopts balance bridge type input mode, and two bridge-type branch roads all adopt 1K ohm biasing resistor, and a branch road is connected with detector, form a path, another branch road is connected with blind element, forms another path, and two paths form balance bridge type structure;
Described amplifier section adopts the resistive degeneration structure of variable gain, the feedback resistance of alternative 5M, 2M or 1M ohm is adopted between negative input end and output, the feedback resistance of different size is formed by two switch control rule, differential amplifier in described amplifier section adopts cascodes, positive-negative power supply, importation is connected with amplifier section direct-coupling.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520372601.5U CN204681319U (en) | 2015-06-02 | 2015-06-02 | Electric discharge road before the degenerative CMOS of bridge-type input resistance |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201520372601.5U CN204681319U (en) | 2015-06-02 | 2015-06-02 | Electric discharge road before the degenerative CMOS of bridge-type input resistance |
Publications (1)
Publication Number | Publication Date |
---|---|
CN204681319U true CN204681319U (en) | 2015-09-30 |
Family
ID=54180986
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201520372601.5U Active CN204681319U (en) | 2015-06-02 | 2015-06-02 | Electric discharge road before the degenerative CMOS of bridge-type input resistance |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN204681319U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104883141A (en) * | 2015-06-02 | 2015-09-02 | 中国科学院上海技术物理研究所 | Bridge type input resistance negative feedback CMOS (Complementary Metal Oxide Semiconductor) pre-amplifying circuit |
-
2015
- 2015-06-02 CN CN201520372601.5U patent/CN204681319U/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104883141A (en) * | 2015-06-02 | 2015-09-02 | 中国科学院上海技术物理研究所 | Bridge type input resistance negative feedback CMOS (Complementary Metal Oxide Semiconductor) pre-amplifying circuit |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN104238611B (en) | Current-mode band gap current reference | |
CN105406824B (en) | Common mode feedback circuit, corresponding signal processing circuit and method | |
US8497711B2 (en) | Envelope detector and associated method | |
CN106933288B (en) | A kind of low-power consumption is without capacitor type low pressure difference linear voltage regulator outside piece | |
CN104035464A (en) | Voltage regulator | |
KR20070038126A (en) | Programmable low noise amplifier and method | |
CN102270972A (en) | Variable-gain amplifier | |
CN103324230B (en) | Voltage-current convertor | |
CN107134984B (en) | Offset voltage eliminating circuit | |
CN106444947B (en) | It is a kind of for the compensation circuit without capacitive LDO | |
KR20240016438A (en) | Power detection circuits, chips and communication terminals | |
CN204681319U (en) | Electric discharge road before the degenerative CMOS of bridge-type input resistance | |
CN104883141A (en) | Bridge type input resistance negative feedback CMOS (Complementary Metal Oxide Semiconductor) pre-amplifying circuit | |
CN100550606C (en) | Circuit arrangement with different common mode I/O voltage | |
CN104359562B (en) | A kind of non-refrigerated infrared detector reading circuit of current mirror manner | |
JP2007159020A (en) | Current/voltage-converting circuit | |
Maya-Hernández et al. | Low-power analog lock-in amplifier for high-resolution portable sensing systems | |
CN101908365B (en) | Voltage generation circuit and memory | |
CN204165656U (en) | The non-refrigerated infrared detector sensing circuit of current mirror manner | |
CN109067371A (en) | A kind of non-resistance Network Programmable gain amplifier circuit | |
CN104601186A (en) | Direct-current offset calibration method and device | |
CN110460338B (en) | Sampling hold circuit | |
CN203675058U (en) | Frequency-compensation differential input amplifying circuit | |
CN105183066A (en) | Band-gap reference circuit for infrared focal plane array | |
CN103166585A (en) | Complementary metal oxide semiconductor (CMOS) amplifying circuit matched with infrared low-impedance photoconductive detector |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |