CN204680668U - Substrate and use the integrated circuit package body of this substrate - Google Patents
Substrate and use the integrated circuit package body of this substrate Download PDFInfo
- Publication number
- CN204680668U CN204680668U CN201520363916.3U CN201520363916U CN204680668U CN 204680668 U CN204680668 U CN 204680668U CN 201520363916 U CN201520363916 U CN 201520363916U CN 204680668 U CN204680668 U CN 204680668U
- Authority
- CN
- China
- Prior art keywords
- substrate
- hole
- integrated circuit
- package body
- circuit package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The utility model is about substrate and the integrated circuit package body using this substrate.Integrated circuit package body according to an embodiment comprises: substrate, and it has multiple earth element of interconnection and the testing element independent of the plurality of earth element; Multiple chip be installed on upper surface of base plate; Cover the insulation shell of upper surface of base plate and chip; Run through insulation shell up and down respectively and connect multiple grading shield conductive poles of this test suite and grounding assembly, and covering the conformal screen of this insulation shell; Wherein at least one earth element is directly connected with this conformal screen.Arrange a metal baffler between the upper through hole of each testing element and this lower through-hole, the horizontal size of this metal baffler is more than or equal to the opening size of this conductive pole at this insulation shell upper surface.The shield effectiveness that the utility model makes simply, low cost, non-destructive mode detect integrated circuit package body becomes possibility, and then can improve product yield.
Description
Technical field
The utility model is about field of semiconductor package, particularly about substrate and the integrated circuit package body using this substrate.
Background technology
The electromagnetic shielding mode realizing integrated circuit package body at present has two kinds substantially: one uses conformal shielding (conformal shielding), and another kind is then use compartment shielding (compartment shielding).Wherein conformal shielding refers in encapsulation process with metal sputtering, spraying or other plated film modes insulation shell periphery formation screen at packaging body.This screen can with expose to substrate
grounding assemblycontact, screen can prevent the integrated circuit in packaging body from suffering outside electromagnetic interference by this.Compartment shielding is then by making inner ground connection and test suite expose at insulation shell internal cutting one through hole, again to filled conductive material in through hole, and then form screen with metal sputtering, spraying or other plated film modes in the insulation shell periphery of packaging body, so can prevent the radio frequency component in integrated circuit from mutually disturbing.
Form screen in modes such as metal sputtering, spraying or other plated film modes, substitute original iron covering and make integrated circuit package body volume ratio use iron covering little and shape is more flexible.But these barrier enclosure structures easily cut the grounding assembly loose contact in not good, shielding layer uneven thickness or shielding layer and substrate because of substrate and there is the not good enough problem of shield effectiveness.Therefore, for ensureing the quality of integrated circuit package body, need detect shield effectiveness.Such as use x-ray scanning or cutting of sampling, the x-ray scanning equipment that use so certainly will be needed expensive or destruction finished product, add production cost on the one hand, and another aspect also exists undetected possibility and is difficult to ensure the quality of detection.
Therefore, the shield effectiveness detection mode of the integrated circuit package body improved is needed.
Utility model content
One of the purpose of this utility model is provide the substrate of improvement and use the integrated circuit package body of this substrate.
Integrated circuit package body according to an embodiment of the present utility model comprises: a substrate, multiple chip, an insulation shell, multiple grading shield conductive pole, and a conformal screen.This substrate has multiple grounding assembly of interconnection and the multiple test suites independent of the plurality of grounding assembly.Multiple chip is installed on the upper surface of this substrate.Insulation shell covers the upper surface of this substrate and the plurality of chip.Multiple grading shield conductive pole runs through this insulation shell up and down respectively and connects this test suite and grounding assembly.Conformal screen covers this insulation shell.At least one wherein in the plurality of grounding assembly is directly connected with this conformal screen; In test suite, each comprises through hole and lower through-hole, on this between through hole to this lower through-hole to corresponding person a metal baffler should be arranged in grading shield conductive pole, the horizontal size of this metal baffler is more than or equal to the opening size of this corresponding segment screening conductive post at this insulation shell upper surface.
In one embodiment, the plurality of grounding assembly comprises multiple ground plate, and this metal baffler and the plurality of ground plate are positioned at the same layer of this substrate.This grading shield conductive pole material is electrically conductive composition or metal.
Of the present utility model another embodiment still provides substrate for said integrated circuit packaging body.
The shield effectiveness that substrate of the present utility model and integrated circuit package body make simply, low cost, non-destructive mode detect integrated circuit package body becomes possibility, and then can improve product yield.
Accompanying drawing explanation
Fig. 1 is the cross-sectional schematic of an integrated circuit package body
It is the integrated circuit package body according to the utility model one embodiment shown in Fig. 2
It is the top cross-sectional view of the integrated circuit package body according to the utility model one embodiment shown in Fig. 3
Embodiment
For better understanding spirit of the present utility model, below in conjunction with part preferred embodiment of the present utility model, it is described further.
The method of the shield effectiveness of simple detection integrated circuit package body is on substrate, arrange at least one independent measuring point, by measure this independent measuring point and another independent measuring point or and other grounding assembly measuring point between resistance value can judge whether shield processing procedure has problem.
Fig. 1 is the cross-sectional schematic of an integrated circuit package body 10.As shown in Figure 1, this integrated circuit package body 10 comprises: a substrate 12, multiple chip 14, insulation shell 16, conformal screen 18 and a grading shield conductive pole 11.This substrate 12 has multiple grounding assemblies 120 of interconnection and the multiple test suites 122 independent of the plurality of grounding assembly 120.The plurality of grounding assembly 120 comprises a series of grounding through hole 121 and multiple ground plate 123, and this test suite 122 is then be clipped in the independent through-hole between these grounding through hole 121.This independent through-hole comprises through-hole section 125 and lower through-hole portion 127, can be linked together between the two by trace 128 etc.Chip 14 is installed on the upper surface of this substrate 12.Insulation shell 16 covers upper surface and this chip 14 of this substrate 12.Screen 18 then covers this insulation shell 16 and this substrate 12, wherein at least one grounding through hole 121 being positioned at substrate 12 side is directly connected with this screen 18, it is middle that grading shield conductive pole 11 is positioned at the chip 14 needing electromagnetic protection, is connected with through-hole section 125 on the test suite 122 being positioned at substrate 12 upper strata and grounding through hole (not shown).This test suite 122 is connected with this screen 18 by the grading shield conductive pole 11 running through this insulation shell 16 up and down.
By measurement test suite 122, the resistance value namely between independent through-hole and another independent through-hole or grounding through hole 121 can the shielding processing procedure whether success of validation integrated circuit packaging body 10.But for the integrated circuit package body 10 of the type, formation conductive pole grading shield conductive pole 11 certainly will need first to use laser to cut through hole on insulation shell 16 can.As shown in Figure 1, because test suite 122 is independent through-hole, there is certain interval in the metal of itself and surrounding, such as, there is a fixed gap in the horizontal direction between the ground plate 123 going up through-hole section 125 and below.In addition also cover without any metal above test suite 122, once the ablation energy of laser is not controlled well, the dielectric material of substrate 12 inside just may be punched by laser, and then has influence on the characteristic of internal layer circuit.In FIG, the through hole punched may go directly the trace 130 below upper through-hole section 125.So, the grading shield conductive pole 11 of follow-up formation can be connected with this trace 130, thus causes this integrated circuit package body 10 to lose efficacy.
According to the substrate of the utility model embodiment and use the integrated circuit package body of this substrate then can well solve the problem.
It is the integrated circuit package body 20 according to the utility model one embodiment shown in Fig. 2.As shown in Figure 2, this integrated circuit package body 20 is conformal shielding constructions, it comprises: substrate 22, the multiple chips 24 be installed on the upper surface of this substrate 22, multiple grading shield conductive pole 21, cover the insulation shell 26 of this substrate 22 upper surface and chip 24, and covers the conformal screen 28 of this substrate 22 and this insulation shell 26.The plurality of chip 24 can be identical or different type.
Concrete, this substrate 22 has multiple grounding assemblies 220 of interconnection and the test suite 222 independent of the plurality of grounding assembly 220.The plurality of grounding assembly 220 comprises multiple grounding through hole 221 and multiple ground plate 223, and the plurality of grounding through hole 221 is connected with ground plate 223 respectively.At least one in the plurality of grounding assembly 220, is exposed to the sidewall of insulation shell 26 as at least one grounding through hole 221 and is directly connected with this conformal screen 28.This test suite 222 comprises through hole 225 and lower through-hole 227, arranges a metal baffler 229 between the two.For processing procedure is convenient, can form this metal baffler 229 while formation ground plate 223, namely this metal baffler 229 and at least one ground plate 223 are positioned at the same layer of this substrate 22.Although the trace 128 of accompanying drawing 1 and the metal baffler 229 in accompanying drawing 2 are difficult to embody its respective design feature in the view, right those skilled in the art should know the difference understanding trace 128 and the metal baffler 229 in the embodiment of the present invention.The upper through hole 225 of this test suite 222 can realize being electrically connected with this conformal screen 28 by the grading shield conductive pole 21 running through this insulation shell 26 up and down, and lower through-hole 227 is through to substrate 22 bottom surface and realizes being electrically connected with upper through hole 225 by metal baffler 229.This grading shield conductive pole 21 material can be electrically conductive composition or metal.The through hole (not shown) of filling in view of grading shield conductive pole 21 is roughly vertical, and the horizontal size of metal baffler 229 is more than or equal to this grading shield conductive pole 21 and can effectively avoids punching substrate 22 during laser drilling at the opening size of this insulation shell 26 upper surface.Conformal screen 28 can metal sputtering, spraying or other plated film mode coated insulation housing 26 are peripheral and formed.The bottom surface of substrate 22 is exposed to outside conformal screen 28, and its signal terminal (not shown) and this conformal screen 28 insulate.
It is the top cross-sectional view of the integrated circuit package body 20 according to the utility model one embodiment shown in Fig. 3.As shown in Figure 3, this integrated circuit package body 20 is provided with multiple grounding through hole 221 and multiple test suite 222, is rendered as multiple earth point 231 and multiple independent test point 232 respectively.Compare can know that whether shield processing procedure wrong by the resistance value measured between any earth point 231 and independent test point 232.If the resistance value measured respectively between each independent test point 232 and another independent test point or earth point 231 compares, find have obviously different based on the resistance value that wherein an independent test point 232 records from other independent test point 232, then the processing procedure near this independent test point 232 provable has problem.Without the need to using expensive perspective instrument, also need not worry to destroy product structure without the need to broken outer product structure.
Technology contents of the present utility model and technical characterstic disclose as above, but those of ordinary skill in the art still may do all replacement and the modification that do not deviate from the utility model spirit based on teaching of the present utility model and announcement.Therefore, protection range of the present utility model should be not limited to the content that embodiment discloses, and should comprise various do not deviate from replacement of the present utility model and modification, and is contained by present patent application claims.
Claims (4)
1. an integrated circuit package body, comprises:
One substrate, has multiple earth element of interconnection and the multiple testing elements independent of described multiple earth element;
Multiple chip, is installed on the upper surface of described substrate;
One insulation shell, covers the upper surface of described substrate and described multiple chip;
Multiple grading shield conductive pole, runs through described insulation shell up and down respectively and connects described testing element and earth element;
One conformal screen, covers described insulation shell, and at least one in wherein said multiple earth element is directly connected with described conformal screen;
It is characterized in that in described multiple testing element, each comprises through hole and lower through-hole, described upper through hole arranges a metal baffler to corresponding person in described grading shield conductive pole corresponding between described lower through-hole, and the horizontal size of described metal baffler is more than or equal to the opening size of this corresponding segment screening conductive post at described insulation shell upper surface.
2. integrated circuit package body as claimed in claim 1, it is characterized in that described multiple earth element comprises multiple ground plate, described metal baffler and described multiple ground plate are positioned at the same layer of described substrate.
3. integrated circuit package body as claimed in claim 1, is characterized in that described grading shield conductive pole material is electrically conductive composition or metal.
4. a substrate, for semiconductor packages; Described substrate comprises:
Multiple earth elements of interconnection, comprise multiple ground plate; And
Multiple testing element, independent of described multiple earth element;
It is characterized in that in described multiple testing element, each comprises through hole and lower through-hole, arrange a metal baffler between described upper through hole and described lower through-hole, described metal baffler and described multiple ground plate are positioned at the same layer of described substrate.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520363916.3U CN204680668U (en) | 2015-05-29 | 2015-05-29 | Substrate and use the integrated circuit package body of this substrate |
| TW105201102U TWM529271U (en) | 2015-05-29 | 2016-01-25 | Substrate and integrated circuit package using the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520363916.3U CN204680668U (en) | 2015-05-29 | 2015-05-29 | Substrate and use the integrated circuit package body of this substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204680668U true CN204680668U (en) | 2015-09-30 |
Family
ID=54180339
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520363916.3U Expired - Fee Related CN204680668U (en) | 2015-05-29 | 2015-05-29 | Substrate and use the integrated circuit package body of this substrate |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN204680668U (en) |
| TW (1) | TWM529271U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111326502A (en) * | 2018-12-13 | 2020-06-23 | 爱思开海力士有限公司 | Semiconductor package and method for obtaining contact resistance of semiconductor package |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI636540B (en) * | 2016-12-05 | 2018-09-21 | 矽品精密工業股份有限公司 | Semiconductor package and manufacturing method of semiconductor package |
-
2015
- 2015-05-29 CN CN201520363916.3U patent/CN204680668U/en not_active Expired - Fee Related
-
2016
- 2016-01-25 TW TW105201102U patent/TWM529271U/en not_active IP Right Cessation
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111326502A (en) * | 2018-12-13 | 2020-06-23 | 爱思开海力士有限公司 | Semiconductor package and method for obtaining contact resistance of semiconductor package |
| CN111326502B (en) * | 2018-12-13 | 2023-10-27 | 爱思开海力士有限公司 | Semiconductor package and method for obtaining contact resistance of semiconductor package |
Also Published As
| Publication number | Publication date |
|---|---|
| TWM529271U (en) | 2016-09-21 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: No. 188, Suhong West Road, Suzhou Industrial Park, Suzhou, Jiangsu Patentee after: Riyuexin semiconductor (Suzhou) Co.,Ltd. Patentee after: ASE Semiconductor Manufacturing Co.,Ltd. Address before: 215026 No.188 Suhong West Road, Suzhou Industrial Park, Suzhou City, Jiangsu Province Patentee before: SUZHOU ASEN SEMICONDUCTORS Co.,Ltd. Patentee before: ASE Semiconductor Manufacturing Co.,Ltd. |
|
| CP03 | Change of name, title or address | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150930 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |