CN204595840U - Multifunctional input/output interface IP kernel - Google Patents
Multifunctional input/output interface IP kernel Download PDFInfo
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- CN204595840U CN204595840U CN201420865696.XU CN201420865696U CN204595840U CN 204595840 U CN204595840 U CN 204595840U CN 201420865696 U CN201420865696 U CN 201420865696U CN 204595840 U CN204595840 U CN 204595840U
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Abstract
The utility model discloses a kind of Multifunctional input/output interface IP kernel, comprises interconnective configuration register and IO interface; Configuration register is input port or delivery outlet for configuring IO interface; IO interface is used under the configuration of configuration register, realizes the function of corresponding input port or delivery outlet.The utility model, by the configuration of register, can realize the function of general input/output port easily.
Description
Technical field
The utility model relates to a kind of Multifunctional input/output interface IP kernel.
Background technology
Along with the improvement of integrated circuit fabrication process and the development of application oriented system level chip, IC designer can be integrated into the functional module getting more and more, become increasingly complex on same chip.Along with the increase of chip functions module, when chip size can not increase too many, chip pin resource just becomes more nervous, and some chip will adopt the mode of pin multiplexing to reduce costs farthest to economize on resources.Thus design a kind of multi-functional IO interface IP kernel, just become and be of practical significance very much.
Utility model content
The utility model object is to provide a kind of Multifunctional input/output interface IP kernel.
Above-mentioned purpose is achieved through the following technical solutions:
A kind of Multifunctional input/output interface IP kernel, is characterized in that: comprise interconnective configuration register and IO interface; Wherein, described configuration register is input port or delivery outlet for configuring described IO interface; Described IO interface is used under the configuration of described configuration register, realizes the function of corresponding input port or delivery outlet.
As concrete technical scheme, described configuration register is also for generation of interruption effect; Correspondingly, described IO interface is also for realizing the function of interrupting.
As concrete technical scheme, described configuration register comprises interrupt mask register, interrupt mode register and interrupts direction register; Wherein, described interrupt mask register is used for making the interruption of described IO interface invalid; It is adopt level triggered interrupts or edge triggered interruption that described interrupt mode register is used for setting; Described interruption direction register, for arranging the direction of each input port or delivery outlet, realizes described input port or delivery outlet is single input port or delivery outlet or doubles as input/output port.
As concrete technical scheme, described IO interface comprises signal latch module and signal input selection module; Wherein, described signal latch module is used for external input signal to keep in; Described signal input selection module is used for treated external input signal being carried out selection and exports.
The beneficial effect of the Multifunctional input/output interface IP kernel that the utility model provides is: by the configuration of register, can realize the function of general input/output port easily.In addition, interrupt function can also be realized and each of IO interface is arranged accordingly.
Accompanying drawing explanation
The structured flowchart of the Multifunctional input/output interface IP kernel that Fig. 1 provides for the utility model embodiment.
The inner structure block diagram of the Multifunctional input/output interface IP kernel that Fig. 2 provides for the utility model embodiment.
Embodiment
As shown in Figure 1, the Multifunctional input/output interface IP kernel that the utility model embodiment provides comprises interconnective configuration register and IO interface.
As shown in Figure 2, configuration register is used for according to ppu signal configures IO interface is input port or delivery outlet or for generation of interruption.Configuration register comprises interrupt mask register, interrupt mode register and interrupts direction register.It is invalid that interrupt mask register is used for that IO interface is interrupted.It is adopt level triggered interrupts or edge triggered interruption that interrupt mode register is used for setting.Interrupting direction register for arranging the direction of each input port or delivery outlet, realizing input port or delivery outlet is single input port or delivery outlet or doubles as input/output port.
Continue with reference to figure 2, IO interface is used under the configuration of configuration register, realizes the function of corresponding input port or delivery outlet or interruption.IO interface comprises signal latch module and signal input selection module.Signal latch module is used for external input signal to keep in.Signal input selection module is used for treated external input signal being carried out selection and exports.
In the Multifunctional input/output interface IP kernel that the utility model embodiment provides, using the On-Chip peripheral of IO interface as APB bus in S698P4 processor.When processor will send data toward external devices, passed in IO interface by APB bus, then be transferred to external devices by IO interface.When external devices needs to processor transmission data, deliver to IO interface, IO interface passes through APB bus transfer again to processor.This IO interface also can be used as external interrupt mouth, produces look-at-me to processor.
The utility model is not limited to above-described embodiment, based on above-described embodiment, the simple replacement of not making creative work, the scope that the utility model discloses should be belonged to.
Claims (4)
1. a Multifunctional input/output interface IP kernel, is characterized in that: comprise interconnective configuration register and IO interface; Wherein,
Described configuration register is input port or delivery outlet for configuring described IO interface;
Described IO interface is used under the configuration of described configuration register, realizes the function of corresponding input port or delivery outlet.
2. Multifunctional input/output interface IP kernel as claimed in claim 1, is characterized in that: described configuration register is also for generation of interruption effect; Correspondingly, described IO interface is also for realizing the function of interrupting.
3. Multifunctional input/output interface IP kernel as claimed in claim 1 or 2, is characterized in that: described configuration register comprises interrupt mask register, interrupt mode register and interrupts direction register; Wherein,
It is invalid that described interrupt mask register is used for that described IO interface is interrupted;
It is adopt level triggered interrupts or edge triggered interruption that described interrupt mode register is used for setting;
Described interruption direction register, for arranging the direction of each input port or delivery outlet, realizes described input port or delivery outlet is single input port or delivery outlet or doubles as input/output port.
4. Multifunctional input/output interface IP kernel as claimed in claim 1 or 2, is characterized in that: described IO interface comprises signal latch module and signal input selection module; Wherein,
Described signal latch module is used for external input signal to keep in;
Described signal input selection module is used for treated external input signal being carried out selection and exports.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420865696.XU CN204595840U (en) | 2014-12-30 | 2014-12-30 | Multifunctional input/output interface IP kernel |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420865696.XU CN204595840U (en) | 2014-12-30 | 2014-12-30 | Multifunctional input/output interface IP kernel |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204595840U true CN204595840U (en) | 2015-08-26 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420865696.XU Active CN204595840U (en) | 2014-12-30 | 2014-12-30 | Multifunctional input/output interface IP kernel |
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| Country | Link |
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| CN (1) | CN204595840U (en) |
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- 2014-12-30 CN CN201420865696.XU patent/CN204595840U/en active Active
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| GR01 | Patent grant |