CN204559393U - A kind of Switching Power Supply control chip and inverse-excitation type AC-DC converter - Google Patents

Abstract

The utility model discloses a switching power supply control chip and a flyback AC-DC converter. The switching power supply control chip includes a sampling unit, a slope compensation unit, a PWM comparator unit, a line voltage compensation control module, and a line voltage compensation unit. , Cycle-by-cycle current limiting protection unit, OR gate, RS flip-flop, oscillator and drive unit. The switching power supply control chip provided by the utility model detects the conduction time of the external power MOS tube through the line voltage compensation control module. When the conduction time is greater than the first preset time, the next external power MOS tube is switched on. Time, control the line voltage compensation unit, so that the line voltage compensation unit does not perform line voltage compensation on the reference voltage within the second preset time; thus preventing the output overcurrent point and recovery point from increasing with the increase of the line voltage under low voltage . In each cycle, the conduction time of the external power MOS transistor is longer, which improves the output power.

Description

A switching power supply control chip and flyback AC-DC converter

technical field

The utility model relates to the technical field of switching power supplies, in particular to a switching power supply control chip and a flyback AC-DC converter.

Background technique

Figure 1 is a circuit diagram of a conventional flyback AC-DC converter. When the load output does not reach the over-current point, the shutdown signal of the OUT terminal of the control chip U1 is controlled by the feedback voltage (input from the FB terminal) and the primary current detection signal (input from the CS terminal). When the output load is very large and reaches the overcurrent point, the voltage of the FB terminal of the control chip U1 becomes very high. At this time, the shutdown signal output by the OUT terminal of the control chip U1 is determined by the peak value of the primary inductor current. Since the drive signal output by the OUT terminal of the control chip U1 has a certain turn-off delay Tdelay, under different input voltages Vin, the peak value of the primary inductor current will be superimposed with a △Ipk= after the drive signal is turned off, and Lp is the primary side inductance. In the voltage range of 85VAC-264VAC, in order to make the output overcurrent point/recovery point consistent, the line voltage compensation is made for the primary inductor current threshold. However, under specific applications (transformer parameters), when low voltage is input, large and small waves are likely to appear in the primary inductor current signal, see Figure 2. In Figure 2, large waves appear in the first cycle T, and small waves appear in the second cycle T. Moreover, the opening time of the small wave in the large and small waves is very short (the time corresponding to K1 in the second period T), because the opening time of the large wave is very long (the time corresponding to K1 in the first period T), which is basically close to or It is equal to the maximum on-time Ton_max of the switching tube Q. Under the action of the line voltage compensation, the CS threshold of the large wave is also relatively high. The CS threshold in Figure 2 is the threshold of the primary inductor current threshold after the line voltage compensation. Since the discharge time of the large wave is very short (the time corresponding to K2 in the first cycle T), the initial value of the primary inductor current signal of the wavelet is very high, basically when it is turned on, it will hit the CS threshold, and the switch tube Q will be turned off immediately. The overall effect is equivalent to turning on once in two cycles, and the turning-on time is only the maximum on-time Ton_max, thereby limiting the output power.

Thereby prior art still needs to improve and improve.

Utility model content

In view of the shortcomings of the prior art above, the purpose of this utility model is to provide a switching power supply control chip and a flyback AC-DC converter to prevent the output overcurrent point and recovery point from increasing with the increase of the line voltage under low voltage. Larger, increase the output power.

In order to achieve the above object, the utility model has taken the following technical solutions:

A switching power supply control chip, including an oscillator, an OR gate and an RS flip-flop, and also includes:

A sampling unit for sampling the primary inductor current and outputting a sampling signal CS1;

A slope compensation unit for superimposing a slope signal whose rising slope is greater than 1/2 of the falling slope of the primary inductor current on the sampling signal CS1;

A line voltage compensation unit for performing line voltage compensation on the reference voltage and outputting a threshold voltage of the sampling signal;

A PWM comparator unit for comparing the FB terminal of the switching power supply control chip with the signal output by the slope compensation unit, and outputting a PWM signal according to the comparison result;

A cycle-by-cycle current-limiting protection unit for cycle-by-cycle current-limiting protection for the peak value of the primary inductor current;

A drive unit for driving an external power MOS tube;

It is used to detect the conduction time of the external power MOS transistor. When the conduction time is greater than the first preset time, the control line voltage compensation unit is within the second preset time during the conduction time of the next external power MOS transistor. A line voltage compensation control module that does not perform line voltage compensation on the reference voltage and performs line voltage compensation on the reference voltage after a second preset time;

The input terminal of the sampling unit is the CS terminal of the switching power supply control chip, and the output terminal of the sampling unit is connected to the input terminal of the slope compensation unit and the first input terminal of the cycle-by-cycle current limiting protection unit; the line voltage compensation control module The input end of the line voltage compensation control module is connected to the output end of the drive unit, the output end of the line voltage compensation control module is connected to the line voltage compensation unit, the input end of the line voltage compensation unit inputs the reference voltage, and the output end of the line voltage compensation unit is connected to the The second input terminal of the cycle current limiting protection unit; the output terminal of the slope compensation unit is connected to the first input terminal of the PWM comparator unit, and the second input terminal of the PWM comparator unit is the FB terminal of the switching power supply control chip, The output end of the PWM comparator unit is connected to the first input end of the OR gate, the output end of the cycle-by-cycle current limiting protection unit is connected to the second input end of the OR gate, and the output end of the OR gate is connected to the RS flip-flop The R terminal, the oscillator is connected to the S terminal of the RS flip-flop, the Q terminal of the RS flip-flop is connected to the input terminal of the drive unit, and the output terminal of the drive unit is the OUT terminal of the switching power supply control chip, connected to an external Gate stage of power MOS tube.

The switching power supply control chip, wherein the line voltage compensation control module includes:

It is used to detect the conduction time of the external power MOS transistor, and when the conduction time is greater than the first preset time, the conduction time detection unit of the timing unit is turned on;

It is used to receive the conduction signal of the next external power MOS transistor after it is turned on, and control the switch unit so that the line voltage compensation unit does not perform line voltage compensation for the reference voltage and starts timing. When the conduction time of the external power MOS transistor exceeds the second A timing unit that controls the switch unit to make the line voltage compensation unit perform line voltage compensation on the reference voltage after a preset time;

A switching unit for controlling the line voltage compensation unit to perform line voltage compensation on the reference voltage.

In the switching power supply control chip, the timing unit includes a timer.

The switching power supply control chip, wherein the switch unit includes an analog switch, one end of the analog switch is connected to the input end of the line voltage compensation unit, and the other end of the analog switch is connected to the output end of the line voltage compensation unit, the The control end of the analog switch is connected with the output end of the timing unit.

The switching power supply control chip, wherein the PWM comparator unit includes a PWM comparator, the non-inverting input of the PWM comparator is connected to the output of the slope compensation unit, and the inverting input of the PWM comparator is The switching power supply controls the FB end of the chip, and the output end of the PWM comparator is connected to the first input end of the OR gate.

A flyback AC-DC converter includes the switching power supply control chip as described above.

The flyback AC-DC converter, wherein the flyback AC-DC converter further includes a first diode, a second diode, a first capacitor, a second capacitor, a transformer, a power MOS Tube, operational amplifier, optocoupler, first resistor, second resistor, third resistor and fourth resistor; the transformer includes a primary winding, an auxiliary winding and a secondary winding; one end of the primary winding is a flyback The voltage input end of the AC-DC converter receives an external input voltage, the other end of the primary winding is connected to the drain of the power MOS transistor, and the gate of the power MOS transistor is connected to the OUT end of the switching power supply control chip, The source of the power MOS tube is connected to the CS terminal of the switching power supply control chip, and grounded through the first resistor; the auxiliary winding is inductively connected to the primary winding, one end of the auxiliary winding is grounded, and the other end of the auxiliary winding Connect the anode of the first diode, the cathode of the first diode is connected to the Vcc terminal of the switching power supply control chip, and grounded through the first capacitor; the secondary winding is inductively connected to the primary winding, and the secondary One end of the winding is connected to the anode of the second diode, and the cathode of the second diode is connected to the first output end of the flyback AC-DC converter, one end of the second capacitor, one end of the second resistor and the first output end of the second diode. One end of the three resistors, the other end of the secondary winding is the second output end of the flyback AC-DC converter, connected to the other end of the second capacitor; the other end of the second resistor is connected to the first optocoupler chip One end, the other end of the third resistor is connected to the ref end of the operational amplifier, and is also connected to the anode of the operational amplifier through the fourth resistor, the cathode of the operational amplifier is connected to the second end of the optocoupler chip, and the optocoupler chip is connected to the second end of the optocoupler chip. The third terminal is grounded, the fourth terminal of the optocoupler chip is connected to the FB terminal of the switching power supply control chip, and the GND terminal of the switching power supply control chip is grounded.

In the flyback AC-DC converter, the power MOS transistor is an NMOS transistor.

Compared with the prior art, the switching power supply control chip provided by the utility model detects the conduction time of the external power MOS transistor through the line voltage compensation control module. When the conduction time is greater than the first preset time, the next During the conduction time of the external power MOS transistor, the line voltage compensation unit is controlled so that the line voltage compensation unit does not perform line voltage compensation on the reference voltage within the second preset time, thereby preventing the output overcurrent point and recovery point from being random at low voltage. The line voltage increases and increases, so that in each cycle, the conduction time of the external power MOS tube is longer, and the output power is improved.

Description of drawings

Fig. 1 is a circuit diagram of an existing flyback AC-DC converter.

FIG. 2 is a waveform diagram of a primary inductor current in an existing flyback AC-DC converter.

Fig. 3 is a structural block diagram of the switching power supply control chip provided by the utility model.

Fig. 4 is a circuit diagram of the flyback AC-DC converter provided by the utility model.

FIG. 5 is a waveform diagram of the sampling signal CS1 in the flyback AC-DC converter provided by the present invention.

Detailed ways

The utility model provides a switching power supply control chip and a flyback AC-DC converter. The conduction time of the external power MOS tube is detected by the line voltage compensation control module to judge whether to perform line voltage compensation on the primary side inductance current in the next cycle. , to prevent the output overcurrent point and recovery point from increasing with the increase of the line voltage under low voltage, and improve the output power.

In order to make the purpose, technical solution and effect of the utility model more clear and definite, the utility model will be further described in detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described here are only used to explain the utility model, and are not intended to limit the utility model.

Please refer to Figure 3, the switching power supply control chip provided by the utility model includes a sampling unit 10, a slope compensation unit 20, a PWM comparator unit 30, a line voltage compensation control module 40, a line voltage compensation unit 50, and a cycle-by-cycle current limiting protection unit 60 , OR gate U2 , RS flip-flop U3 , oscillator U4 and drive unit 70 . The oscillator U4 sends a turn-on signal to the external power MOS tube every cycle.

The sampling unit 10 samples the primary inductance current, and outputs the sampling signal to the slope compensation unit 20 and the cycle-by-cycle current limiting protection unit 60; the slope compensation unit 20 superimposes a rising slope greater than half of the primary inductance on the sampling signal The slope signal of the current falling slope is output to the PWM comparator unit 30; the PWM comparator unit 30 compares the signal output by the FB terminal of the switching power supply control chip and the slope compensation unit 20, and outputs the PWM signal to the first input of the OR gate U2 according to the comparison result Terminal 1"; the line voltage compensation control module 40 detects the conduction time of the external power MOS tube, and when the conduction time is greater than the first preset time T1, the line voltage is controlled during the conduction time of the next external power MOS tube The compensation unit 50 does not perform line voltage compensation on the reference voltage Vref within the second preset time T2, and performs line voltage compensation on the reference voltage Vref after the second preset time T2; the cycle-by-cycle current limiting protection unit 60 according to the line voltage compensation unit The sampling signal threshold voltage output by 50 is used for cycle-by-cycle current limiting protection on the sampling signal and output to the second input terminal 2” of the OR gate U2; the OR gate U2 is input according to the first input terminal 1” and the second input terminal 2”. signal, output the shutdown signal to the R terminal of the RS flip-flop U3, the oscillator U4 outputs the start signal to the S terminal of the RS flip-flop U3, and the Q terminal of the RS flip-flop U3 controls the conduction of the external power MOS tube through the drive unit 70 and shutdown.

In other words, the sampling unit 10 is configured to sample the primary inductor current and output a sampling signal CS1.

The slope compensation unit 20 is configured to superimpose on the sampling signal CS1 a slope signal whose rising slope is greater than half of the falling slope of the primary inductor current.

The line voltage compensation unit 50 is configured to perform line voltage compensation on the reference voltage Vref, and output a threshold voltage of the sampling signal. Specifically, the line voltage compensation unit 50 is used to superimpose a negative compensation voltage on the reference voltage Vref according to the conduction time of the external power MOS transistor, that is, reduce the reference voltage Vref, and convert the reduced reference voltage Vref output. The shorter the conduction time of the external power MOS tube, the greater the compensation; the longer the conduction time, the smaller the compensation.

The PWM comparator unit 30 is used to compare the FB terminal of the switching power supply control chip with the signal output by the slope compensation unit 20, and output a PWM signal according to the comparison result. Wherein, the PWM comparator unit 30 includes a PWM comparator, the non-inverting input terminal of the PWM comparator is connected to the output terminal of the slope compensation unit 20, and the inverting input terminal of the PWM comparator is the FB of the switching power supply control chip terminal, and the output terminal of the PWM comparator is connected to the first input terminal 1" of the OR gate U2.

The cycle-by-cycle current limiting protection unit 60 is used for performing cycle-by-cycle current limiting protection on the peak value of the primary inductor current. Specifically, when the voltage input at the first input terminal (sampling signal CS1) is higher than the voltage input at the second input terminal (sampling signal threshold voltage or reference voltage Vref), output a high level; input at the first input terminal When the voltage is lower than the voltage input by the second input terminal, a low level is output.

The driving unit 70 is used to drive an external power MOS transistor.

The line voltage compensation control module 40 is used to detect the conduction time of the external power MOS transistor, and when the conduction time is greater than the first preset time T1, control the line voltage compensation during the conduction time of the next external power MOS transistor The unit does not perform line voltage compensation on the reference voltage Vref within the second preset time T2, and performs line voltage compensation on the reference voltage Vref after the second preset time T2. Specifically, it is used to detect the conduction time of the external power MOS transistor within a cycle of turning on and off the external power MOS transistor. When the conduction time is greater than the first preset time T1, when the next cycle arrives, The control line voltage compensation unit 50 does not perform line voltage compensation on the reference voltage Vref within the second preset time T2, and then performs line voltage compensation on the reference voltage Vref after the second preset time T2.

The first preset time T1 is determined according to specific application parameters of the switching power supply control chip, but the first preset time T1 cannot exceed the maximum conduction time of the external power MOS transistor. The second preset time T2 is set to allow sufficient time for the inductor current to discharge, preventing the next switching cycle from occurring due to the relatively high inductor current and the relatively low sampling signal under the line voltage compensation signal, thereby causing the power MOS tube of this cycle to The opening time is too short. Therefore, the second preset time T2 is also determined according to specific application parameters of the switching power supply control chip.

The input terminal of the sampling unit 10 is the CS terminal of the switching power supply control chip, and the output terminal of the sampling unit 10 is connected to the input terminal of the slope compensation unit 20 and the first input terminal 1 of the cycle-by-cycle current limiting protection unit 60; The input end of the line voltage compensation control module 40 is connected to the output end of the drive unit 70, the output end of the line voltage compensation control module 40 is connected to the line voltage compensation unit 50, and the input end of the line voltage compensation unit 50 inputs a reference voltage, so The output terminal of the line voltage compensation unit 50 is connected to the second input terminal 2 of the cycle-by-cycle current limiting protection unit 60; the output terminal of the slope compensation unit 20 is connected to the first input terminal 1' of the PWM comparator unit, and the PWM comparator unit The second input terminal 2' of the unit 30 is the FB terminal of the switching power supply control chip, the output terminal of the PWM comparator unit 30 is connected to the first input terminal 1" of the OR gate U2, and the cycle-by-cycle current limiting protection unit 60 The output terminal of the OR gate U2 is connected to the second input terminal 2" of the OR gate U2, the output terminal of the OR gate U2 is connected to the R terminal of the RS flip-flop U3, the oscillator U4 is connected to the S terminal of the RS flip-flop U3, and the RS trigger The Q terminal of the device U3 is connected to the input terminal of the drive unit 70, and the output terminal of the drive unit 70 is the OUT terminal of the switching power supply control chip, which is connected to the gate stage of the external power MOS transistor. The CS terminal of the switching power supply control chip is usually connected to the source of an external power MOS transistor, and the FB terminal of the switching power supply control chip is usually connected to the feedback terminal of an external load, that is, the input of the FB terminal is a feedback signal.

Please also refer to FIG. 4 . In order to facilitate the explanation of the principle of the switching power supply control chip, the switching power supply control chip U5 of the present utility model is added to a commonly used flyback AC-DC converter circuit.

Through mathematical derivation, it can be proved that if a ramp signal with a rising slope greater than half of the falling slope of the primary inductor current is superimposed on the actually detected primary inductor current waveform, the disturbance effect of different duty ratios on the average primary inductor current can be removed , so that the controlled peak inductor current finally converges to the average inductor current. Therefore, the sampling unit 10 converts the primary inductor current (the input signal at the CS terminal) into a sampling signal CS1, and the sampling signal CS1 outputs a signal CS2 through the slope compensation unit 20, and CS2 is sent to the first input terminal 1' of the PWM comparator unit 30 , the PWM comparator unit 30 outputs a PWM signal. When the CS2 signal is higher than the feedback voltage input from the FB terminal, the PWM signal is at high level, otherwise the PWM signal is at low level. In order to protect the MOS tube of the external power tube, the current peak value of the primary inductor current is limited for cycle-by-cycle protection, so the sampling signal CS1 is sent to the first input terminal 1 of the cycle-by-cycle current limit protection unit 60 . In order to make the peak value of the primary inductor current have better consistency when the primary side input voltage VIN is different, the line voltage compensation is performed on the internal reference voltage Vref, that is, a sampling signal threshold voltage is generated by the line voltage compensation unit 50, Then the threshold voltage of the sampled signal is sent to the second input terminal 2 of the cycle-by-cycle current-limit protection unit 60 , and then the cycle-by-cycle current-limit protection unit 60 outputs a signal OCP. When the sampling signal CS1 is higher than the threshold voltage of the sampling signal, the OCP signal is high level, otherwise it is low level. Finally, the PWM signal and the OCP signal output a shutdown signal (high level) through the OR gate U2. The turn-on signal output by the oscillator U4 and the turn-off signal output by the OR gate U2 are respectively connected to the S terminal and the R terminal of the RS flip-flop U3, and the output terminal of the RS flip-flop U3, that is, the Q terminal is connected to the input terminal of the drive unit 70 ,.

Under normal circumstances, the loop control is to generate a turn-on signal by the oscillator U4, and the PWM comparator unit 30 outputs a turn-off signal through the OR gate U2. When the output voltage VO is low or the load is heavy, the input voltage of the FB terminal of the switching power supply control chip U5 is high, and the switching power supply control chip U5 correspondingly increases the duty cycle of the output signal, so that the energy transmitted in each cycle increases , so that the output voltage VO gradually rises to the set value. When the output voltage VO is high or the load is very light, the voltage of the FB terminal of the switching power supply control chip U5 drops, and the switching power supply control chip U5 correspondingly reduces the duty ratio of the output signal, so that the output voltage VO gradually decreases back to set value. When the output load current reaches the overcurrent point, the FB terminal is pulled very high. At this time, the shutdown signal is mainly controlled by the OCP signal output by the cycle-by-cycle current limiting protection unit 60. In this case, if the reference voltage Vref continues to be If the line voltage is compensated, the loop control will fail. In this case, the output load overcurrent point and recovery point may increase as the line voltage increases. Due to the existence of the cable voltage compensation control module 40, when the external power MOS transistor is turned on (open), the line voltage compensation control module detects the conduction time Ton of the external power MOS transistor in this period, and when Ton>the first preset time At T1, it is considered that the input voltage VIN is very low. In the next cycle, the line voltage compensation control module 40 controls the line voltage compensation unit 50 to not perform line voltage compensation on the reference voltage Vref. At this time, the reference voltage Vref is directly input to the cycle-by-cycle limit. In the second input terminal 2 of the current protection unit 60, for convenience, the signal input by the second input terminal 2 of the cycle-by-cycle current limiting protection unit 60 is defined as the CS threshold voltage (sampling signal threshold voltage or reference voltage Vref); when an external When the conduction time Ton of the power MOS transistor>the second preset time T2, the line voltage compensation control module 40 controls the line voltage compensation unit 50 to perform line voltage compensation on the reference voltage Vref, that is, the line voltage compensation unit 50 continues to output The threshold voltage of the sampled signal is given to the cycle-by-cycle current limiting protection unit 60 . This avoids that when the input voltage VIN is very low, the external power MOS transistor is turned on for too long Ton or is close to the maximum on-time Ton_max, when the external power MOS transistor is turned on again because the CS threshold voltage is too low, the driving signal is immediately turned off. Can not normally output energy to the load.

Fig. 5 is a waveform diagram of the sampling signal CS1 of the switching power supply control chip provided by the utility model. Since the sampling signal CS1 corresponds to the primary inductor current, Fig. 5 can reflect the variation of the primary inductor current in each switching cycle . In the first cycle, the external power MOS tube is turned on, the primary side is turned on, the voltage value of the sampling signal CS1 rises (K1 segment in the first cycle T), and the turn-on time of the external power MOS tube in the first cycle Ton1 is greater than the first preset time T1, when the voltage value of the sampling signal CS1 exceeds the CS threshold voltage, the external power MOS transistor is turned off, and the voltage value of the sampling signal CS1 drops (K2 segment in the first cycle T),

When the oscillator outputs a turn-on signal again, the external power MOS tube turns on. Entering the second cycle, since the reference voltage Vref is not compensated for the line voltage within the second preset time T2 of the second cycle, therefore, within the second preset time T2, the voltage value of the sampling signal CS1 does not exceed Reference voltage Vref, the external power MOS tube will not be turned off; therefore in the second cycle, the turn-on time Ton2 of the external power MOS tube is still longer, it can be seen that when the input voltage VIN of the primary side is very low, the utility model The switching power supply control chip provided can still control the switching circuit to continuously output energy to the load, which improves the efficiency.

Please refer to FIG. 3 , in the switching power supply control chip provided by the present invention, the line voltage compensation control module includes a conduction time detection unit 410 , a timing unit 420 and a switch unit 430 .

The conduction time detection unit 410 is used to detect the conduction time of the external power MOS transistor, and when the conduction time is greater than a first preset time, the timing unit 420 is turned on.

The timing unit 420 is used to receive the conduction signal of the next external power MOS tube after being turned on, and control the switch unit so that the line voltage compensation unit does not perform line voltage compensation on the reference voltage Vref and starts timing. After the conduction time of Vref exceeds the second preset time, the switch unit 430 is controlled to enable the line voltage compensation unit 50 to perform line voltage compensation on the reference voltage Vref. Specifically, after receiving the conduction signal of the external power MOS transistor, the timing unit 420 outputs an enable signal to close the switch unit 430 and start timing, and outputs another enable signal to enable The switch unit 430 is turned off. Preferably, the timing unit 420 includes a timer.

The switch unit 430 is used to control the line voltage compensation unit 50 to perform line voltage compensation on the reference voltage Vref. Specifically, the switch unit 430 is connected in parallel to the input terminal and the output terminal of the line voltage compensation unit 50, and the switch unit 430 short-circuits the line voltage compensation unit 50 so that the line voltage compensation unit 50 does not perform line voltage compensation for the reference voltage Vref . Preferably, the switch unit 430 includes an analog switch K, one end of the analog switch K is connected to the input end of the line voltage compensation unit 50, and the other end of the analog switch K is connected to the output end of the line voltage compensation unit 50, the The control end of the analog switch K is connected to the output end of the timing unit 420 . That is, the timing unit 420 only needs to output the enable signal to make the analog switch K close or open, and then control the line voltage compensation to the reference voltage, so that the threshold voltage of the sampling signal or the reference voltage Vref can be input to the cycle-by-cycle current limiting The second input terminal of the protection unit 60 .

The first input terminal a of the conduction time detection unit 410 is the input terminal of the line voltage compensation control module 40 and is connected to the output terminal of the drive unit 70, and the second input terminal b of the conduction time detection unit 410 inputs the second Preset time signal, the output end of the conduction time detection unit 410 is connected to the enabling end of the timing unit 420, the signal input end of the timing unit 420 is connected to the output end of the drive unit 70, and the output end of the timing unit 420 The switch unit 430 is connected.

When the drive signal PWM1 output by the drive unit 70 is high, the external power MOS transistor is turned on, and the conduction time detection unit 410 detects the conduction time Ton of the external power MOS transistor in this period, when Ton>the first preset time T1 (considered VIN is very low), the conduction time detection unit 410 outputs an enabling signal Tonp to the timing unit 420, and Tonp is active high. Next, when the next drive signal PWM2 output by the drive unit 70 is high, the timing unit 420 outputs an enable signal to close the switch K, that is, the CS threshold voltage does not pass through the line voltage compensation unit 50, and the sampling signal CS1 directly compares with the reference voltage Vref Compare. At the same time, the timing unit 420 starts timing. When the external power MOS transistor conduction time Ton>the second preset time T2, the timing unit 420 will output an enable signal to open the switch K, that is, the CS threshold voltage after the conduction time Ton>T2 It continues to be generated by the reference voltage Vref through the line voltage compensation unit 50 . In this way, when the input voltage VIN is very low, when the power MOS tube is turned on for too long or close to the maximum on-time, when the power MOS tube is turned on again, the driving signal is turned off immediately due to the low CS threshold, and the output cannot be normally output to the load. energy.

Please refer to Figure 4, the utility model also provides a flyback AC-DC converter, including the switching power supply control chip U5 as described in the previous embodiment, and also includes a first diode D1, a second diode D2 , a first capacitor C1, a second capacitor C2, a transformer 80, a power MOS transistor Q1, an operational amplifier Q2, an optocoupler U6, a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4.

The transformer 80 includes a primary winding Np, an auxiliary winding Na and a secondary winding Ns. One end of the primary winding Np is the voltage input end of the flyback AC-DC converter, receiving an external input voltage VIN, and the other end of the primary winding Np is connected to the drain of the power MOS transistor Q1. The gate of the power MOS transistor Q1 is connected to the OUT terminal of the switching power supply control chip U5, the source of the power MOS transistor Q1 is connected to the CS terminal of the switching power supply control chip U5, and grounded through the first resistor R1; the auxiliary winding Na and The primary winding Np is inductively connected, one end of the auxiliary winding Na is grounded, the other end of the auxiliary winding Na is connected to the anode of the first diode D1, and the cathode of the first diode D1 is connected to the switching power supply control chip U5 The Vcc terminal of the secondary winding Ns is also grounded through the first capacitor C1; the secondary winding Ns is inductively connected to the primary winding Np, and one end of the secondary winding Ns is connected to the anode of the second diode D2, and the second diode The negative pole of the tube D2 is the first output end of the flyback AC-DC converter, connected to one end of the second capacitor C2, one end of the second resistor R2 and one end of the third resistor R3, and the other end of the secondary winding Ns It is the second output end of the flyback AC-DC converter, connected to the other end of the second capacitor C2; the other end of the second resistor R2 is connected to the first end c of the optocoupler chip U6, and the third resistor R3 The other end of the operational amplifier Q2 is connected to the ref terminal of the operational amplifier Q2, and is also connected to the anode of the operational amplifier Q2 through the fourth resistor R4. The cathode of the operational amplifier Q2 is connected to the second terminal d of the optocoupler chip U6, and the first terminal d of the optocoupler chip U6 The three terminals e are grounded, the fourth terminal f of the optocoupler chip U6 is connected to the FB terminal of the switching power supply control chip U5, and the GND terminal of the switching power supply control chip U5 is grounded.

The model of the operational amplifier Q2 is TL431, which has three pins, namely the cathode, the anode and the ref terminal, wherein the anode of the operational amplifier Q2 is connected to the negative terminal of the output Vo, and the ref terminal is the positive input terminal of the operational amplifier , the inverting input of the operational amplifier is built-in, and there are no external pins and no leads. The power MOS transistor Q1 is an NMOS transistor. The load is connected between the first output terminal and the second output terminal of the flyback AC-DC converter, and the switching power supply control chip U5 adjusts the power MOS transistor Q1 according to the change of the load (that is, the output terminal voltage Vo). The duty cycle of conduction outputs a stable DC voltage to the load.

Since the working principle and features of the flyback AC-DC converter have been described in detail in the previous embodiment, they will not be repeated here.

It can be understood that those skilled in the art can make equivalent replacements or changes according to the technical solution of the utility model and its utility model concept, and all these changes or replacements should belong to the appended claims of the utility model protected range.

Claims (8)

1. a Switching Power Supply control chip, comprises oscillator or door and rest-set flip-flop, it is characterized in that, also comprise:

For sampling to former limit inductive current and exporting the sampling unit of sampled signal CS1;

The slope compensation unit of the ramp signal of 1/2nd former limit inductive current descending slopes is greater than for superposing a rate of rise on sampled signal CS1;

For carrying out line voltage compensation to reference voltage, export the line voltage compensation unit of sampled signal threshold voltage;

For the signal that FB end and the slope compensation unit of more described Switching Power Supply control chip export, according to the PWM comparator unit of comparative result output pwm signal;

For doing the Cycle by Cycle current-limiting protection unit of Cycle by Cycle current-limiting protection to former limit inductive current peak;

For driving the driver element of external power metal-oxide-semiconductor;

For detecting the ON time of external power metal-oxide-semiconductor, when described ON time is greater than the first Preset Time, in the ON time of next external power metal-oxide-semiconductor, control line voltage compensation unit does not carry out line voltage compensation to reference voltage, reference voltage is carried out to the line voltage compensation control module of line voltage compensation after the second Preset Time in the second Preset Time;

The input of described sampling unit is the CS end of Switching Power Supply control chip, and the output of described sampling unit connects the input of slope compensation unit and the first input end of Cycle by Cycle current-limiting protection unit, the input of described line voltage compensation control module connects the output of driver element, the output connecting line voltage compensation unit of described line voltage compensation control module, the input input reference voltage of described line voltage compensation unit, the output of described line voltage compensation unit connects the second input of Cycle by Cycle current-limiting protection unit, the output of described slope compensation unit connects the first input end of PWM comparator unit, second input of described PWM comparator unit is the FB end of Switching Power Supply control chip, the output connection of described PWM comparator unit or the first input end of door, the output connection of described Cycle by Cycle current-limiting protection unit or the second input of door, output that is described or door connects the R end of rest-set flip-flop, described oscillator connects the S end of rest-set flip-flop, the Q end of described rest-set flip-flop connects the input of driver element, the output of described driver element is the OUT end of described Switching Power Supply control chip, connect the grid level of external power metal-oxide-semiconductor.

2. Switching Power Supply control chip according to claim 1, is characterized in that, described line voltage compensation control module comprises:

For detecting the ON time of external power metal-oxide-semiconductor, when described ON time is greater than the first Preset Time, open the ON time detecting unit of timing unit;

For after unlatching, receive the Continuity signal of next external power metal-oxide-semiconductor, control switch unit makes line voltage compensation unit not carry out line voltage compensation to reference voltage and start timing, after the ON time of outside power MOS pipe is more than the second Preset Time, control switch unit makes line voltage compensation unit carry out the timing unit of line voltage compensation to reference voltage;

For control line voltage compensation unit, reference voltage is carried out to the switch element of line voltage compensation.

3. Switching Power Supply control chip according to claim 2, is characterized in that, described timing unit comprises timer.

4. Switching Power Supply control chip according to claim 3, it is characterized in that, described switch element comprises analog switch, the input of one end connecting line voltage compensation unit of described analog switch, the output of the other end connecting line voltage compensation unit of described analog switch, the control end of described analog switch is connected with the output of timing unit.

5. Switching Power Supply control chip according to claim 4, it is characterized in that, described PWM comparator unit comprises PWM comparator, the normal phase input end of described PWM comparator connects the output of slope compensation unit, the inverting input of described PWM comparator is the FB end of Switching Power Supply control chip, the output connection of described PWM comparator or the first input end of door.

6. an inverse-excitation type AC-DC converter, is characterized in that, comprise as arbitrary in claim 1-5 as described in Switching Power Supply control chip.

7. inverse-excitation type AC-DC converter according to claim 6, it is characterized in that, described inverse-excitation type AC-DC converter also comprises the first diode, the second diode, the first electric capacity, the second electric capacity, transformer, power MOS pipe, operational amplifier, optocoupler, the first resistance, the second resistance, the 3rd resistance and the 4th resistance; Described transformer comprises former limit winding, auxiliary winding and vice-side winding; One end of described former limit winding is the voltage input end of inverse-excitation type AC-DC converter, the input voltage of the outside input of reception, the other end of described former limit winding connects the drain electrode of power MOS pipe, the grid level of described power MOS pipe connects the OUT end of Switching Power Supply control chip, and the CS of the source electrode connecting valve power supply control chip of described power MOS pipe holds, also by the first grounding through resistance; Described auxiliary winding is responded to former limit winding and is connected, one end ground connection of described auxiliary winding, the other end of described auxiliary winding connects the positive pole of the first diode, and the Vcc of the negative pole connecting valve power supply control chip of described first diode holds, also by the first capacity earth; Described vice-side winding is responded to former limit winding and is connected, one end of described vice-side winding connects the positive pole of the second diode, the negative pole of described second diode be inverse-excitation type AC-DC converter the first output, connect one end of one end of the second electric capacity, one end of the second resistance and the 3rd resistance, the other end of described vice-side winding is the second output of inverse-excitation type AC-DC converter, the other end connecting the second electric capacity; Described in the first end of the other end connection opto-coupler chip of described second resistance, the ref of the other end concatenation operation amplifier of the 3rd resistance holds, also by the anode of the 4th resistance concatenation operation amplifier, the negative electrode of described operational amplifier connects the second end of opto-coupler chip, 3rd end ground connection of described opto-coupler chip, the FB end of the 4th end connecting valve power supply control chip of described opto-coupler chip, the GND of described Switching Power Supply control chip holds ground connection.

8. inverse-excitation type AC-DC converter according to claim 7, is characterized in that, described power MOS pipe is NMOS tube.