CN204517792U - A kind of system helping frequency source to lock onto Optimal Control electrical voltage point - Google Patents
A kind of system helping frequency source to lock onto Optimal Control electrical voltage point Download PDFInfo
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- CN204517792U CN204517792U CN201520315486.8U CN201520315486U CN204517792U CN 204517792 U CN204517792 U CN 204517792U CN 201520315486 U CN201520315486 U CN 201520315486U CN 204517792 U CN204517792 U CN 204517792U
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Abstract
The utility model discloses a kind of system helping frequency source to lock onto Optimal Control electrical voltage point, comprise digital self calibration module, optimal frequency section selection circuit, lock detecting circuit, R frequency divider, Fractional-N frequency device, phase frequency detector and voltage controlled oscillator; The output of R frequency divider inputs with the R_DIV of phase frequency detector, digital self calibration module and lock detecting circuit respectively and is connected, the output of voltage controlled oscillator is inputted with the N_DIV of phase frequency detector, digital self calibration module and lock detecting circuit respectively by Fractional-N frequency device and is connected, lock detecting circuit is connected with digital register by optimal frequency section selection circuit, the output of numeral self calibration module is connected with the input of voltage controlled oscillator by digital register, and the output of phase frequency detector is connected with the input of the control voltage of voltage controlled oscillator.The utility model makes frequency source circuit after locking, and the control voltage of voltage controlled oscillator is optimum in the control voltage of the voltage controlled oscillator that all frequency bands comprising target frequency are corresponding.
Description
Technical field
The utility model relates to frequency source technical field, particularly relates to a kind of system helping frequency source to lock onto Optimal Control electrical voltage point.
Background technology
Current frequency source adopts LC oscillator substantially, and the computing formula of its frequency is:
f＝1/(2*3.14*(L*C)0.5)
Can see that the product of output signal frequency and L (inductance) value and C (electric capacity) value is inversely proportional to from formula above; Inductance value and capacitance are fixed value in the design, in order to obtain a less KVCO (relevant with the phase noise of LC oscillator output signal); Capacitance is except the part of variable capacitance, be divided into the individual little electric capacity of n, and control the individual little electric capacity of this n by the mode such as binary system or thermometer code, the whole frequency range of voltage controlled oscillator work has been divided into the individual little frequency band of n+1 by this n small capacitances, and the frequency range of side frequency section to have in various degree overlapping, the following formula of frequency values of each frequency band:
f＝1/(2*3.14*(L*nC+Δc)0.5)
In formula: the number of n-small capacitances, the capacitance of C-small capacitances, the capacitance that Δ c-variable capacitance changes with the change of device both end voltage difference.
In order to ensure the integrality of frequency range, between frequency band and frequency band, meeting various degrees is overlapping, this can cause some Frequency point in different frequency scope to appear in multiple frequency band, as: in FIG, same Frequency point A1, A2, A3, but belong to three different frequency bands respectively, control voltage Vtune is different; But when frequency source locks onto A2, A3, phase noise is poor, and when temperature change slightly, frequency source loop there will be the phenomenon of losing lock.
The course of work of frequency source chip is mainly divided into two states: self calibration state and lock-out state; Wherein self calibration state is that frequency source is when open loop, the control voltage Vtune of fixing voltage controlled oscillator, by voltage controlled oscillator output signal frequency division, and signal later for the frequency division of this fractional frequency signal and R frequency divider is carried out frequency ratio comparatively, and according to the frequency band of the result adjustment voltage controlled oscillator compared, the signal frequency of final voltage controlled oscillator after frequency division is close to the later output signal frequency of R frequency divider frequency division; After self calibration completes, frequency source loop converts closed loop states to by open loop situations, in the ideal case, loop is finally stabilized to the frequency band that self calibration draws, but in nonideal situation, as: the phase place that the signal of digital calibration circuit exported to by Fractional-N frequency device and R frequency divider is inconsistent, easily causes the frequency band of final locking not to be optimum frequency band.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, a kind of system and method helping frequency source to lock onto Optimal Control electrical voltage point is provided, make frequency source circuit after locking, the control voltage of voltage controlled oscillator is optimum in the control voltage of the voltage controlled oscillator that all frequency bands comprising target frequency are corresponding.
The purpose of this utility model is achieved through the following technical solutions: a kind of system helping frequency source to lock onto Optimal Control electrical voltage point, it comprises frequency source circuit, digital self calibration module, optimal frequency section selection circuit, digital register and lock detecting circuit, and frequency source circuit comprises R frequency divider, Fractional-N frequency device, phase frequency detector and voltage controlled oscillator.
The input of described R frequency divider receives reference-input signal, the output of R frequency divider respectively with phase frequency detector, numeral self calibration module is connected with the R_DIV input of lock detecting circuit, the output of Fractional-N frequency device respectively with phase frequency detector, numeral self calibration module is connected with the N_DIV input of lock detecting circuit, the output of lock detecting circuit is connected with the input of optimal frequency section selection circuit, optimal frequency section circuit is connected with digital register and carries out exchanges data, the control word of numeral self calibration module exports and is connected with the input of digital register, the output of digital register is connected with the input of voltage controlled oscillator, the output of voltage controlled oscillator is connected with the input of Fractional-N frequency device, the output of phase frequency detector is connected with the input of the control voltage of voltage controlled oscillator.
Further, it also comprises switch module, and the enable input of switch module is connected with enable output of digital self calibration module.
Described switch module comprises K switch 1, and K switch 1 is between phase frequency detector and voltage controlled oscillator.
Described switch module comprises K switch 2 and K switch 3, and K switch 2 is between R frequency divider and lock detecting circuit, and K switch 3 is between Fractional-N frequency device and lock detecting circuit.
Further, it also comprises power supply DC and low pass filter LPF; Described switch module comprises K switch 4 and K switch 5, and power supply DC is connected with the control voltage input of voltage controlled oscillator by K switch 4, and low pass filter LPF is connected with the control voltage input of voltage controlled oscillator by K switch 5.
Described switch module comprises K switch 6, and K switch 6 is between lock detecting circuit and optimal frequency section selection circuit.
The control word output of described digital self calibration module exports control word, and the bit wide of this control word is determined by the capacitor array of voltage controlled oscillator.
The beneficial effects of the utility model are: the utility model solves frequency source circuit after completing self calibration, when converting closed loop states to by open loop situations, the frequency band that frequency source circuit finally locks is not the problem of optimum frequency band, by after frequency source circuit completes self calibration, find all frequency bands comprising target frequency, and optimal frequency section is found out from these frequency bands, then frequency source locking, make frequency source circuit after locking, the control voltage of voltage controlled oscillator is optimum in the control voltage of the voltage controlled oscillator that all frequency bands comprising target frequency are corresponding, namely the control voltage of voltage controlled oscillator is positioned at the position near centre of the control voltage scope of voltage controlled oscillator, now loop stability, can not easily because the change of temperature and losing lock.
Accompanying drawing explanation
Fig. 1 is frequency source system output frequency voltage controlled oscillator control voltage graph of relation;
Fig. 2 is a kind of structured flowchart helping frequency source to lock onto the system of Optimal Control electrical voltage point of the utility model;
Fig. 3 is the circuit structure diagram of voltage controlled oscillator in the utility model.
Embodiment
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail, but protection range of the present utility model is not limited to the following stated.
As shown in Figure 2, a kind of system helping frequency source to lock onto Optimal Control electrical voltage point, it comprises frequency source circuit, digital self calibration module, optimal frequency section selection circuit, digital register and lock detecting circuit, and frequency source circuit comprises R frequency divider, Fractional-N frequency device, phase frequency detector and voltage controlled oscillator.
The input of described R frequency divider receives reference-input signal, the output of R frequency divider inputs with the R_DIV of phase frequency detector, digital self calibration module and lock detecting circuit respectively and is connected, and the output of Fractional-N frequency device inputs with the N_DIV of phase frequency detector, digital self calibration module and lock detecting circuit respectively and is connected.
The output of described lock detecting circuit is connected with the input of optimal frequency section selection circuit, and optimal frequency section circuit is connected with digital register and carries out exchanges data.
The control word of described digital self calibration module exports and is connected with the input of digital register, and the enable output of digital self calibration module inputs with the enable of switch module and is connected, for control switch K1 ~ K switch 6 disconnection and close.The R_DIV input of numeral self calibration module receives the signal from R frequency divider, the N_DIV input of numeral self calibration module receives the signal from Fractional-N frequency device, the relatively frequency of two input signals, after having compared, export two signals, one is enable signal EN, for the disconnection of control switch K1 ~ K switch 6 with closed, one is control word, and control word is written into digital register, for controlling the output signal frequency of voltage controlled oscillator.Numeral self calibration module is by changing the control word controlling voltage controlled oscillator capacitor array, thus the size of capacitor array capacitance in control voltage controlled oscillator, the circuit structure of voltage controlled oscillator as shown in Figure 3, thus improves or reduces the frequency of voltage controlled oscillator output signal.Numeral self calibration module, digital register and voltage controlled oscillator form a feedback loop, and the bit wide of the control word that digital self calibration module exports is determined by the capacitor array of voltage controlled oscillator.
The output of described digital register is connected with the input of voltage controlled oscillator, and the output of voltage controlled oscillator is connected with the input of Fractional-N frequency device, and the output of phase frequency detector is connected with the control voltage input of voltage controlled oscillator.
Further, it also comprises switch module, and the enable input of switch module is connected with enable output of digital self calibration module.
Described switch module comprises K switch 1, and K switch 1 is between phase frequency detector and voltage controlled oscillator.
Described switch module comprises K switch 2 and K switch 3, and K switch 2 is between R frequency divider and lock detecting circuit, and K switch 3 is between Fractional-N frequency device and lock detecting circuit.
Further, it also comprises power supply DC and low pass filter LPF; Described switch module comprises K switch 4 and K switch 5, and power supply DC is connected with the control voltage input of voltage controlled oscillator by K switch 4, and low pass filter LPF is connected with the control voltage input of voltage controlled oscillator by K switch 5.
Described switch module comprises K switch 6, and K switch 6 is between lock detecting circuit and optimal frequency section selection circuit.
When described voltage controlled oscillator works in optimal frequency section, the control voltage of voltage controlled oscillator is positioned at the position near centre of the control voltage scope of voltage controlled oscillator, namely the control voltage of voltage controlled oscillator is positioned at the Optimal Control electrical voltage point of voltage controlled oscillator, now loop stability, can not easily because the change of temperature and losing lock, frequency source circuit finally locks.
Operation principle of the present utility model is: when frequency source circuit is in open loop situations, and digital calibration block produces the control word of voltage controlled oscillator capacitor array in one group of control frequency source circuit, and writes in digital register by control word; Optimal frequency section selection circuit, according to the control word described in step S1, at interval of certain hour, the direction added and the direction subtracted changes control word; Such as: if control word is a, then the direction subtracted is: a-1, a-2 ..., a-x+1, a-x; The direction added is: a+1, a+2 ... a+x-1, a+x; After each change control word, whether determination frequency source circuit enters lock-out state; If frequency source circuit enters lock-out state, then the control word of correspondence is stored into the register in optimal frequency section selection circuit by optimal frequency section selection circuit, continues to change control word in the direction in which; Such as when control word is a-2, frequency source circuit locks, then control word a-2 is stored into the register in optimal frequency section selection circuit by optimal frequency section selection circuit, then continues to change control word on the direction subtracted; If frequency source circuit does not enter lock-out state, then optimal frequency section selection circuit stops the control word changing capacitor array in the direction in which; Such as when control word is a+1, frequency source circuit non-locking, then optimal frequency section selection circuit stops at the control word direction that adds changing capacitor array; Find out the frequency band comprising target frequency, statistics comprises the quantity of the frequency band of target frequency; Optimal frequency section selection circuit selects optimal frequency section, and when voltage controlled oscillator works in optimal frequency section, the control voltage of voltage controlled oscillator is positioned at the Optimal Control electrical voltage point of voltage controlled oscillator, and frequency source circuit finally enters lock-out state.
The selection mode of described selection optimal frequency section is: if the quantity comprising the frequency band of target frequency in digital register is odd number, selects middle frequency band as optimal frequency section; If the quantity comprising the frequency band of target frequency in digital register is even number, select any one in middle two frequency bands as optimal frequency section.
Claims (7)
1. the system helping frequency source to lock onto Optimal Control electrical voltage point, it is characterized in that: it comprises frequency source circuit, digital self calibration module, optimal frequency section selection circuit, digital register and lock detecting circuit, and frequency source circuit comprises R frequency divider, Fractional-N frequency device, phase frequency detector and voltage controlled oscillator;
The input of described R frequency divider receives reference-input signal, the output of R frequency divider respectively with phase frequency detector, numeral self calibration module is connected with the R_DIV input of lock detecting circuit, the output of Fractional-N frequency device respectively with phase frequency detector, numeral self calibration module is connected with the N_DIV input of lock detecting circuit, the output of lock detecting circuit is connected with the input of optimal frequency section selection circuit, optimal frequency section circuit is connected with digital register and carries out exchanges data, the control word of numeral self calibration module exports and is connected with the input of digital register, the output of digital register is connected with the input of voltage controlled oscillator, the output of voltage controlled oscillator is connected with the input of Fractional-N frequency device, the output of phase frequency detector is connected with the input of the control voltage of voltage controlled oscillator.
2. a kind of system helping frequency source to lock onto Optimal Control electrical voltage point according to claim 1, is characterized in that: it also comprises switch module, and the enable input of switch module is connected with enable output of digital self calibration module.
3. a kind of system helping frequency source to lock onto Optimal Control electrical voltage point according to claim 2, it is characterized in that: described switch module comprises K switch 1, K switch 1 is between phase frequency detector and voltage controlled oscillator.
4. a kind of system helping frequency source to lock onto Optimal Control electrical voltage point according to claim 2, it is characterized in that: described switch module comprises K switch 2 and K switch 3, K switch 2 is between R frequency divider and lock detecting circuit, and K switch 3 is between Fractional-N frequency device and lock detecting circuit.
5. a kind of system helping frequency source to lock onto Optimal Control electrical voltage point according to claim 2, is characterized in that: it also comprises power supply DC and low pass filter LPF; Described switch module comprises K switch 4 and K switch 5, and power supply DC is connected with the control voltage input of voltage controlled oscillator by K switch 4, and low pass filter LPF is connected with the control voltage input of voltage controlled oscillator by K switch 5.
6. a kind of system helping frequency source to lock onto Optimal Control electrical voltage point according to claim 2, it is characterized in that: described switch module comprises K switch 6, K switch 6 is between lock detecting circuit and optimal frequency section selection circuit.
7. a kind of system helping frequency source to lock onto Optimal Control electrical voltage point according to claim 1, it is characterized in that: the control word output of described digital self calibration module exports control word, and the bit wide of this control word is determined by the capacitor array of voltage controlled oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520315486.8U CN204517792U (en) | 2015-05-15 | 2015-05-15 | A kind of system helping frequency source to lock onto Optimal Control electrical voltage point |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201520315486.8U CN204517792U (en) | 2015-05-15 | 2015-05-15 | A kind of system helping frequency source to lock onto Optimal Control electrical voltage point |
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| CN204517792U true CN204517792U (en) | 2015-07-29 |
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|---|---|---|---|
| CN201520315486.8U Expired - Fee Related CN204517792U (en) | 2015-05-15 | 2015-05-15 | A kind of system helping frequency source to lock onto Optimal Control electrical voltage point |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104811192A (en) * | 2015-05-15 | 2015-07-29 | 成都振芯科技股份有限公司 | System and method of assisting frequency source in locking optimum control voltage point |
| CN115268555A (en) * | 2022-07-27 | 2022-11-01 | 成都振芯科技股份有限公司 | Second-order temperature compensation band gap reference voltage circuit and differential circuit |
-
2015
- 2015-05-15 CN CN201520315486.8U patent/CN204517792U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104811192A (en) * | 2015-05-15 | 2015-07-29 | 成都振芯科技股份有限公司 | System and method of assisting frequency source in locking optimum control voltage point |
| CN115268555A (en) * | 2022-07-27 | 2022-11-01 | 成都振芯科技股份有限公司 | Second-order temperature compensation band gap reference voltage circuit and differential circuit |
| CN115268555B (en) * | 2022-07-27 | 2024-05-28 | 成都振芯科技股份有限公司 | Second-order temperature compensation band gap reference voltage circuit and differential circuit |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150729 Termination date: 20190515 |