CN204514992U - For testing the circuit of standby current - Google Patents

For testing the circuit of standby current Download PDF

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Publication number
CN204514992U
CN204514992U CN201420873418.9U CN201420873418U CN204514992U CN 204514992 U CN204514992 U CN 204514992U CN 201420873418 U CN201420873418 U CN 201420873418U CN 204514992 U CN204514992 U CN 204514992U
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CN
China
Prior art keywords
pin
circuit
resistance
connects
ground connection
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Expired - Fee Related
Application number
CN201420873418.9U
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Chinese (zh)
Inventor
陈瑞武
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Individual
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Individual
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Priority to CN201420873418.9U priority Critical patent/CN204514992U/en
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Publication of CN204514992U publication Critical patent/CN204514992U/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Abstract

The utility model discloses a kind of circuit for testing standby current, comprise circuit board, described circuit board is provided with integrated package U1 and integrated package U2, pin 24 is connected by resistance R6 with pin 26, resistance R2 and electric capacity C1 is parallel with between the pin 21 of integrated package U1 and pin 24, resistance R4 and electric capacity C3 is parallel with between the pin 26 of integrated package U2 and pin 29, pin 21 is connected with power supply by resistance R5, pin 22 is by R7 ground connection, pin 23 connects cathode voltage, pin 25 connects positive pole, pin 27 is by resistance R8 ground connection, pin 28 connects negative pole, pin 20 connects positive pole, pin 29 connects output circuit, the circuit that pin 23 connects negative pole is provided with electric capacity C5 ground connection, the circuit that pin 25 connects positive pole is provided with electric capacity C2 ground connection, the circuit that pin 28 connects negative pole is provided with electric capacity C6 ground connection, the circuit that pin 20 connects positive pole is provided with electric capacity C4 ground connection, the parallel circuit of resistance R4 and integrated package U2 is provided with resistance R3, resistance R3 is connected with test product, the utility model accurately can be tested mobile phone standby current.

Description

For testing the circuit of standby current
Technical field
The utility model relates to a kind of current test of mobile telephone, is specifically related to a kind of cell phone standby current testing circuit.
Background technology
In various portable digital product, adopt powered battery to be a kind of scheme generally adopted, this makes Overall Power Consumption become one of the most outstanding performance parameter of small electronic equipment.At the beginning of product design, the circuitry of microelectronic device all can carry out special optimization process for power consumption, with the requirement of the stand-by time and low-power consumption that meet finished product; And in process of producing product, manufacturer can carry out various test strictly for the power consumption performance of product, to ensure the quality of finished product.
The standby test of battery be by product work and standby time faint static current of lcd be converted into change in voltage in product feed circuit, electric current consumes less, and the stand-by time of battery is longer, otherwise then shorter.Existing cell phone standby current testing device is all customize for different battery sizes, one table apparatus can only test the battery of mobile phone standby current test of a type, if produce new cell-phone battery, just need again to make new proving installation, cost of manufacture is high.
Summary of the invention
The purpose of this utility model is the above-mentioned defect for prior art, provides a kind of application more wide model, can realize the standby current test circuit of the mobile phone of multiple project.
A kind of circuit for testing standby current is provided, comprise circuit board, described circuit board is provided with integrated package U1 and integrated package U2, pin 24 is connected by resistance R6 with pin 26, resistance R2 and electric capacity C1 is parallel with between the pin 21 of integrated package U1 and pin 24, resistance R4 and electric capacity C3 is parallel with between the pin 26 of integrated package U2 and pin 29, pin 21 is connected with power supply by resistance R5, pin 22 is by R7 ground connection, pin 23 connects cathode voltage, pin 25 connects positive pole, pin 27 is by resistance R8 ground connection, pin 28 connects negative pole, pin 20 connects positive pole, pin 29 connects output circuit, the circuit that pin 23 connects negative pole is provided with electric capacity C5 ground connection, the circuit that pin 25 connects positive pole is provided with electric capacity C2 ground connection, the circuit that pin 28 connects negative pole is provided with electric capacity C6 ground connection, the circuit that pin 20 connects positive pole is provided with electric capacity C4 ground connection, the parallel circuit of resistance R4 and integrated package U2 is provided with resistance R3, resistance R3 is connected with test product.
Above-mentioned for testing in the circuit of standby current, the model of described integrated package U1 and integrated package U2 is ADOP07DQ.
The utility model has the advantages that: the function of test conversion circuit mainly realizes A, B two the asking for of point voltage difference, utilize the feature of integrated transporting discharging high input impedance, low output impedance, reduce the impact of change-over circuit on sample circuit and test product as much as possible.A point voltage is delivered to the C point on the left of R6 by previous stage after phase inverter is reverse, rear stage realizes being added of B point and C point voltage, voltage sum outputs to port D after oppositely, realizes the pressure drop on R1 to deliver to D place: VA-VB=VD thus the voltage drop calculated on sample resistance R1.
Accompanying drawing explanation
Fig. 1 is the utility model test conversion circuit diagram.
Fig. 2 is test philosophy block diagram.
Embodiment
As Fig. 1, shown in Fig. 2, be provided with integrated package U1 and integrated package U2 on circuit boards, pin 24 is connected by resistance R6 with pin 26, resistance R2 and electric capacity C1 is parallel with between the pin 21 of integrated package U1 and pin 24, resistance R4 and electric capacity C3 is parallel with between the pin 26 of integrated package U2 and pin 29, pin 21 is connected with power supply by resistance R5, pin 22 is by R7 ground connection, pin 23 connects cathode voltage, pin 25 connects positive pole, pin 27 is by resistance R8 ground connection, pin 28 connects negative pole, pin 20 connects positive pole, pin 29 connects output circuit, the circuit that pin 23 connects negative pole is provided with electric capacity C5 ground connection, the circuit that pin 25 connects positive pole is provided with electric capacity C2 ground connection, the circuit that pin 28 connects negative pole is provided with electric capacity C6 ground connection, the circuit that pin 20 connects positive pole is provided with electric capacity C4 ground connection, the parallel circuit of resistance R4 and integrated package U2 is provided with resistance R3, resistance R3 is connected with test product.
The model of integrated package U1 and integrated package U2 is ADOP07DQ.
Change-over circuit principle: change-over circuit figure as depicted in figs. 1 and 2, the function of test conversion circuit mainly realizes A, B two the asking for of point voltage difference, utilize the feature of integrated transporting discharging high input impedance, low output impedance, reduce the impact of change-over circuit on sample circuit and test product as much as possible.A point voltage is delivered to the C point on the left of R6 by previous stage after phase inverter is reverse, rear stage realizes being added of B point and C point voltage, voltage sum outputs to port D after oppositely, realizes the pressure drop on R1 to deliver to D place: VA-VB=VD thus the voltage drop calculated on sample resistance R1.
Test philosophy: set the actual complete machine electric current of product as Ic, the current value that to be IL, Io be when not connecing test product on sample resistance R1 of the electric current on sample resistance R1, the electric current of intermediate loop when namely K disconnects.On the sample resistance R1 that D place collects by test procedure, magnitude of voltage Vx is converted into the complete machine electric current I c of test product.
If the magnitude of voltage at the R1 two ends that Vo is caused by Io when being the disconnection of Fig. 2 K switch, the namely initial value of Vx, that is: Io= .
If test product is linear load, after Fig. 2 K switch is closed, the electric current I c of product and the pass of R1 both end voltage Vx are: Ic=aVx+b.
If the pass of the electric current I L on R1 and R1 both end voltage Vx is: IL=a ' Vx+b '; Obvious a '= ;
After the K in Fig. 2 closes, have: IL=Ic+Io.
When K closes, after test circuit access test product, R1 both end voltage added value is the product of product complete machine electric current I c and R1 resistance.
Can be drawn by above formula: Ic=IL-Io= + b '- .
Contrast above formula can obtain: a=a '= b=b '- .

Claims (2)

1. one kind for testing the circuit of standby current, comprise circuit board, it is characterized in that, described circuit board is provided with integrated package U1 and integrated package U2, pin 24 is connected by resistance R6 with pin 26, resistance R2 and electric capacity C1 is parallel with between the pin 21 of integrated package U1 and pin 24, resistance R4 and electric capacity C3 is parallel with between the pin 26 of integrated package U2 and pin 29, pin 21 is connected with power supply by resistance R5, pin 22 is by R7 ground connection, pin 23 connects cathode voltage, pin 25 connects positive pole, pin 27 is by resistance R8 ground connection, pin 28 connects negative pole, pin 20 connects positive pole, pin 29 connects output circuit, the circuit that pin 23 connects negative pole is provided with electric capacity C5 ground connection, the circuit that pin 25 connects positive pole is provided with electric capacity C2 ground connection, the circuit that pin 28 connects negative pole is provided with electric capacity C6 ground connection, the circuit that pin 20 connects positive pole is provided with electric capacity C4 ground connection, the parallel circuit of resistance R4 and integrated package U2 is provided with resistance R3, resistance R3 is connected with test product.
2. the circuit for testing standby current according to claim 1, is characterized in that, the model of described integrated package U1 and integrated package U2 is ADOP07DQ.
CN201420873418.9U 2014-12-31 2014-12-31 For testing the circuit of standby current Expired - Fee Related CN204514992U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201420873418.9U CN204514992U (en) 2014-12-31 2014-12-31 For testing the circuit of standby current

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201420873418.9U CN204514992U (en) 2014-12-31 2014-12-31 For testing the circuit of standby current

Publications (1)

Publication Number Publication Date
CN204514992U true CN204514992U (en) 2015-07-29

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN201420873418.9U Expired - Fee Related CN204514992U (en) 2014-12-31 2014-12-31 For testing the circuit of standby current

Country Status (1)

Country Link
CN (1) CN204514992U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104777340A (en) * 2014-12-31 2015-07-15 陈瑞武 Circuit for testing standby current

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104777340A (en) * 2014-12-31 2015-07-15 陈瑞武 Circuit for testing standby current

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C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20150729

Termination date: 20151231

EXPY Termination of patent right or utility model