CN204462752U - A kind of signal acquiring processing system - Google Patents
A kind of signal acquiring processing system Download PDFInfo
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- CN204462752U CN204462752U CN201520169535.1U CN201520169535U CN204462752U CN 204462752 U CN204462752 U CN 204462752U CN 201520169535 U CN201520169535 U CN 201520169535U CN 204462752 U CN204462752 U CN 204462752U
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- 238000006243 chemical reaction Methods 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 4
- 238000005070 sampling Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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Abstract
The utility model discloses a kind of signal acquiring processing system, comprise signal acquisition module, PC104 bus and control module, signal acquisition module is by PC104 bus link control module, signal acquisition module comprises the signal conditioning circuit, multi-center selection switch, A/D converter and the FPGA module that are connected successively, signal conditioning circuit input end input simulating signal, control module comprises the keyboard interface and display interface that are connected with CPU.The utility model achieves user to the Real-time Collection of signal and process, and all controlling functions of signal acquisition module have been come by FPGA module, greatly reduce the number of devices of circuit board, reduce system cost simultaneously, improves the reliability of system.
Description
Technical field
The utility model relates to a kind of signal processing system, specifically a kind of signal acquiring processing system.
Background technology
Along with the development of infotech, Signal sampling and processing is used for every field, the particularly communications field, the acquisition process of signal is not had just to be far from being communication, existing a lot of signal acquiring processing system all uses large scale integrated circuit to realize, cost is higher on the one hand, and the treatment effeciency of stability, signal is all lower on the other hand.
Utility model content
The purpose of this utility model is to provide a kind of low cost, high efficiency signal acquiring processing system, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme:
A kind of signal acquiring processing system, comprise signal acquisition module, PC104 bus and control module, described signal acquisition module is by PC104 bus link control module, signal acquisition module comprises the signal conditioning circuit, multi-center selection switch, A/D converter and the FPGA module that are connected successively, signal conditioning circuit input end input simulating signal, described control module comprises the keyboard interface and display interface that are connected with CPU.
As further program of the utility model: described FPGA module adopts chip EP3C25F256C7N.
As further program of the utility model: in described signal acquisition module, employing chip 74LVH162245 changes level, adjustment electrical specification, completes by the conversion of Transistor-Transistor Logic level to LVTTL level, and strengthens driving force, power to FPGA module.
As further program of the utility model: described signal conditioning circuit adopts amplifier INA103 that input signal is carried out conditioning and is amplified to 0 ~ 10V.
As further program of the utility model: described A/D converter adopts the input of 2 ADG508A parallel control simulating signals, realize the Real-time Collection to 16 road signals.
As the utility model further scheme: described CPU adopts Intel atom N455 processor.
Compared with prior art, the beneficial effects of the utility model are: the utility model achieves user to the Real-time Collection of signal and process, all controlling functions of signal acquisition module have been come by FPGA module, greatly reduce the number of devices of circuit board, reduce system cost simultaneously, improve the reliability of system.
Accompanying drawing explanation
Fig. 1 is the circuit structure block diagram of signal acquiring processing system.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1, in the utility model embodiment, a kind of signal acquiring processing system, comprise signal acquisition module, PC104 bus and control module, signal acquisition module is by PC104 bus link control module, signal acquisition module comprises the signal conditioning circuit, multi-center selection switch, A/D converter and the FPGA module that are connected successively, and signal conditioning circuit input end input simulating signal, control module comprises the keyboard interface and display interface that are connected with CPU.
FPGA module adopts chip EP3C25F256C7N.
In signal acquisition module, employing chip 74LVH162245 changes level, and adjustment electrical specification, completes by the conversion of Transistor-Transistor Logic level to LVTTL level, and strengthen driving force, power to FPGA module.
Signal conditioning circuit adopts amplifier INA103 that input signal is carried out conditioning and is amplified to 0 ~ 10V.
A/D converter adopts the input of 2 ADG508A parallel control simulating signals, realizes the Real-time Collection to 16 road signals.
CPU adopts Intel atom N455 processor.
Principle of work of the present utility model is: when the utility model system carries out work, the CPU of control module sends order by PC104 bus to signal acquisition module, its running parameter is arranged, the mutual of order and data is completed by address and data bus between CPU and FPGA module, the simulating signal of multi-center selection Switch Controller outside input carries out channel selecting, after signal conditioning circuit carries out corresponding pre-service to simulating signal, by the collection of A/D converter settling signal under the logic control of FPGA module, the signal data of collection is transferred to CPU by PC104 bus by FPGA module in real time, final analysis and the process of data is completed by the application program operating in control module, signal acquiring processing system can adjust sampling rate neatly by FPGA module Logic control module, meet the sampling request of multi-signal different rates.
Claims (6)
1. a signal acquiring processing system, comprise signal acquisition module, PC104 bus and control module, it is characterized in that, described signal acquisition module is by PC104 bus link control module, signal acquisition module comprises the signal conditioning circuit, multi-center selection switch, A/D converter and the FPGA module that are connected successively, signal conditioning circuit input end input simulating signal, described control module comprises the keyboard interface and display interface that are connected with CPU.
2. signal acquiring processing system according to claim 1, is characterized in that, described FPGA module adopts chip EP3C25F256C7N.
3. signal acquiring processing system according to claim 1, is characterized in that, in described signal acquisition module, employing chip 74LVH162245 changes level, adjustment electrical specification, complete by the conversion of Transistor-Transistor Logic level to LVTTL level, and strengthen driving force, power to FPGA module.
4. signal acquiring processing system according to claim 1, is characterized in that, described signal conditioning circuit adopts amplifier INA103 that input signal is carried out conditioning and is amplified to 0 ~ 10V.
5. signal acquiring processing system according to claim 1, is characterized in that, described A/D converter adopts the input of 2 ADG508A parallel control simulating signals, realizes the Real-time Collection to 16 road signals.
6. signal acquiring processing system according to claim 1, is characterized in that, described CPU adopts Intel atom N455 processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520169535.1U CN204462752U (en) | 2015-03-22 | 2015-03-22 | A kind of signal acquiring processing system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520169535.1U CN204462752U (en) | 2015-03-22 | 2015-03-22 | A kind of signal acquiring processing system |
Publications (1)
| Publication Number | Publication Date |
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| CN204462752U true CN204462752U (en) | 2015-07-08 |
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| CN201520169535.1U Expired - Fee Related CN204462752U (en) | 2015-03-22 | 2015-03-22 | A kind of signal acquiring processing system |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105159206A (en) * | 2015-10-21 | 2015-12-16 | 珠海格力电器股份有限公司 | Analog quantity peripheral interface |
| CN106656231A (en) * | 2016-12-30 | 2017-05-10 | 黄河科技学院 | Communication signal processing system |
| CN113542043A (en) * | 2020-04-14 | 2021-10-22 | 中兴通讯股份有限公司 | Data sampling method, device, equipment and medium of network equipment |
-
2015
- 2015-03-22 CN CN201520169535.1U patent/CN204462752U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105159206A (en) * | 2015-10-21 | 2015-12-16 | 珠海格力电器股份有限公司 | Analog quantity peripheral interface |
| CN106656231A (en) * | 2016-12-30 | 2017-05-10 | 黄河科技学院 | Communication signal processing system |
| CN113542043A (en) * | 2020-04-14 | 2021-10-22 | 中兴通讯股份有限公司 | Data sampling method, device, equipment and medium of network equipment |
| CN113542043B (en) * | 2020-04-14 | 2024-06-07 | 中兴通讯股份有限公司 | Data sampling method, device, equipment and medium of network equipment |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150708 Termination date: 20160322 |