CN204425700U - Flat plate parallel circuit structure capable of improving electricity utilization efficiency - Google Patents
Flat plate parallel circuit structure capable of improving electricity utilization efficiency Download PDFInfo
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- CN204425700U CN204425700U CN201520132668.1U CN201520132668U CN204425700U CN 204425700 U CN204425700 U CN 204425700U CN 201520132668 U CN201520132668 U CN 201520132668U CN 204425700 U CN204425700 U CN 204425700U
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- 230000005611 electricity Effects 0.000 title abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 55
- 238000004020 luminiscence type Methods 0.000 claims description 48
- 238000009413 insulation Methods 0.000 claims description 30
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 230000015556 catabolic process Effects 0.000 description 2
- 238000006731 degradation reaction Methods 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000009355 double cropping Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
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- Circuit Arrangement For Electric Light Sources In General (AREA)
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Abstract
The utility model provides a flat plate parallel circuit structure capable of improving electricity utilization efficiency, which mainly comprises a first substrate, a first voltage-dividing layer and a second voltage-dividing layer, wherein the voltage-dividing layers are connected with a power supply through two power contacts, and more than one insulating area is formed on the first voltage-dividing layer, the insulating area is provided with more than one luminous unit, one end of the luminous unit is connected with the first voltage-dividing layer, and the other end of the luminous unit is electrically connected with the second voltage-dividing layer through a lead; when the power supply only outputs low voltage to the first voltage division layer, and the resistance value of any position on the first voltage division layer is the same, no matter the distance between the light-emitting unit and the power supply contact is far or near, the driving light-emitting unit and the light-emitting efficiency are not influenced, so that the purpose of improving the electricity utilization efficiency is achieved.
Description
Technical field
The utility model is about a kind of parallel circuit structure, espespecially a kind of dull and stereotyped parallel circuit structure improved with electrical efficiency.
Background technology
Circuit structure generally in illumination application is all lay circuit on single substrate, and line design is based on single cabling mode, due to single substrate just, negative power supply contact is all established at grade, therefore in the plane of same substrate, comply with the length of its cabling mode, short difference, relatively can produce different circuit line pressure, and the line resistance of the long transmission line far away apart from power supply, the line resistance of short-term road that can be nearer than distance power supply is larger, if when line resistance is larger, voltage source through after the circuit line pressure that can produce also increase and produce the result of voltage nature pressure drop (Voltage Drop), and cause the brightness step-down of the light emitting module (as LED) for throwing light on, the impacts such as electricity consumption performance degradation.
The drive circuit type being usually used at present throwing light on comprises parallel circuits, series circuit, hybrid circuit, please refer to shown in Fig. 3, above-mentioned parallel circuits is serially connected with between power supply, this parallel circuits is made up of multiple light emitting module parallel connection, and each light emitting module is connected in series with resistance R by a light-emitting diode (LED) 91 and forms loop; Then as shown in Figure 4, this series circuit is connected in series by multiple light-emitting diode 91 and forms for series circuit, hybrid circuit, and this hybrid circuit makes the mode of above-mentioned series circuit and mixing in parallel be interconnected this hybrid circuit to be also serially connected with between a power supply.As No. M420955th, TaiWan, China utility model patent " exchanges the LED circuit and light-emitting device that drive " (hereinafter referred to as front case), it comprises a LED full-bridge rectifier, one compensating module, one LED module and a luminous efficiency hoisting module, this LED full-bridge rectifier has at least four LED unit, these LED unit connect with the fabric arrangement of full-bridge type to provide two outputs, this compensating module has four building-out capacitors and is parallel to the two ends of above-mentioned each LED unit respectively, this LED module is electrically connected with two outputs of this LED full-bridge rectifier, this LED module comprises a LED strip be connected in series by multiple light-emitting diode, this luminous efficiency hoisting module comprises at least one electric capacity, to be parallel to the two ends of this LED module.
From above-mentioned prior art, the cabling of single substrate designs brightness step-down and electricity consumption performance degradation that its length can affect illumination, and each light emitting module of parallel circuits all needs series connection one resistance R to reach the object of current limliting, but its cost is higher, the higher easy generation problems of excessive heat of operating voltage used, and series circuit, hybrid circuit then needs the brightness of LED could be made identical by boosting, also comparatively power consumption, and ought wherein arbitrary LED 91 open circuit because of damage, then make other LED 91 of whole string all cannot act on, although front case is by compensating module and luminous efficiency hoisting module, reach and promote brightness improving power consumption and the risk reducing LED damage, but front case still must improve manufacturing cost sets up compensating module, luminous efficiency hoisting module, just can reach above-mentioned effect, economic benefit is not met for manufacturer, therefore be really necessary to propose better technical scheme for said circumstances.
Utility model content
Because above-mentioned the deficiencies in the prior art, the utility model main purpose is to provide a kind of dull and stereotyped parallel circuit structure improved with electrical efficiency, by changing the mode of traditional circuit design, design the circuit not affecting luminous efficiency on a different plane, and the electronic component of use can be reduced and reduce manufacturing cost, use electrical efficiency effectively to improve.
The technical way taked for reaching above-mentioned purpose makes above-mentioned raising comprise with the dull and stereotyped parallel circuit structure of electrical efficiency: a first substrate, there is one first dividing potential drop layer, one end of this first dividing potential drop layer has one first power supply contact, and is formed with more than one insulation layer on this first dividing potential drop layer; One second dividing potential drop layer, its one end has a second source contact; More than one luminescence unit, it has two relative ends and is arranged at this insulation layer, and wherein one end of this luminescence unit is electrically connected with this first dividing potential drop layer, and the other end of this luminescence unit is electrically connected with this second dividing potential drop layer.
By above-mentioned structure, this first substrate is provided with the first dividing potential drop layer, one end of this first dividing potential drop layer has this first power supply contact, and one end of this second dividing potential drop layer has this second source contact, and by first, second source contact is to be connected with a power supply, first dividing potential drop layer of this first substrate forms more than one insulation layer, these insulation layers can be arranged for more than one luminescence unit respectively, wherein one end of this luminescence unit is connected with this first dividing potential drop layer, the other end of this luminescence unit is electrically connected with this second dividing potential drop layer, the first dividing potential drop layer of a low voltage signal to this first substrate is exported by this power supply, make the resistance value on this first dividing potential drop layer all identical, therefore the distance no matter between this luminescence unit and the first power supply contact is far away or near, all can not affect the luminous efficiency that power supply drives luminescence unit and luminescence unit, to reach the object of raising electrical efficiency.
Accompanying drawing explanation
Fig. 1 is the circuit structure plane graph of the utility model one first preferred embodiment;
Fig. 2 is the circuit structure plane graph of the utility model one second preferred embodiment;
Fig. 3 is a drive circuit figure becoming known for throwing light on;
Fig. 4 is the drive circuit figure that another becomes known for throwing light on.
Reference numeral
10 first substrates
11 first dividing potential drop layer 111 first power supply contacts
12 insulation layer 121 conductive layers
20 second substrates
21 second dividing potential drop layer 211 second source contacts
30 luminescence units
40 power supplies
Embodiment
The first preferred embodiment of the dull and stereotyped parallel circuit structure with electrical efficiency can be improved about the utility model, please refer to shown in Fig. 1, comprising first substrate 10, second substrate 20, more than one luminescence unit 30 and a power supply 40; Wherein, this power supply 40 has a positive output end and a negative output terminal.
This first substrate 10 has a first surface, this first surface is laid with one first dividing potential drop layer 11, this the first dividing potential drop layer 11 has one first power supply contact 111 near the one end in outside, this second substrate 20 has a second surface, this second surface is laid with one second dividing potential drop layer 21, this the second dividing potential drop layer 21 has a second source contact 211 near the one end in outside, and this first, second dividing potential drop layer 11,21 to form with the positive and negative output of above-mentioned power supply 40 respectively by this first power supply contact 111, this second source contact 211 and is electrically connected; In the present embodiment, this first dividing potential drop layer 11 is respectively a metal coating with this second dividing potential drop layer 21.
Should be noted that, this the first dividing potential drop layer 11 of the present utility model and this second dividing potential drop layer 21 also can be located at the positive and negative two sides of a single substrate, namely meaning can realize with single plate double side (one side double cropping mode), in the present embodiment, set up this first dividing potential drop layer 11 separately respectively at first substrate 10, second substrate 20 be only citing with this second dividing potential drop layer 21, not only just can be embodied as restriction with two pieces of substrates.
First dividing potential drop layer 11 of this first substrate 10 is formed with more than one insulation layer 12, this insulation layer 12 is for arranging more than one luminescence unit 30, this luminescence unit 30 has in a relative anode and a negative terminal, wherein the anode of this luminescence unit 30 is electrically connected with this first dividing potential drop layer 11, and the negative terminal of this luminescence unit 30 is electrically connected with this second dividing potential drop layer 21.
Because the utility model to connect the positive output end of power supply 40 with the first power supply contact 111 of this first dividing potential drop layer 11, the negative output terminal of this power supply 40 is connected again with the second source contact 211 of this second dividing potential drop layer 21, and this luminescence unit 30 just, negative terminal respectively with this first dividing potential drop layer 11, this the second dividing potential drop layer 21 is electrically connected, make circuit loop just, negative the two poles of the earth respectively by this first, second substrate 10, 20 and lay respectively on different surfaces, and the resistance value of distribution is all identical on this first dividing potential drop layer 11, therefore the distance no matter between this luminescence unit 30 and first power supply contact 111 is far away or near, all can not affect power supply 40 drives luminescence unit 30 and luminous efficiency thereof to reach the object of raising electrical efficiency.
In the present embodiment, the negative terminal of this luminescence unit 30 to form with this second dividing potential drop layer 21 further by a wire and is electrically connected, the rectangular sheet of this first, second substrate 10,20, and be made up of two parallel first long limits and two parallel first minor faces respectively, and on this first dividing potential drop layer along the first long side direction sequentially, the multiple insulation layer 12 of gap-forming, multiple insulation layer 12 arranges for multiple luminescence unit 30, this insulation layer 12 is also rectangular, and is made up of two parallel second long limits and two parallel second minor faces.
The anode of this luminescence unit 30 is located on one second minor face of this insulation layer 12, and be electrically connected with the first dividing potential drop layer 11 of this first substrate 10, the negative terminal of this luminescence unit 30 is located near another the second minor face place in this insulation layer 12, and is electrically connected with the second dividing potential drop layer 21 of this second substrate 20 by this wire; In the present embodiment, a conductive layer 121 can be set up further in this insulation layer 12, this conductive layer is between the negative terminal and another second minor face of this insulation layer 12 of this luminescence unit 30, and respectively for negative terminal, the electrical connection of this wire of this luminescence unit 30, this conductive layer 121 is rounded and by this wire to strengthen the electrical efficiency of this luminescence unit 30 and the second dividing potential drop layer 21; In the present embodiment, this conductive layer 121 can be a metal coating, and this luminescence unit 30 refers to a LED unit, and this LED unit can be a single-chip LED, a twin-core LED or a multicore LED.
The second preferred embodiment of the dull and stereotyped parallel circuit structure with electrical efficiency can be improved about the utility model, please refer to shown in Fig. 2, this preferred embodiment is roughly the same with the primary structure of last preferred embodiment, only these substrates 10, the size of 20, the forming position quantity of this insulation layer 12 and arrangement mode, luminescence unit 30 quantity arranged is different, in the present embodiment, this is first years old, second substrate 10, two parallel first long limits of 20 extend towards two parallel first minor faces respectively, make this first, second substrate 10, the area expansion on the surface of 20, therefore more insulation layers 12 can be formed for arranging more multi-illuminating unit 30, above-mentioned multiple insulation layer 12 is further again to be distinguished sequentially along the first short side direction, the multiple insulation layer 12 of formation at interval, the insulation layer 12 of a burst of column M × N number of can be formed in this way, and correspondence arranges the luminescence unit 30 of a burst of column M × N number of.
In sum, the utility model is by first, second substrate 10, the first dividing potential drop layer 11 is set up on the surface of 20 separately, second dividing potential drop layer 21, and one end of this first dividing potential drop layer 11 has this first power supply contact 111, one end of second dividing potential drop layer 21 has this second source contact 211, and be connected with this power supply 40 respectively, this the first dividing potential drop layer 11 is formed more than one insulation layer 12 or be extended to the insulation layer 12 of array M × N number of, these insulation layers 12 can be arranged for more than one luminescence unit 30 respectively, this luminescence unit 30 just, negative terminal respectively with this first dividing potential drop layer 11, second dividing potential drop layer 21 is electrically connected, when power supply 40 export a low voltage signal (if single-chip LED is between 2.5 ~ 3.5Vf) drive this luminescence unit 30 time, this the first dividing potential drop layer 11 is the circuits formed with a plane, the resistance value on this first dividing potential drop layer 11 can be made all identical with a low line pressure, can not occur to produce the visibly different situation of voltage drop with general known single cabling, distance no matter between this luminescence unit 30 and first power supply contact 111 is far away or near, all can not affect power supply 40 and drive luminescence unit 30, and without the need to set up again any add-on module or electronic component can make each luminescence unit 30 to an almost identical voltage (Vf), one electric current (If) and same power consumption wattage (W) reach same luminous efficiency, the utility model can reach the object of raising electrical efficiency really by this.
Claims (15)
1. can improve the dull and stereotyped parallel circuit structure with electrical efficiency, it is characterized in that, described dull and stereotyped parallel circuit structure comprises:
One first substrate, has one first dividing potential drop layer, and one end of described first dividing potential drop layer has one first power supply contact, and is formed with more than one insulation layer on described first dividing potential drop layer;
One second dividing potential drop layer, one end of described second dividing potential drop layer has a second source contact;
More than one luminescence unit, described luminescence unit has two relative ends and is arranged at described insulation layer, and wherein one end of described luminescence unit is electrically connected with described first dividing potential drop layer, and the other end of described luminescence unit is electrically connected with described second dividing potential drop layer.
2. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 1, it is characterized in that, described luminescence unit has an anode and a negative terminal, the anode of wherein said luminescence unit is electrically connected with described first dividing potential drop layer, and the negative terminal of described luminescence unit is electrically connected with described second dividing potential drop layer.
3. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 2, is characterized in that, the negative terminal of described luminescence unit consists of with described second dividing potential drop layer a wire and is electrically connected.
4. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 3, it is characterized in that, set up a conductive layer further in described insulation layer, described conductive layer is positioned at the negative terminal of described luminescence unit, and respectively for the negative terminal of described luminescence unit, the electrical connection of described wire; Described conductive layer is a metal coating.
5. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 4, it is characterized in that, described dull and stereotyped parallel circuit structure comprises a power supply further, described power supply has a positive output end and a negative output terminal, and first, second dividing potential drop layer described is electrically connected with the positive and negative output of described power supply respectively by described first power supply contact, described second source contact.
6. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 5, it is characterized in that, described first substrate is made up of two long limits and two minor faces, and multiple insulation layer is formed along long side direction on described first dividing potential drop layer, multiple insulation layer is arranged for multiple luminescence unit.
7. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to any one of claim 1 to 6, it is characterized in that, two long limits of described first substrate extend towards two minor faces respectively, the area of described first substrate is expanded, described multiple insulation layer forms multiple insulation layer along short side direction, to form the insulation layer of a burst of column, and correspondence arranges the luminescence unit of a burst of column.
8. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 7, it is characterized in that, described luminescence unit is driven when power supply exports a low voltage signal, described first dividing potential drop layer is the circuit formed with a plane, makes the resistance value on described first dividing potential drop layer all identical with a low line pressure.
9. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 8, it is characterized in that, described first dividing potential drop layer and described second dividing potential drop layer are respectively a metal coating.
10. the dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 9, it is characterized in that, described luminescence unit refers to a LED unit, and described LED unit is a single-chip LED, a twin-core LED or a multicore LED.
The 11. dull and stereotyped parallel circuit structure improved with electrical efficiency according to any one of claim 1 to 6, it is characterized in that, described dull and stereotyped parallel circuit structure comprises a second substrate further, described second dividing potential drop layer is located on described second substrate, and described second substrate is made up of two long limits and two minor faces.
The 12. dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 7, it is characterized in that, described dull and stereotyped parallel circuit structure comprises a second substrate further, described second dividing potential drop layer is located on described second substrate, described second substrate is made up of two long limits and two minor faces, two long limits of described second substrate extend towards two minor faces respectively, and the area of described second substrate is expanded.
The 13. dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 8, it is characterized in that, described dull and stereotyped parallel circuit structure comprises a second substrate further, described second dividing potential drop layer is located on described second substrate, described second substrate is made up of two long limits and two minor faces, two long limits of described second substrate extend towards two minor faces respectively, and the area of described second substrate is expanded.
The 14. dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 9, it is characterized in that, described dull and stereotyped parallel circuit structure comprises a second substrate further, described second dividing potential drop layer is located on described second substrate, described second substrate is made up of two long limits and two minor faces, two long limits of described second substrate extend towards two minor faces respectively, and the area of described second substrate is expanded.
The 15. dull and stereotyped parallel circuit structure improved with electrical efficiency according to claim 10, it is characterized in that, described dull and stereotyped parallel circuit structure comprises a second substrate further, described second dividing potential drop layer is located on described second substrate, described second substrate is made up of two long limits and two minor faces, two long limits of described second substrate extend towards two minor faces respectively, and the area of described second substrate is expanded.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103221650 | 2014-12-05 | ||
| TW103221650U TWM501070U (en) | 2014-12-05 | 2014-12-05 | Parallel circuit structure for tablet capable of increasing power-consuming efficiency |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204425700U true CN204425700U (en) | 2015-06-24 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520132668.1U Expired - Fee Related CN204425700U (en) | 2014-12-05 | 2015-03-09 | Flat plate parallel circuit structure capable of improving electricity utilization efficiency |
Country Status (3)
| Country | Link |
|---|---|
| KR (1) | KR20160002065U (en) |
| CN (1) | CN204425700U (en) |
| TW (1) | TWM501070U (en) |
-
2014
- 2014-12-05 TW TW103221650U patent/TWM501070U/en not_active IP Right Cessation
-
2015
- 2015-03-09 CN CN201520132668.1U patent/CN204425700U/en not_active Expired - Fee Related
- 2015-03-25 KR KR2020150001870U patent/KR20160002065U/en not_active Application Discontinuation
Also Published As
| Publication number | Publication date |
|---|---|
| KR20160002065U (en) | 2016-06-15 |
| TWM501070U (en) | 2015-05-11 |
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150624 |
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| CF01 | Termination of patent right due to non-payment of annual fee |