CN203503653U - Light-emitting diode chip - Google Patents
Light-emitting diode chip Download PDFInfo
- Publication number
- CN203503653U CN203503653U CN201320613260.7U CN201320613260U CN203503653U CN 203503653 U CN203503653 U CN 203503653U CN 201320613260 U CN201320613260 U CN 201320613260U CN 203503653 U CN203503653 U CN 203503653U
- Authority
- CN
- China
- Prior art keywords
- chip
- sub
- semiconductor layer
- chips
- electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Landscapes
- Led Devices (AREA)
Abstract
The utility model discloses a light-emitting diode chip and belongs to the technical field of semiconductors. The chip comprises a substrate, a first semiconductor layer, a luminescent layer, a second semiconductor layer and a transparent conductive layer. The chip is provided with a groove, wherein the groove extends from the transparent conductive layer to the first semiconductor layer. An isolation groove used for segmenting the chip into a plurality of sub-chips is arranged in the groove, and the groove extends from the first semiconductor layer to the substrate. The chip is further provided with a first electrode, a second electrode and an electrical connection structure, wherein an insulating layer is laid in the isolation groove, the electrical connection structure is laid on the insulating layer, the first electrode is arranged on the transparent conductive layer, the second electrode is arranged on the first semiconductor layer of the groove, the plurality of sub-chips are arranged in a column, and adjacent two sub-chips are connected through the electrical connection structure. According to the scheme disclosed by the utility model, when the chip is subjected to great static electricity, the adjacent sub-chips transmit current generated when the sub-chips release the static electricity through the electrical connection structure, thereby preventing the chip from being broken through by the static electricity.
Description
Technical field
The utility model relates to technical field of semiconductors, particularly a kind of light-emitting diode chip for backlight unit.
Background technology
Light-emitting diode chip for backlight unit is a kind of solid-state semiconductor device that can be visible ray by electric energy conversion, is the light source of new generation of current optimum prospect, is widely used in daily life.Light-emitting diode chip for backlight unit comprises substrate, is grown in the epitaxial loayer on substrate and is located at the electrode on epitaxial loayer, and epitaxial loayer generally comprises the first semiconductor layer, luminescent layer, the second semiconductor layer and the transparency conducting layer stacking gradually on substrate.
Existing light-emitting diode chip for backlight unit, in order to improve luminosity, generally can increase the area of chip, improves Injection Current.But if its p, n electrode design are slightly uneven, the clustering effect that such light-emitting diode chip for backlight unit will generation current, thus reduce its luminous efficiency and reliability.In prior art, generally by etching on light-emitting diode chip for backlight unit, be used for chip to be divided into the isolation channel of the sub-chip of a plurality of mutual isolation, this isolation channel is etched to the substrate of chip; In isolation channel, be filled with megohmite insulant, to form insulating barrier; Above insulating barrier, be smoothly equipped with the connecting structure for electrical equipment that each sub-chip is coupled together, thereby electric current is evenly expanded, avoided the clustering effect of electric current.
In realizing process of the present utility model, designer finds that prior art at least exists following problem:
In prior art, chip is divided into the sub-chip of a plurality of mutual isolation, connected mode between adjacent sub-chip is divided into electrical connection and non-electrical connection, between the adjacent sub-chip of non-electrical connection by megohmite insulant and the air insulation of filling in isolation channel, because the breakdown electric field of air is lower, when chip is subjected to larger static, air between the adjacent sub-chip of non-electrical connection is easy to breakdown, cause sub-chip easily by damage by static electricity, greatly reduce the reliability of chip.
Utility model content
In order to solve the problem of prior art, the utility model embodiment provides a kind of light-emitting diode chip for backlight unit.Described technical scheme is as follows:
The utility model embodiment provides a kind of light-emitting diode chip for backlight unit, described chip comprises: substrate, and stack gradually the first semiconductor layer on described substrate, luminescent layer, the second semiconductor layer and transparency conducting layer, described chip is provided with groove, described groove extends to described the first semiconductor layer from described transparency conducting layer, in described groove, be provided with for described chip being divided into the isolation channel of a plurality of sub-chips, described isolation channel extends to described substrate from described the first semiconductor layer, on described chip, be also provided with the first electrode, the second electrode and connecting structure for electrical equipment, in described isolation channel, be equipped with insulating barrier, described connecting structure for electrical equipment is laid on described insulating barrier, described the first electrode is located on described transparency conducting layer, described the second electrode is located on described first semiconductor layer of described groove, described a plurality of sub-chip forms a line, and two adjacent described sub-chips connect by described connecting structure for electrical equipment.
Preferably, the width of described isolation channel is 10~60 μ m.
Further, the acute angle between the sidewall of described isolation channel and the end face of described substrate is 20 °~60 °.
Preferably, described in each, the luminous zone area of sub-chip is identical.
Preferably, described the first electrode and described the second distribution of electrodes are in the symmetric position of described chip.
Preferably, described insulating barrier is silicon dioxide insulating layer or silicon nitride dielectric layer.
Preferably, in two adjacent described sub-chips, the first semiconductor layer of a sub-chip is connected with the transparency conducting layer of another sub-chip by described connecting structure for electrical equipment.
Preferably, in two adjacent described sub-chips, described first semiconductor layer of two described sub-chips connects by described connecting structure for electrical equipment, and the transparency conducting layer of two described sub-chips connects by described connecting structure for electrical equipment.
The beneficial effect that the technical scheme that the utility model embodiment provides is brought is: by chip being divided into the sub-chip forming a line, adjacent sub-chip connects by connecting structure for electrical equipment, when chip is subjected to larger static, the electric current producing when adjacent sub-chip can discharge static by connecting structure for electrical equipment transmits in the past, thereby avoided adjacent sub-chip due to non-electrical connection by electrostatic breakdown, increase the antistatic effect of chip, improved the reliability of chip.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only embodiment more of the present utility model, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 is the vertical view of a kind of light-emitting diode chip for backlight unit of providing of the utility model embodiment;
Fig. 2 is the front view of a kind of light-emitting diode chip for backlight unit of providing of the utility model embodiment;
Fig. 3 is the structural representation of a kind of foursquare light-emitting diode chip for backlight unit of providing of the utility model embodiment;
Fig. 4 is the structural representation of a kind of rectangular light-emitting diode chip for backlight unit of providing of the utility model embodiment;
Fig. 5 is the structural representation of another rectangular light-emitting diode chip for backlight unit of providing of the utility model embodiment.
Embodiment
For making the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with accompanying drawing, the utility model execution mode is described in further detail.
Embodiment
The utility model embodiment provides a kind of light-emitting diode chip for backlight unit, as depicted in figs. 1 and 2, this chip comprises substrate 11, stack gradually the first semiconductor layer 12 on substrate 11, luminescent layer 13, the second semiconductor layer 14 and transparency conducting layer 15, chip is provided with groove 16, groove 16 extends to the first semiconductor layer 12 from transparency conducting layer 15, in groove 16, be provided with for chip being divided into the isolation channel 161 of a plurality of sub-chips 10, isolation channel 161 extends to substrate 11 from the first semiconductor layer 12, on chip, be also provided with the first electrode 17, the second electrode 18 and connecting structure for electrical equipment 19, in isolation channel 161, be equipped with insulating barrier 162, connecting structure for electrical equipment 19 is laid on insulating barrier 162, the first electrode 17 is located on transparency conducting layer 15, the second electrode 18 is located on the first semiconductor layer 12 of groove 16, a plurality of sub-chips 10 form a line, and two adjacent sub-chips 10 connect by connecting structure for electrical equipment 19.
Preferably, in the present embodiment, the width of isolation channel 161 is 10~60 μ m.Isolation channel 161 is too wide, and the epitaxial loayer utilance of chip is low; Isolation channel 161 width are narrower, the bad laying of connecting structure for electrical equipment 19, easily broken string.By the width of restriction isolation channel 161, on the basis of utilance of epitaxial loayer that guarantees chip, be also convenient to the laying of connecting structure for electrical equipment 19.
Further, the acute angle between the sidewall of isolation channel 161 and the end face of substrate is 20 °~60 °.By making to form smooth acute angle between the sidewall of isolation channel 161 and the end face of substrate 11, be 20 °~60 °, be conducive to the removal completely of the interior later stage transparency conducting layer 15 of isolation channel 161, prevented short circuit, improved the reliability of chip; Increase the area of sub-chip 10 sidewall bright dippings, thereby increased the light effect that of chip sides, improved extraction efficiency and the luminosity of the light of chip.
Preferably, the luminous zone area of every sub-chip 10 is identical.The luminous zone area of every sub-chip 10 is identical, has realized current density consistent, and the luminosity of sub-chip 10 is consistent with attenuation amplitude, has improved the reliability of chip.
Preferably, the first electrode 17 and the second electrode 18 are distributed in the symmetric position of chip.For example, the first electrode 17 and the second electrode 18 can be distributed on the diagonal angle of chip, also can be as shown in Figure 1, and 4 sub-chips 10 form a line, and the first electrode 17 is positioned at the centre of first sub-chip 10, and the second electrode 18 is positioned at last sub-chip 10 center.Particularly, the first electrode 17 is p electrode, and the second electrode 18 is n electrode.
Particularly, can be by realizing and lay insulating barrier 162 at the interior filling megohmite insulant of isolation channel 161.
Preferably, insulating barrier 162 is silicon dioxide insulating layer or silicon nitride dielectric layer.
As a kind of preferred implementation of the present utility model, in two adjacent sub-chips 10, the first semiconductor layer 12 of a sub-chip 10 is connected with the transparency conducting layer 15 of another sub-chip 10 by connecting structure for electrical equipment 19, and in this embodiment, each sub-chip 10 is connected.Because series connection can dividing potential drop, the chip that the sub-chip 10 of series connection forms has higher resistance to pressure, there is stronger antistatic effect, with the light-emitting diode that this chip is made, there is higher voltage, the power supply cost of lamps & lanterns factory be can reduce, encapsulation factory manpower, bonding wire, die bond, gold thread cost saved.Particularly, connecting structure for electrical equipment 19 can be realized by laying metal level, and in the present embodiment, one end of metal level is connected with the first semiconductor layer 12 of a sub-chip 10, and the other end of metal level is connected with the transparency conducting layer 15 of another sub-chip 10.Apparently, in the present embodiment, metal level can be single layer structure, also can comprise a plurality of sublayers, and one end of each sublayer is connected with the first semiconductor layer 12 of a sub-chip 10, and the other end of sublayer is connected with the transparency conducting layer 15 of another sub-chip 10.
As another kind of execution mode of the present utility model, in two adjacent sub-chips 10, the first semiconductor layer 12 of two sub-chips 10 connects by connecting structure for electrical equipment 19, the transparency conducting layer 15 of two sub-chips 10 connects by connecting structure for electrical equipment 19, in this embodiment, each sub-chip is in parallel.Particularly, connecting structure for electrical equipment 19 can be realized by laying metal level, in the present embodiment, between adjacent sub-chip 10, to lay two metal levels, the two ends of a metal level connect respectively the transparency conducting layer 15 of adjacent sub-chip 10, and the two ends of another metal level connect respectively the first semiconductor layer 12 of adjacent sub-chip 10.Apparently, in the present embodiment, metal level can be single layer structure, also can comprise a plurality of sublayers.When the two ends of metal level connect respectively the transparency conducting layer 15 of adjacent sub-chip 10, a plurality of sublayers that metal level comprises, the two ends of each sublayer connect respectively the transparency conducting layer 15 of adjacent sub-chip 10; When the two ends of metal level connect respectively the first semiconductor layer 12 of adjacent sub-chip 10, a plurality of sublayers that metal level comprises, the two ends of each sublayer connect respectively the first semiconductor layer 12 of adjacent sub-chip 10.
Apparently, the chip providing in the present embodiment can be made the chip of different length-width ratios, for example, as shown in Figure 3, in this figure, the length of chip: width=1:1, this chip is foursquare chip; Again as shown in Figure 4, in this figure, the length of chip: width=2.5:1, this chip is rectangular chip; Again as shown in Figure 5, in this figure, the length of chip: width=5:1, this chip is rectangular chip.
The light-emitting diode that the chip manufacturing that employing the utility model embodiment provides becomes has static damage protective function, at the product of being made by this light-emitting diode chip for backlight unit in production procedure, or the terminal of being made by light-emitting diode chip for backlight unit is in application life cycles, the static damage protective function of chip effectively reduces the probability that is subject to environment or circuit electrostatic damage due to light-emitting diode; The chip structure that the utility model embodiment provides is simple, can be easily integrated with existing technology and can not increase more manufacturing cost.
The beneficial effect that the technical scheme that the utility model embodiment provides is brought is: by chip being divided into the sub-chip forming a line, adjacent sub-chip connects by connecting structure for electrical equipment, when chip is subjected to larger static, the electric current producing when adjacent sub-chip can discharge static by connecting structure for electrical equipment transmits in the past, thereby avoided adjacent sub-chip due to non-electrical connection by electrostatic breakdown, increase the antistatic effect of chip, improved the reliability of chip.
The foregoing is only preferred embodiment of the present utility model, not in order to limit the utility model, all within spirit of the present utility model and principle, any modification of doing, be equal to replacement, improvement etc., within all should being included in protection range of the present utility model.
Claims (8)
1. a light-emitting diode chip for backlight unit, described chip comprises substrate, and stack gradually the first semiconductor layer on described substrate, luminescent layer, the second semiconductor layer and transparency conducting layer, described chip is provided with groove, described groove extends to described the first semiconductor layer from described transparency conducting layer, in described groove, be provided with for described chip being divided into the isolation channel of a plurality of sub-chips, described isolation channel extends to described substrate from described the first semiconductor layer, on described chip, be also provided with the first electrode, the second electrode and connecting structure for electrical equipment, in described isolation channel, be equipped with insulating barrier, described connecting structure for electrical equipment is laid on described insulating barrier, described the first electrode is located on described transparency conducting layer, described the second electrode is located on described first semiconductor layer of described groove, it is characterized in that, described a plurality of sub-chip forms a line, and two adjacent described sub-chips connect by described connecting structure for electrical equipment.
2. chip according to claim 1, is characterized in that, the width of described isolation channel is 10~60 μ m.
3. chip according to claim 2, is characterized in that, the acute angle between the sidewall of described isolation channel and the end face of described substrate is 20 °~60 °.
4. chip according to claim 1, is characterized in that, described in each, the luminous zone area of sub-chip is identical.
5. chip according to claim 1, is characterized in that, described the first electrode and described the second distribution of electrodes are in the symmetric position of described chip.
6. chip according to claim 1, is characterized in that, described insulating barrier is silicon dioxide insulating layer or silicon nitride dielectric layer.
7. according to the chip described in claim 1 to 6 any one, it is characterized in that, in two adjacent described sub-chips, the first semiconductor layer of a sub-chip is connected with the transparency conducting layer of another sub-chip by described connecting structure for electrical equipment.
8. according to the chip described in claim 1 to 6 any one, it is characterized in that, in two adjacent described sub-chips, described first semiconductor layer of two described sub-chips connects by described connecting structure for electrical equipment, and the transparency conducting layer of two described sub-chips connects by described connecting structure for electrical equipment.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201320613260.7U CN203503653U (en) | 2013-09-29 | 2013-09-29 | Light-emitting diode chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201320613260.7U CN203503653U (en) | 2013-09-29 | 2013-09-29 | Light-emitting diode chip |
Publications (1)
Publication Number | Publication Date |
---|---|
CN203503653U true CN203503653U (en) | 2014-03-26 |
Family
ID=50334607
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201320613260.7U Expired - Lifetime CN203503653U (en) | 2013-09-29 | 2013-09-29 | Light-emitting diode chip |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN203503653U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111725251A (en) * | 2020-07-04 | 2020-09-29 | 厦门友来微电子有限公司 | High-resolution full-color micro LED display |
-
2013
- 2013-09-29 CN CN201320613260.7U patent/CN203503653U/en not_active Expired - Lifetime
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111725251A (en) * | 2020-07-04 | 2020-09-29 | 厦门友来微电子有限公司 | High-resolution full-color micro LED display |
CN111725251B (en) * | 2020-07-04 | 2023-04-21 | 深圳市惠合显示有限公司 | High-resolution full-color micro LED display |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN204118107U (en) | A kind of light-emitting diode chip for backlight unit | |
US9859331B2 (en) | Preparation method for high-voltage LED device integrated with pattern array | |
CN204289528U (en) | A kind of high voltage LED chip with triangle echo area | |
CN101950784A (en) | Manufacturing process of alternating current light-emitting diodes | |
CN103618042A (en) | Semiconductor light-emitting diode chip | |
CN207719230U (en) | High voltage led chip | |
CN102522400B (en) | Anti-electrostatic-damage vertical light-emitting device and manufacturing method thereof | |
CN203503653U (en) | Light-emitting diode chip | |
CN204289445U (en) | A kind of high voltage LED chip | |
CN104103734A (en) | Light-emitting diode packaging structure | |
CN203521455U (en) | LED chip | |
CN203589085U (en) | Semiconductor LED chip | |
CN102916108B (en) | Package structure for LED | |
CN205828417U (en) | A kind of filament light-emitting diode chip for backlight unit | |
CN106206883A (en) | A kind of upside-down mounting high voltage LED chip | |
CN101276832A (en) | LED chip with micro space connected in series through zinc oxide transparent electrodes and manufacturing process thereof | |
CN210866229U (en) | Light-emitting diode | |
CN201689890U (en) | Tandem type light emitting diode having feedback function | |
CN103594591B (en) | There is the manufacture method of the inverted light-emitting diode (LED) of transparency electrode | |
CN103606609B (en) | A kind of manufacture method of light-emitting diodes pipe electrode | |
CN107516702A (en) | Hinder flip LED chips in a kind of anti-top | |
CN103594593B (en) | There is the manufacture method of the inverted light-emitting diode (LED) of alligatoring transparency electrode | |
CN110752278A (en) | Light emitting diode and manufacturing method thereof | |
CN202736964U (en) | High voltage light-emitting diode (LED) chip | |
CN201194234Y (en) | Electrode construction of vertical structure LED |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CX01 | Expiry of patent term |
Granted publication date: 20140326 |
|
CX01 | Expiry of patent term |