CN204389582U - A kind of power quality analyzer voltage acquisition and conditioning circuit - Google Patents
A kind of power quality analyzer voltage acquisition and conditioning circuit Download PDFInfo
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- CN204389582U CN204389582U CN201520113487.4U CN201520113487U CN204389582U CN 204389582 U CN204389582 U CN 204389582U CN 201520113487 U CN201520113487 U CN 201520113487U CN 204389582 U CN204389582 U CN 204389582U
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Abstract
The utility model discloses a kind of power quality analyzer voltage acquisition and conditioning circuit, comprise microprocessor and voltage data monitoring means, and the A/D change-over circuit connected with described microprocessor input, described voltage data monitoring means comprises the first voltage acquisition modulate circuit, second voltage acquisition modulate circuit, tertiary voltage acquisition and conditioning circuit and voltage lifting circuit, and Phase-locked Synchronous Circuit, described first voltage acquisition modulate circuit comprises the first voltage transformer (VT) and the first filtering circuit, described second voltage acquisition modulate circuit comprises the second voltage transformer (VT) and the second filtering circuit, described tertiary voltage acquisition and conditioning circuit comprises tertiary voltage mutual inductor and the 3rd filtering circuit, the utility model is novel in design, structure is simple, there are Real-time Collection electrical network three-phase voltage data and to the function of voltage signal filtering Phase-Locked Synchronous gathered, signal condition precision is high, stable and reliable for performance, practical.
Description
Technical field
The utility model belongs to Power Quality Detection technical field, is specifically related to a kind of power quality analyzer voltage acquisition and conditioning circuit.
Background technology
Along with the development of China's power industry, the life that people pursue day by day makes Power Electronic Technique large-scale application and development, a large amount of nonlinear loads is used, main equipment quantity is multiplied, distributed power source frequently uses, all can cause power network current, voltage waveform distorts, the phenomenons such as voltage fluctuation, flickering, three-phase imbalance are on the rise, and power fail takes place frequently.Therefore on-line monitoring is carried out to the electrical network quality of power supply, rapid, correct discovery fault, deal with problems and become a kind of demand of power supply enterprise.More existing high-end power quality monitoring device precision are high, operation is reliable, but it is wide in range all to there is Testing index, the feature such as expensive, and complicated operation, floor area carries inconvenience greatly, analyze poor real, data transmission inconvenience, gather energy data precision low, and phase-locked loop circuit to carry out frequency multiplication mutually for one phase-locked, control accuracy is low, in electric system, voltage dip, temporary liter and brief interruption usually produce harmonic wave and make voltage waveform distortion, become and affected the most important factor of the quality of power supply, therefore, nowadays a kind of structure is lacked simple, reasonable in design, install and lay convenient and use simple to operate, signal condition precision is high, can the power quality analyzer voltage acquisition and conditioning circuit of Real-time Collection three-phase voltage data and synchronised grids frequency, can fluctuate by real-time tracing mains frequency, effective detection voltage parameter, can real time reaction electrical network generation open-phase fault signal, solve the expensive of power quality analyzer existence, volume is heavy, complicated operation, voltage data processing accuracy is low, the problems such as phase shortage cannot be diagnosed.
Utility model content
Technical problem to be solved in the utility model is for above-mentioned deficiency of the prior art, a kind of power quality analyzer voltage acquisition and conditioning circuit is provided, it is rationally novel in design, structure is simple, there are Real-time Collection electrical network three-phase voltage data and to the function of voltage signal filtering Phase-Locked Synchronous gathered, signal condition precision is high, stable and reliable for performance, practical, be convenient to promote the use of.
For solving the problems of the technologies described above, the technical solution adopted in the utility model is: a kind of power quality analyzer voltage acquisition and conditioning circuit, it is characterized in that: comprise microprocessor and voltage data monitoring means, and the A/D change-over circuit connected with described microprocessor input; described voltage data monitoring means comprises and is respectively used to gather and nurses one's health the first voltage acquisition modulate circuit of civil power three-phase voltage data, second voltage acquisition modulate circuit, tertiary voltage acquisition and conditioning circuit and voltage lifting circuit, and the Phase-locked Synchronous Circuit to connect with described voltage lifting circuit output end, described first voltage acquisition modulate circuit comprises the first voltage transformer (VT) and connects with described first voltage transformer (VT) output terminal and the voltage signal of the first voltage transformer (VT) collection followed to the first filtering circuit of filtering, described second voltage acquisition modulate circuit comprises the second voltage transformer (VT) and connects with described second voltage transformer (VT) output terminal and the voltage signal of the second voltage transformer (VT) collection followed to the second filtering circuit of filtering, described tertiary voltage acquisition and conditioning circuit comprises tertiary voltage mutual inductor and connects with described tertiary voltage mutual inductor output terminal and the voltage signal of tertiary voltage mutual inductor collection followed to the 3rd filtering circuit of filtering, described first filtering circuit, the output terminal of the second filtering circuit and the 3rd filtering circuit all connects with the input end of voltage lifting circuit, the output terminal of described voltage lifting circuit and Phase-locked Synchronous Circuit all connects with the input end of A/D change-over circuit,
Described microprocessor is TMS320F28335 DSP microprocessor, described A/D change-over circuit is chip ADS8365, the Xiao Jite diode B22 that the amplifier U8 that described Phase-locked Synchronous Circuit comprises amplifier U7 that model is LF251, model is LF251, model are BAT54S, model are Xiao Jite diode B23, chip LM139, the chip CD4046 and chip 4040BCN of BAT54S, 3rd pin input point four tunnels of described amplifier U7, one end of one road connecting resistance R72, one end of another road connecting resistance R73,3rd tunnel is by resistance R75 ground connection, 4th tunnel connects the 3rd pin of Xiao Jite diode B22, the other end of resistance R72 is the first input end of Phase-locked Synchronous Circuit, and the other end of resistance R73 is the second input end of Phase-locked Synchronous Circuit, 2nd pin input point four tunnels of described amplifier U7, one end of one road connecting resistance R74, another road connects the 1st pin of Xiao Jite diode B22,3rd tunnel connects the 2nd pin of Xiao Jite diode B22,4th tunnel is connected with the 6th pin of amplifier U7 by resistance R76, and the other end of resistance R74 is the 3rd input end of Phase-locked Synchronous Circuit, 7th pin of described amplifier U7 connects with+15V power output end, 4th pin of described amplifier U7 connects with-15V power output end, 6th pin of described amplifier U7 is connected with the 2nd pin of amplifier U8 by the resistance R77 of series connection and resistance R78, the link of resistance R77 and resistance R78 is connected with the 6th pin of amplifier U8 by electric capacity C79, 3rd pin of described amplifier U8 connects with the 2nd pin of Xiao Jite diode B23, the 1st pin input point two-way of Xiao Jite diode B23, lead up to electric capacity C28 ground connection, another road connects with the 6th pin of amplifier U8, 3rd pin of Xiao Jite diode B23 connects with the 2nd pin of amplifier U8, 7th pin of described amplifier U8 connects with+15V power output end, 4th pin of described amplifier U8 connects with-15V power output end, 4th pin of described chip LM139 exports a point two-way, resistance R80 of leading up to connects with the 6th pin of amplifier U8, separately lead up to electric capacity C29 ground connection, the 5th pin input point two-way of described chip LM139, lead up to resistance R81 ground connection, resistance R82 of separately leading up to connects with the 2nd pin of chip LM139, 3rd pin of described chip LM139 connects with 5V power output end, the 12nd pin ground connection of described chip LM139, 14th pin of described chip CD4046 exports a point two-way, one tunnel connects with the 2nd pin of chip LM139, another road connects with a stiff end of swept resistance RW, another stiff end ground connection of swept resistance RW, the sliding end of swept resistance RW connects with the 12nd pin of chip CD4046, 11st pin of described chip CD4046 is by resistance R84 ground connection, 2nd pin of described chip CD4046 passes through resistance R83 and the electric capacity C30 ground connection of series connection, the link of resistance R83 and electric capacity C30 connects with the 9th pin of chip CD4046, 6th pin of described chip CD4046 is connected with the 7th pin of chip CD4046 by electric capacity C31, 4th pin of described chip CD4046 exports point four tunnels, wherein three tunnels respectively with the 56th pin of chip ADS8365, 57th pin and the 58th pin connect, 4th tunnel connects with the 10th pin of chip 4040BCN, 9th pin of described chip 4040BCN connects with the 3rd pin of chip 4040BCN, 11st pin of described chip 4040BCN and the 8th pin ground connection, 16th pin of described chip 4040BCN connects with 5V power output end.
Above-mentioned a kind of power quality analyzer voltage acquisition and conditioning circuit, it is characterized in that: the Xiao Jite diode B12 of the Xiao Jite diode B10 that described first filtering circuit comprises chip U1 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B16 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U1, one tunnel connects with the 3rd pin of Xiao Jite diode B10, another road connects with one end of resistance R32, and the other end of resistance R32 is the first voltage acquisition end Ua2, the 2nd pin input point two-way of described chip U1, a road connects with the 1st pin of chip U1, and another road connects with the 2nd pin of Xiao Jite diode B10, 1st pin of described chip U1 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B10, and the resistance R33 that connects and resistance R34 of separately leading up to connects with the 5th pin of chip U1, 5th pin of described chip U1 also connects with the 3rd pin of Xiao Jite diode B16,6th pin input point three tunnels of described chip U1, one tunnel connects with the 2nd pin of Xiao Jite diode B16, and another road connects with the 1st pin of Xiao Jite diode B16, and the 3rd tunnel is by R52 ground connection, 7th pin of described chip U1 exports point three tunnels, electric capacity C15 of leading up to connects with the link of resistance R33 and resistance R34, resistance R38 of separately leading up to connects with the 2nd pin of Xiao Jite diode B16, 3rd tunnel by series connection resistance R42 and resistance R41 connect with the 10th pin of chip U1, 10th pin of chip U1 also connects with the 3rd pin of Xiao Jite diode B12, 1st pin of Xiao Jite diode B12 and the 2nd pin all connect with the 9th pin of chip U1, 8th pin of described chip U1 passes through resistance R28 and the resistance R29 ground connection of series connection, 9th pin of chip U1 also connects with the link of resistance R28 and resistance R29,
The Xiao Jite diode B14 of the Xiao Jite diode B11 that described second filtering circuit comprises chip U2 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B17 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U2, one tunnel connects with the 3rd pin of Xiao Jite diode B11, another road connects with one end of resistance R37, and the other end of resistance R38 is the second voltage acquisition end Ub2, the 2nd pin input point two-way of described chip U2, a road connects with the 1st pin of chip U2, and another road connects with the 2nd pin of Xiao Jite diode B11, 1st pin of described chip U2 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B11, and the resistance R39 that connects and resistance R40 of separately leading up to connects with the 5th pin of chip U2, 5th pin of described chip U2 also connects with the 3rd pin of Xiao Jite diode B17,6th pin input point three tunnels of described chip U2, one tunnel connects with the 2nd pin of Xiao Jite diode B17, and another road connects with the 1st pin of Xiao Jite diode B17, and the 3rd tunnel is by R53 ground connection, 7th pin of described chip U2 exports point three tunnels, electric capacity C18 of leading up to connects with the link of resistance R39 and resistance R40, resistance R43 of separately leading up to connects with the 2nd pin of Xiao Jite diode B17, 3rd tunnel by series connection resistance R46 and resistance R45 connect with the 10th pin of chip U2, 10th pin of chip U2 also connects with the 3rd pin of Xiao Jite diode B14, 1st pin of Xiao Jite diode B14 and the 2nd pin all connect with the 9th pin of chip U2, 8th pin of described chip U2 passes through resistance R30 and the resistance R31 ground connection of series connection, 9th pin of chip U2 also connects with the link of resistance R30 and resistance R31,
The Xiao Jite diode B15 of the Xiao Jite diode B13 that described 3rd filtering circuit comprises chip U3 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B18 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U3, one tunnel connects with the 3rd pin of Xiao Jite diode B13, another road connects with one end of resistance R44, and the other end of resistance R44 is tertiary voltage collection terminal Uc2, the 2nd pin input point two-way of described chip U3, a road connects with the 1st pin of chip U3, and another road connects with the 2nd pin of Xiao Jite diode B13, 1st pin of described chip U3 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B13, and the resistance R47 that connects and resistance R48 of separately leading up to connects with the 5th pin of chip U3, 5th pin of described chip U3 also connects with the 3rd pin of Xiao Jite diode B18,6th pin input point three tunnels of described chip U3, one tunnel connects with the 2nd pin of Xiao Jite diode B18, and another road connects with the 1st pin of Xiao Jite diode B18, and the 3rd tunnel is by R55 ground connection, 7th pin of described chip U3 exports point three tunnels, electric capacity C23 of leading up to connects with the link of resistance R47 and resistance R48, resistance R49 of separately leading up to connects with the 2nd pin of Xiao Jite diode B18, 3rd tunnel by series connection resistance R51 and resistance R50 connect with the 10th pin of chip U3, 10th pin of chip U3 also connects with the 3rd pin of Xiao Jite diode B15, 1st pin of Xiao Jite diode B15 and the 2nd pin all connect with the 9th pin of chip U3, 8th pin of described chip U3 passes through resistance R35 and the resistance R36 ground connection of series connection, 9th pin of chip U3 also connects with the link of resistance R35 and resistance R36.
Above-mentioned a kind of power quality analyzer voltage acquisition and conditioning circuit, it is characterized in that: described voltage lifting circuit comprises chip LMV324I, model is the Xiao Jite diode B19 of BAT54S, the Xiao Jite diode B21 of model to be the Xiao Jite diode B20 of BAT54S and model be BAT54S, 3rd pin input point three tunnels of described chip LMV324I, resistance R54 of leading up to connects with 5V power output end, resistance R58 of separately leading up to connects with the 8th pin of chip U1, 3rd tunnel connects with the 3rd pin of Xiao Jite diode B19, 1st pin of Xiao Jite diode B19 and the 2nd pin all connect with the 2nd pin of chip LMV324I, 1st pin of described chip LMV324I exports a point two-way, one tunnel connects with the 2nd pin of chip LMV324I, another road connects with one end of resistance R56, the other end of resistance R56 exports point three tunnels, and a road connects with the first input end of Phase-locked Synchronous Circuit, and another road connects with the 63rd pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C25 ground connection, 4th pin of described chip LMV324I connects with 5V power output end, the 11st pin ground connection of described chip LMV324I, 5th pin input point three tunnels of described chip LMV324I, resistance R57 of leading up to connects with 5V power output end, resistance R60 of separately leading up to connects with the 8th pin of chip U2,3rd tunnel connects with the 3rd pin of Xiao Jite diode B20,1st pin of Xiao Jite diode B20 and the 2nd pin all connect with the 6th pin of chip LMV324I, 7th pin of described chip LMV324I exports a point two-way, one tunnel connects with the 6th pin of chip LMV324I, and another road connects with one end of resistance R59, the other end of resistance R59 exports point three tunnels, and a road connects with the second input end of Phase-locked Synchronous Circuit, and another road connects with the 2nd pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C26 ground connection, 10th pin input point three tunnels of described chip LMV324I, resistance R61 of leading up to connects with 5V power output end, resistance R63 of separately leading up to connects with the 8th pin of chip U3,3rd tunnel connects with the 3rd pin of Xiao Jite diode B21,1st pin of Xiao Jite diode B21 and the 2nd pin all connect with the 8th pin of chip LMV324I, 8th pin of described chip LMV324I exports a point two-way, one tunnel connects with the 9th pin of chip LMV324I, and another road connects with one end of resistance R62, the other end of resistance R62 exports point three tunnels, and a road connects with the 3rd input end of Phase-locked Synchronous Circuit, and another road connects with the 6th pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C27 ground connection.
The utility model compared with prior art has the following advantages:
1, the utility model carries out collection filtering by arranging the first voltage acquisition modulate circuit to civil power A phase voltage, employing model is take the anti-aliasing filter of two-stage cascade to nurse one's health after the broadband operational amplifier of LF247 is followed the A phase voltage signal gathered, second voltage acquisition modulate circuit is set collection filtering is carried out to civil power B phase voltage, employing model is take the anti-aliasing filter of two-stage cascade to nurse one's health after the broadband operational amplifier of LF247 is followed the B phase voltage signal gathered, tertiary voltage acquisition and conditioning circuit is set collection filtering is carried out to civil power C phase voltage, employing model is take the anti-aliasing filter of two-stage cascade to nurse one's health after the broadband operational amplifier of LF247 is followed the C phase voltage signal gathered, voltage signal acquisition conditioning precision is high, accuracy is high, circuit is simple.
2, the utility model is malleation value by the equal lifting of negative pressure value arranging voltage lifting circuit and the first voltage acquisition modulate circuit, the second voltage acquisition modulate circuit and tertiary voltage acquisition and conditioning circuit are exported, and be transported to microprocessor, stability is high.
3, the utility model is by arranging the fluctuation of Phase-locked Synchronous Circuit real-time tracing mains frequency, the signal that voltage lifting circuit exports not only sends into A/D change-over circuit, send in Phase-locked Synchronous Circuit simultaneously, three-phase voltage exports square-wave signal through computing circuit, low pass filtered after involving Zero-cross comparator process, square-wave signal is phase-locked and fractional frequency signal feedback through frequency multiplication, can accurate detection system frequency, detection of grid whether open-phase fault can occur again, strong interference immunity, result of use is good.
4, the utility model is rationally novel in design, and performance temperature is reliable, and volume is little, simple to operate, practical, is convenient to promote the use of.
In sum, the utility model is novel in design rationally, and structure is simple, and have Real-time Collection electrical network three-phase voltage data and function to the voltage signal filtering Phase-Locked Synchronous gathered, signal condition precision is high, stable and reliable for performance, practical, is convenient to promote the use of.
Below by drawings and Examples, the technical solution of the utility model is described in further detail.
Accompanying drawing explanation
Fig. 1 is schematic block circuit diagram of the present utility model.
Fig. 2 is the circuit theory diagrams of the utility model microprocessor.
Fig. 3 is the circuit theory diagrams of the utility model A/D change-over circuit.
Fig. 4 is the circuit theory diagrams of the utility model Phase-locked Synchronous Circuit.
Fig. 5 is the circuit theory diagrams of the utility model first filtering circuit.
Fig. 6 is the circuit theory diagrams of the utility model second filtering circuit.
Fig. 7 is the circuit theory diagrams of the utility model the 3rd filtering circuit.
Fig. 8 is the circuit theory diagrams of the utility model voltage lifting circuit.
Description of reference numerals:
1-the first voltage transformer (VT); 2-the second voltage transformer (VT); 3-tertiary voltage mutual inductor;
4-the first filtering circuit; 5-the second filtering circuit; 6-the three filtering circuit;
7-voltage lifting circuit; 8-Phase-locked Synchronous Circuit; 9-A/D change-over circuit;
10-microprocessor.
Embodiment
As shown in Figure 1, Figure 2, Figure 3 and Figure 4, the utility model comprises microprocessor 10 and voltage data monitoring means, and the A/D change-over circuit 9 connected with described microprocessor 10 input end; described voltage data monitoring means comprises and is respectively used to gather and nurses one's health the first voltage acquisition modulate circuit of civil power three-phase voltage data, second voltage acquisition modulate circuit, tertiary voltage acquisition and conditioning circuit and voltage lifting circuit 7, and the Phase-locked Synchronous Circuit 8 to connect with described voltage lifting circuit 7 output terminal, described first voltage acquisition modulate circuit comprises the first voltage transformer (VT) 1 and to connect with described first voltage transformer (VT) 1 output terminal and the voltage signal gathered the first voltage transformer (VT) 1 follows the first filtering circuit 4 of filtering, described second voltage acquisition modulate circuit comprises the second voltage transformer (VT) 2 and to connect with described second voltage transformer (VT) 2 output terminal and the voltage signal gathered the second voltage transformer (VT) 2 follows the second filtering circuit 5 of filtering, described tertiary voltage acquisition and conditioning circuit comprises tertiary voltage mutual inductor 3 and to connect with described tertiary voltage mutual inductor 3 output terminal and the voltage signal gathered tertiary voltage mutual inductor 3 follows the 3rd filtering circuit 6 of filtering, described first filtering circuit 4, the output terminal of the second filtering circuit 5 and the 3rd filtering circuit 6 all connects with the input end of voltage lifting circuit 7, the output terminal of described voltage lifting circuit 7 and Phase-locked Synchronous Circuit 8 all connects with the input end of A/D change-over circuit 9,
Described microprocessor 10 is TMS320F28335 DSP microprocessor, described A/D change-over circuit 9 is chip ADS8365, the Xiao Jite diode B22 that the amplifier U8 that described Phase-locked Synchronous Circuit 8 comprises amplifier U7 that model is LF251, model is LF251, model are BAT54S, model are Xiao Jite diode B23, chip LM139, the chip CD4046 and chip 4040BCN of BAT54S, 3rd pin input point four tunnels of described amplifier U7, one end of one road connecting resistance R72, one end of another road connecting resistance R73,3rd tunnel is by resistance R75 ground connection, 4th tunnel connects the 3rd pin of Xiao Jite diode B22, the other end of resistance R72 is the first input end of Phase-locked Synchronous Circuit 8, and the other end of resistance R73 is the second input end of Phase-locked Synchronous Circuit 8, 2nd pin input point four tunnels of described amplifier U7, one end of one road connecting resistance R74, another road connects the 1st pin of Xiao Jite diode B22,3rd tunnel connects the 2nd pin of Xiao Jite diode B22,4th tunnel is connected with the 6th pin of amplifier U7 by resistance R76, and the other end of resistance R74 is the 3rd input end of Phase-locked Synchronous Circuit 8, 7th pin of described amplifier U7 connects with+15V power output end, 4th pin of described amplifier U7 connects with-15V power output end, 6th pin of described amplifier U7 is connected with the 2nd pin of amplifier U8 by the resistance R77 of series connection and resistance R78, the link of resistance R77 and resistance R78 is connected with the 6th pin of amplifier U8 by electric capacity C79, 3rd pin of described amplifier U8 connects with the 2nd pin of Xiao Jite diode B23, the 1st pin input point two-way of Xiao Jite diode B23, lead up to electric capacity C28 ground connection, another road connects with the 6th pin of amplifier U8, 3rd pin of Xiao Jite diode B23 connects with the 2nd pin of amplifier U8, 7th pin of described amplifier U8 connects with+15V power output end, 4th pin of described amplifier U8 connects with-15V power output end, 4th pin of described chip LM139 exports a point two-way, resistance R80 of leading up to connects with the 6th pin of amplifier U8, separately lead up to electric capacity C29 ground connection, the 5th pin input point two-way of described chip LM139, lead up to resistance R81 ground connection, resistance R82 of separately leading up to connects with the 2nd pin of chip LM139, 3rd pin of described chip LM139 connects with 5V power output end, the 12nd pin ground connection of described chip LM139, 14th pin of described chip CD4046 exports a point two-way, one tunnel connects with the 2nd pin of chip LM139, another road connects with a stiff end of swept resistance RW, another stiff end ground connection of swept resistance RW, the sliding end of swept resistance RW connects with the 12nd pin of chip CD4046, 11st pin of described chip CD4046 is by resistance R84 ground connection, 2nd pin of described chip CD4046 passes through resistance R83 and the electric capacity C30 ground connection of series connection, the link of resistance R83 and electric capacity C30 connects with the 9th pin of chip CD4046, 6th pin of described chip CD4046 is connected with the 7th pin of chip CD4046 by electric capacity C31, 4th pin of described chip CD4046 exports point four tunnels, wherein three tunnels respectively with the 56th pin of chip ADS8365, 57th pin and the 58th pin connect, 4th tunnel connects with the 10th pin of chip 4040BCN, 9th pin of described chip 4040BCN connects with the 3rd pin of chip 4040BCN, 11st pin of described chip 4040BCN and the 8th pin ground connection, 16th pin of described chip 4040BCN connects with 5V power output end.
In physical cabling, the 48th pin of chip ADS8365, 47th pin, 46th pin, 45th pin, 44th pin, 43rd pin, 42nd pin, 41st pin, 40th pin, 39th pin, 38th pin, 37th pin, 36th pin, 35th pin, 34th pin and the 33rd pin respectively with the 136th pin of TMS320F28335DSP microprocessor, 135th pin, 134th pin, 133rd pin, 132nd pin, 131st pin, 130th pin, 129th pin, 128th pin, 127th pin, 124th pin, 123rd pin, 122nd pin, 119th pin, 116th pin and the 115th pin connect, the 55th pin of chip ADS8365, 54th pin and the 53rd pin respectively with the 151st pin of TMS320F28335DSP microprocessor, 152nd pin and the 153rd pin connect, the 27th pin of chip ADS8365, 28th pin and the 29th pin respectively with the 90th pin of TMS320F28335DSP microprocessor, 138th pin and the 149th pin connect.
As shown in Figure 5, in the present embodiment, the Xiao Jite diode B12 of the Xiao Jite diode B10 that described first filtering circuit 4 comprises chip U1 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B16 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U1, one tunnel connects with the 3rd pin of Xiao Jite diode B10, another road connects with one end of resistance R32, and the other end of resistance R32 is the first voltage acquisition end Ua2, the 2nd pin input point two-way of described chip U1, a road connects with the 1st pin of chip U1, and another road connects with the 2nd pin of Xiao Jite diode B10, 1st pin of described chip U1 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B10, and the resistance R33 that connects and resistance R34 of separately leading up to connects with the 5th pin of chip U1, 5th pin of described chip U1 also connects with the 3rd pin of Xiao Jite diode B16,6th pin input point three tunnels of described chip U1, one tunnel connects with the 2nd pin of Xiao Jite diode B16, and another road connects with the 1st pin of Xiao Jite diode B16, and the 3rd tunnel is by R52 ground connection, 7th pin of described chip U1 exports point three tunnels, electric capacity C15 of leading up to connects with the link of resistance R33 and resistance R34, resistance R38 of separately leading up to connects with the 2nd pin of Xiao Jite diode B16, 3rd tunnel by series connection resistance R42 and resistance R41 connect with the 10th pin of chip U1, 10th pin of chip U1 also connects with the 3rd pin of Xiao Jite diode B12, 1st pin of Xiao Jite diode B12 and the 2nd pin all connect with the 9th pin of chip U1, 8th pin of described chip U1 passes through resistance R28 and the resistance R29 ground connection of series connection, 9th pin of chip U1 also connects with the link of resistance R28 and resistance R29,
As shown in Figure 6, in the present embodiment, the Xiao Jite diode B14 of the Xiao Jite diode B11 that described second filtering circuit 5 comprises chip U2 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B17 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U2, one tunnel connects with the 3rd pin of Xiao Jite diode B11, another road connects with one end of resistance R37, and the other end of resistance R38 is the second voltage acquisition end Ub2, the 2nd pin input point two-way of described chip U2, a road connects with the 1st pin of chip U2, and another road connects with the 2nd pin of Xiao Jite diode B11, 1st pin of described chip U2 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B11, and the resistance R39 that connects and resistance R40 of separately leading up to connects with the 5th pin of chip U2, 5th pin of described chip U2 also connects with the 3rd pin of Xiao Jite diode B17,6th pin input point three tunnels of described chip U2, one tunnel connects with the 2nd pin of Xiao Jite diode B17, and another road connects with the 1st pin of Xiao Jite diode B17, and the 3rd tunnel is by R53 ground connection, 7th pin of described chip U2 exports point three tunnels, electric capacity C18 of leading up to connects with the link of resistance R39 and resistance R40, resistance R43 of separately leading up to connects with the 2nd pin of Xiao Jite diode B17, 3rd tunnel by series connection resistance R46 and resistance R45 connect with the 10th pin of chip U2, 10th pin of chip U2 also connects with the 3rd pin of Xiao Jite diode B14, 1st pin of Xiao Jite diode B14 and the 2nd pin all connect with the 9th pin of chip U2, 8th pin of described chip U2 passes through resistance R30 and the resistance R31 ground connection of series connection, 9th pin of chip U2 also connects with the link of resistance R30 and resistance R31,
As shown in Figure 7, in the present embodiment, the Xiao Jite diode B15 of the Xiao Jite diode B13 that described 3rd filtering circuit 6 comprises chip U3 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B18 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U3, one tunnel connects with the 3rd pin of Xiao Jite diode B13, another road connects with one end of resistance R44, and the other end of resistance R44 is tertiary voltage collection terminal Uc2, the 2nd pin input point two-way of described chip U3, a road connects with the 1st pin of chip U3, and another road connects with the 2nd pin of Xiao Jite diode B13, 1st pin of described chip U3 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B13, and the resistance R47 that connects and resistance R48 of separately leading up to connects with the 5th pin of chip U3, 5th pin of described chip U3 also connects with the 3rd pin of Xiao Jite diode B18,6th pin input point three tunnels of described chip U3, one tunnel connects with the 2nd pin of Xiao Jite diode B18, and another road connects with the 1st pin of Xiao Jite diode B18, and the 3rd tunnel is by R55 ground connection, 7th pin of described chip U3 exports point three tunnels, electric capacity C23 of leading up to connects with the link of resistance R47 and resistance R48, resistance R49 of separately leading up to connects with the 2nd pin of Xiao Jite diode B18, 3rd tunnel by series connection resistance R51 and resistance R50 connect with the 10th pin of chip U3, 10th pin of chip U3 also connects with the 3rd pin of Xiao Jite diode B15, 1st pin of Xiao Jite diode B15 and the 2nd pin all connect with the 9th pin of chip U3, 8th pin of described chip U3 passes through resistance R35 and the resistance R36 ground connection of series connection, 9th pin of chip U3 also connects with the link of resistance R35 and resistance R36.
In actual use, first voltage transformer (VT) 1 gathers the A phase voltage data of civil power three-phase voltage, and the data of collection are sent into the first filtering circuit 4 by the first voltage acquisition end Ua2 carry out signal condition, second voltage transformer (VT) 2 gathers the B phase voltage data of civil power three-phase voltage, and the data of collection are sent into the second filtering circuit 5 by the second voltage acquisition end Ub2 carry out signal condition, tertiary voltage mutual inductor 3 gathers the C phase voltage data of civil power three-phase voltage, and the data of collection are carried out signal condition by tertiary voltage collection terminal Uc2 feeding the 3rd filtering circuit 6, result of use is good.
As shown in Figure 8, in the present embodiment, described voltage lifting circuit 7 comprises chip LMV324I, model is the Xiao Jite diode B19 of BAT54S, the Xiao Jite diode B21 of model to be the Xiao Jite diode B20 of BAT54S and model be BAT54S, 3rd pin input point three tunnels of described chip LMV324I, resistance R54 of leading up to connects with 5V power output end, resistance R58 of separately leading up to connects with the 8th pin of chip U1, 3rd tunnel connects with the 3rd pin of Xiao Jite diode B19, 1st pin of Xiao Jite diode B19 and the 2nd pin all connect with the 2nd pin of chip LMV324I, 1st pin of described chip LMV324I exports a point two-way, one tunnel connects with the 2nd pin of chip LMV324I, another road connects with one end of resistance R56, the other end of resistance R56 exports point three tunnels, and a road connects with the first input end of Phase-locked Synchronous Circuit 5, and another road connects with the 63rd pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C25 ground connection, 4th pin of described chip LMV324I connects with 5V power output end, the 11st pin ground connection of described chip LMV324I, 5th pin input point three tunnels of described chip LMV324I, resistance R57 of leading up to connects with 5V power output end, resistance R60 of separately leading up to connects with the 8th pin of chip U2,3rd tunnel connects with the 3rd pin of Xiao Jite diode B20,1st pin of Xiao Jite diode B20 and the 2nd pin all connect with the 6th pin of chip LMV324I, 7th pin of described chip LMV324I exports a point two-way, one tunnel connects with the 6th pin of chip LMV324I, and another road connects with one end of resistance R59, the other end of resistance R59 exports point three tunnels, and a road connects with the second input end of Phase-locked Synchronous Circuit 5, and another road connects with the 2nd pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C26 ground connection, 10th pin input point three tunnels of described chip LMV324I, resistance R61 of leading up to connects with 5V power output end, resistance R63 of separately leading up to connects with the 8th pin of chip U3,3rd tunnel connects with the 3rd pin of Xiao Jite diode B21,1st pin of Xiao Jite diode B21 and the 2nd pin all connect with the 8th pin of chip LMV324I, 8th pin of described chip LMV324I exports a point two-way, one tunnel connects with the 9th pin of chip LMV324I, and another road connects with one end of resistance R62, the other end of resistance R62 exports point three tunnels, and a road connects with the 3rd input end of Phase-locked Synchronous Circuit 5, and another road connects with the 6th pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C27 ground connection.
When the utility model uses, gathering after rear input first filtering circuit 4 is followed the A phase voltage signal gathered respectively by the first voltage transformer (VT) 1 pair of civil power A phase voltage takes the anti-aliasing filter of two-stage cascade to nurse one's health, second 2 pairs, voltage transformer (VT) civil power B phase voltage gathers after rear input second filtering circuit 5 is followed the B phase voltage signal gathered takes the anti-aliasing filter of two-stage cascade to nurse one's health, tertiary voltage mutual inductor 3 pairs of civil power C phase voltages gather after rear input the 3rd filtering circuit 6 is followed the C phase voltage signal gathered takes the anti-aliasing filter of two-stage cascade to nurse one's health, it is malleation value that three-phase voltage after conditioning sends into voltage lifting circuit 7 by equal for negative pressure value lifting simultaneously, three-phase voltage sends into A/D change-over circuit 9 and Phase-locked Synchronous Circuit 8 respectively, Phase-locked Synchronous Circuit 8 pairs of signals also send into A/D change-over circuit 9 after carrying out the phase-locked and frequency-divided feedback of frequency multiplication, microprocessor 10 receives the voltage parameter that A/D change-over circuit 9 gathers, result of use is good.
The above; it is only preferred embodiment of the present utility model; not the utility model is imposed any restrictions; every above embodiment is done according to the utility model technical spirit any simple modification, change and equivalent structure change, all still belong in the protection domain of technical solutions of the utility model.
Claims (3)
1. a power quality analyzer voltage acquisition and conditioning circuit, it is characterized in that: comprise microprocessor (10) and voltage data monitoring means, and the A/D change-over circuit (9) connected with described microprocessor (10) input end; described voltage data monitoring means comprises and is respectively used to gather and nurses one's health the first voltage acquisition modulate circuit of civil power three-phase voltage data, second voltage acquisition modulate circuit, tertiary voltage acquisition and conditioning circuit and voltage lifting circuit (7), and the Phase-locked Synchronous Circuit (8) to connect with described voltage lifting circuit (7) output terminal, described first voltage acquisition modulate circuit comprises the first voltage transformer (VT) (1) and connects with described first voltage transformer (VT) (1) output terminal and the voltage signal that the first voltage transformer (VT) (1) gathers followed to first filtering circuit (4) of filtering, described second voltage acquisition modulate circuit comprises the second voltage transformer (VT) (2) and connects with described second voltage transformer (VT) (2) output terminal and the voltage signal that the second voltage transformer (VT) (2) gathers followed to second filtering circuit (5) of filtering, described tertiary voltage acquisition and conditioning circuit comprises tertiary voltage mutual inductor (3) and connects with described tertiary voltage mutual inductor (3) output terminal and the voltage signal that tertiary voltage mutual inductor (3) gathers followed to the 3rd filtering circuit (6) of filtering, described first filtering circuit (4), the output terminal of the second filtering circuit (5) and the 3rd filtering circuit (6) all connects with the input end of voltage lifting circuit (7), the output terminal of described voltage lifting circuit (7) and Phase-locked Synchronous Circuit (8) all connects with the input end of A/D change-over circuit (9),
Described microprocessor (10) is TMS320F28335DSP microprocessor, described A/D change-over circuit (9) is chip ADS8365, the Xiao Jite diode B22 that the amplifier U8 that described Phase-locked Synchronous Circuit (8) comprises amplifier U7 that model is LF251, model is LF251, model are BAT54S, model are Xiao Jite diode B23, chip LM139, the chip CD4046 and chip 4040BCN of BAT54S, 3rd pin input point four tunnels of described amplifier U7, one end of one road connecting resistance R72, one end of another road connecting resistance R73,3rd tunnel is by resistance R75 ground connection, 4th tunnel connects the 3rd pin of Xiao Jite diode B22, the other end of resistance R72 is the first input end of Phase-locked Synchronous Circuit (8), and the other end of resistance R73 is the second input end of Phase-locked Synchronous Circuit (8), 2nd pin input point four tunnels of described amplifier U7, one end of one road connecting resistance R74, another road connects the 1st pin of Xiao Jite diode B22,3rd tunnel connects the 2nd pin of Xiao Jite diode B22,4th tunnel is connected with the 6th pin of amplifier U7 by resistance R76, and the other end of resistance R74 is the 3rd input end of Phase-locked Synchronous Circuit (8), 7th pin of described amplifier U7 connects with+15V power output end, 4th pin of described amplifier U7 connects with-15V power output end, 6th pin of described amplifier U7 is connected with the 2nd pin of amplifier U8 by the resistance R77 of series connection and resistance R78, the link of resistance R77 and resistance R78 is connected with the 6th pin of amplifier U8 by electric capacity C79, 3rd pin of described amplifier U8 connects with the 2nd pin of Xiao Jite diode B23, the 1st pin input point two-way of Xiao Jite diode B23, lead up to electric capacity C28 ground connection, another road connects with the 6th pin of amplifier U8, 3rd pin of Xiao Jite diode B23 connects with the 2nd pin of amplifier U8, 7th pin of described amplifier U8 connects with+15V power output end, 4th pin of described amplifier U8 connects with-15V power output end, 4th pin of described chip LM139 exports a point two-way, resistance R80 of leading up to connects with the 6th pin of amplifier U8, separately lead up to electric capacity C29 ground connection, the 5th pin input point two-way of described chip LM139, lead up to resistance R81 ground connection, resistance R82 of separately leading up to connects with the 2nd pin of chip LM139, 3rd pin of described chip LM139 connects with 5V power output end, the 12nd pin ground connection of described chip LM139, 14th pin of described chip CD4046 exports a point two-way, one tunnel connects with the 2nd pin of chip LM139, another road connects with a stiff end of swept resistance RW, another stiff end ground connection of swept resistance RW, the sliding end of swept resistance RW connects with the 12nd pin of chip CD4046, 11st pin of described chip CD4046 is by resistance R84 ground connection, 2nd pin of described chip CD4046 passes through resistance R83 and the electric capacity C30 ground connection of series connection, the link of resistance R83 and electric capacity C30 connects with the 9th pin of chip CD4046, 6th pin of described chip CD4046 is connected with the 7th pin of chip CD4046 by electric capacity C31, 4th pin of described chip CD4046 exports point four tunnels, wherein three tunnels respectively with the 56th pin of chip ADS8365, 57th pin and the 58th pin connect, 4th tunnel connects with the 10th pin of chip 4040BCN, 9th pin of described chip 4040BCN connects with the 3rd pin of chip 4040BCN, 11st pin of described chip 4040BCN and the 8th pin ground connection, 16th pin of described chip 4040BCN connects with 5V power output end.
2. according to a kind of power quality analyzer voltage acquisition and conditioning circuit according to claim 1, it is characterized in that: the Xiao Jite diode B12 of the Xiao Jite diode B10 that described first filtering circuit (4) comprises chip U1 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B16 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U1, one tunnel connects with the 3rd pin of Xiao Jite diode B10, another road connects with one end of resistance R32, and the other end of resistance R32 is the first voltage acquisition end Ua2, the 2nd pin input point two-way of described chip U1, a road connects with the 1st pin of chip U1, and another road connects with the 2nd pin of Xiao Jite diode B10, 1st pin of described chip U1 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B10, and the resistance R33 that connects and resistance R34 of separately leading up to connects with the 5th pin of chip U1, 5th pin of described chip U1 also connects with the 3rd pin of Xiao Jite diode B16,6th pin input point three tunnels of described chip U1, one tunnel connects with the 2nd pin of Xiao Jite diode B16, and another road connects with the 1st pin of Xiao Jite diode B16, and the 3rd tunnel is by R52 ground connection, 7th pin of described chip U1 exports point three tunnels, electric capacity C15 of leading up to connects with the link of resistance R33 and resistance R34, resistance R38 of separately leading up to connects with the 2nd pin of Xiao Jite diode B16, 3rd tunnel by series connection resistance R42 and resistance R41 connect with the 10th pin of chip U1, 10th pin of chip U1 also connects with the 3rd pin of Xiao Jite diode B12, 1st pin of Xiao Jite diode B12 and the 2nd pin all connect with the 9th pin of chip U1, 8th pin of described chip U1 passes through resistance R28 and the resistance R29 ground connection of series connection, 9th pin of chip U1 also connects with the link of resistance R28 and resistance R29,
The Xiao Jite diode B14 of the Xiao Jite diode B11 that described second filtering circuit (5) comprises chip U2 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B17 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U2, one tunnel connects with the 3rd pin of Xiao Jite diode B11, another road connects with one end of resistance R37, and the other end of resistance R38 is the second voltage acquisition end Ub2, the 2nd pin input point two-way of described chip U2, a road connects with the 1st pin of chip U2, and another road connects with the 2nd pin of Xiao Jite diode B11, 1st pin of described chip U2 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B11, and the resistance R39 that connects and resistance R40 of separately leading up to connects with the 5th pin of chip U2, 5th pin of described chip U2 also connects with the 3rd pin of Xiao Jite diode B17,6th pin input point three tunnels of described chip U2, one tunnel connects with the 2nd pin of Xiao Jite diode B17, and another road connects with the 1st pin of Xiao Jite diode B17, and the 3rd tunnel is by R53 ground connection, 7th pin of described chip U2 exports point three tunnels, electric capacity C18 of leading up to connects with the link of resistance R39 and resistance R40, resistance R43 of separately leading up to connects with the 2nd pin of Xiao Jite diode B17, 3rd tunnel by series connection resistance R46 and resistance R45 connect with the 10th pin of chip U2, 10th pin of chip U2 also connects with the 3rd pin of Xiao Jite diode B14, 1st pin of Xiao Jite diode B14 and the 2nd pin all connect with the 9th pin of chip U2, 8th pin of described chip U2 passes through resistance R30 and the resistance R31 ground connection of series connection, 9th pin of chip U2 also connects with the link of resistance R30 and resistance R31,
The Xiao Jite diode B15 of the Xiao Jite diode B13 that described 3rd filtering circuit (6) comprises chip U3 that model is LF247, model is BAT54S, model to be the Xiao Jite diode B18 of BAT54S and model be BAT54S, the 3rd pin input point two-way of described chip U3, one tunnel connects with the 3rd pin of Xiao Jite diode B13, another road connects with one end of resistance R44, and the other end of resistance R44 is tertiary voltage collection terminal Uc2, the 2nd pin input point two-way of described chip U3, a road connects with the 1st pin of chip U3, and another road connects with the 2nd pin of Xiao Jite diode B13, 1st pin of described chip U3 exports a point two-way, and a road connects with the 1st pin of Xiao Jite diode B13, and the resistance R47 that connects and resistance R48 of separately leading up to connects with the 5th pin of chip U3, 5th pin of described chip U3 also connects with the 3rd pin of Xiao Jite diode B18,6th pin input point three tunnels of described chip U3, one tunnel connects with the 2nd pin of Xiao Jite diode B18, and another road connects with the 1st pin of Xiao Jite diode B18, and the 3rd tunnel is by R55 ground connection, 7th pin of described chip U3 exports point three tunnels, electric capacity C23 of leading up to connects with the link of resistance R47 and resistance R48, resistance R49 of separately leading up to connects with the 2nd pin of Xiao Jite diode B18, 3rd tunnel by series connection resistance R51 and resistance R50 connect with the 10th pin of chip U3, 10th pin of chip U3 also connects with the 3rd pin of Xiao Jite diode B15, 1st pin of Xiao Jite diode B15 and the 2nd pin all connect with the 9th pin of chip U3, 8th pin of described chip U3 passes through resistance R35 and the resistance R36 ground connection of series connection, 9th pin of chip U3 also connects with the link of resistance R35 and resistance R36.
3. according to a kind of power quality analyzer voltage acquisition and conditioning circuit according to claim 1, it is characterized in that: described voltage lifting circuit (7) comprises chip LMV324I, model is the Xiao Jite diode B19 of BAT54S, the Xiao Jite diode B21 of model to be the Xiao Jite diode B20 of BAT54S and model be BAT54S, 3rd pin input point three tunnels of described chip LMV324I, resistance R54 of leading up to connects with 5V power output end, resistance R58 of separately leading up to connects with the 8th pin of chip U1, 3rd tunnel connects with the 3rd pin of Xiao Jite diode B19, 1st pin of Xiao Jite diode B19 and the 2nd pin all connect with the 2nd pin of chip LMV324I, 1st pin of described chip LMV324I exports a point two-way, one tunnel connects with the 2nd pin of chip LMV324I, another road connects with one end of resistance R56, the other end of resistance R56 exports point three tunnels, and a road connects with the first input end of Phase-locked Synchronous Circuit (5), and another road connects with the 63rd pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C25 ground connection, 4th pin of described chip LMV324I connects with 5V power output end, the 11st pin ground connection of described chip LMV324I, 5th pin input point three tunnels of described chip LMV324I, resistance R57 of leading up to connects with 5V power output end, resistance R60 of separately leading up to connects with the 8th pin of chip U2,3rd tunnel connects with the 3rd pin of Xiao Jite diode B20,1st pin of Xiao Jite diode B20 and the 2nd pin all connect with the 6th pin of chip LMV324I, 7th pin of described chip LMV324I exports a point two-way, one tunnel connects with the 6th pin of chip LMV324I, and another road connects with one end of resistance R59, the other end of resistance R59 exports point three tunnels, and a road connects with the second input end of Phase-locked Synchronous Circuit (5), and another road connects with the 2nd pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C26 ground connection, 10th pin input point three tunnels of described chip LMV324I, resistance R61 of leading up to connects with 5V power output end, resistance R63 of separately leading up to connects with the 8th pin of chip U3,3rd tunnel connects with the 3rd pin of Xiao Jite diode B21,1st pin of Xiao Jite diode B21 and the 2nd pin all connect with the 8th pin of chip LMV324I, 8th pin of described chip LMV324I exports a point two-way, one tunnel connects with the 9th pin of chip LMV324I, and another road connects with one end of resistance R62, the other end of resistance R62 exports point three tunnels, and a road connects with the 3rd input end of Phase-locked Synchronous Circuit (5), and another road connects with the 6th pin of described chip ADS8365, and the 3rd tunnel is by electric capacity C27 ground connection.
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| CN201520113487.4U CN204389582U (en) | 2015-02-16 | 2015-02-16 | A kind of power quality analyzer voltage acquisition and conditioning circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105634135A (en) * | 2016-02-26 | 2016-06-01 | 国网山东省电力公司章丘市供电公司 | Electric energy quality protection apparatus for power supply station |
| CN105974179A (en) * | 2016-07-01 | 2016-09-28 | 河北箱变电器有限公司 | Secondary equipment for monitoring partial discharge and temperature monitoring device |
| CN109560732A (en) * | 2017-09-25 | 2019-04-02 | 西安科技大学 | A kind of Excitation Controller for Synchronous Generator based on DSP |
-
2015
- 2015-02-16 CN CN201520113487.4U patent/CN204389582U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105634135A (en) * | 2016-02-26 | 2016-06-01 | 国网山东省电力公司章丘市供电公司 | Electric energy quality protection apparatus for power supply station |
| CN105974179A (en) * | 2016-07-01 | 2016-09-28 | 河北箱变电器有限公司 | Secondary equipment for monitoring partial discharge and temperature monitoring device |
| CN109560732A (en) * | 2017-09-25 | 2019-04-02 | 西安科技大学 | A kind of Excitation Controller for Synchronous Generator based on DSP |
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