CN204331581U - A kind of for the deck of card system and the connecting circuit of computing machine - Google Patents
A kind of for the deck of card system and the connecting circuit of computing machine Download PDFInfo
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- CN204331581U CN204331581U CN201420740016.1U CN201420740016U CN204331581U CN 204331581 U CN204331581 U CN 204331581U CN 201420740016 U CN201420740016 U CN 201420740016U CN 204331581 U CN204331581 U CN 204331581U
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Abstract
The utility model discloses a kind of for the deck of card system and the connecting circuit of computing machine, comprise power supply, the first diode to the 7th diode, the first resistance to the CPU of the 5th resistance, deck, computing machine, triode, the first electric capacity to the 4th electric capacity, the first integrated regulator and the second integrated regulator, when inserting without card, second card test line end of deck is high level, when there being card to insert, second card test line end of deck tests line end short circuit because blocking with first of deck, and the second card test line end of deck is low level.In the utility model, the first diode to the 6th diode is used for preventing this connecting circuit from occurring transient overvoltage phenomenon, this circuit is powered and is adopted the mode of independent current source, and be controlled by the CPU of computing machine, when the P16 port of the CPU of computing machine is low level, then cut off the power supply to IC-card seat, make this circuit have the low feature of power consumption.
Description
Technical field
The utility model relates to the connecting circuit of a kind of deck and computing machine, particularly relates to a kind of for the deck of card system and the connecting circuit of computing machine.
Background technology
Card system has four processes usually: smart card, deck, computer techno-stress, smart card should have read-write capability, there are enough storage spaces, and several regions can be divided into, each region can realize a kind of purposes, smart card must have absolute security simultaneously, deck comprises various card reader or read-write controller, can according to different places, select different decks, deck also should have excellent reliability and security simultaneously, network can according to the existing network condition of user, the plan of geographic position and all-purpose card information flow, select suitable network structure, easily there is transient overvoltage phenomenon in the connecting circuit of a kind of deck for card system of tradition and computing machine, and there is the high problem of power consumption.
Utility model content
The purpose of this utility model is just to provide a kind of for the deck of card system and the connecting circuit of computing machine to solve the problem.
In order to achieve the above object, the utility model have employed following technical scheme:
A kind of for the deck of card system and the connecting circuit of computing machine, comprise power supply, first diode is to the 7th diode, first resistance is to the 5th resistance, deck, the CPU of computing machine, triode, first electric capacity is to the 4th electric capacity, first integrated regulator and the second integrated regulator, the positive pole of described power supply respectively with the negative pole of described first diode, the negative pole of described 3rd diode, the negative pole of described 5th diode, the input end of described first integrated regulator is connected with the input end of described second integrated regulator, the positive pole of described first diode respectively with the negative pole of described second diode, the P12 port of the CPU of described computing machine, the first end of described 3rd resistance is connected with the input end of clock of deck, the positive pole of described second diode respectively with the positive pole of described 4th diode, the earth terminal of described deck is connected rear ground connection with the positive pole of the 6th diode, the positive pole of described 3rd diode respectively with the negative pole of described 4th diode, the P11 port of the CPU of described computing machine, the first end of described second resistance is connected with the reset terminal of described deck, the positive pole of described 5th diode respectively with the negative pole of described 6th diode, the P10 port of the CPU of described computing machine, described first resistance is connected with the FPDP of described deck, the input end of the CPU of described computing machine and second of described deck blocks to be tested line end and is connected, first card p-wire end ground connection of described deck, the power end of described deck respectively with the second end of described first resistance, second end of described second resistance, second end of described 3rd resistance, the collector of described triode is connected with the first end of described first electric capacity, the base stage of described triode is connected with the first end of described 4th resistance, described second end of the 4th resistance is connected with the P17 port of the CPU of described computing machine, the P16 port of the CPU of described computing machine is connected with the first end of described 5th resistance and the negative pole of described 7th diode respectively, the positive pole of described 7th diode respectively with the emitter of described triode, the output terminal of described second integrated regulator is connected with the first end of described second electric capacity, second end ground connection of described 5th resistance, the power end of the CPU of described computing machine respectively with the first end of described 4th electric capacity, the first end of described 3rd electric capacity is connected with the output terminal of described first integrated regulator, second end of described 4th electric capacity respectively with the second end of described 3rd electric capacity, the earth terminal of described first integrated regulator, the earth terminal of described second integrated regulator, second end of described second electric capacity is connected rear ground connection with the second end of described first electric capacity.
In said structure, first diode to the 6th diode is used for preventing this connecting circuit from occurring transient overvoltage phenomenon, this circuit is powered and is adopted the mode of independent current source, and be controlled by the CPU of computing machine, when the P16 port of the CPU of computing machine is low level, then cut off the power supply to deck, make this circuit have the low feature of power consumption.
The beneficial effects of the utility model are:
The utility model is a kind of for the deck of card system and the connecting circuit of computing machine, in this connecting circuit, the first diode to the 6th diode is used for preventing this connecting circuit from occurring transient overvoltage phenomenon, this circuit is powered and is adopted the mode of independent current source, and be controlled by the CPU of computing machine, when the P16 port of the CPU of computing machine is low level, then cut off the power supply to deck, make this circuit have the low feature of power consumption.
Accompanying drawing explanation
Fig. 1 is that the utility model is a kind of for the deck of card system and the connecting circuit figure of computing machine.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail:
As shown in Figure 1, the utility model is a kind of for the deck of card system and the connecting circuit of computing machine, comprises power supply, first diode D1 is to the 7th diode D7, first resistance R1 is to the 5th resistance R5, deck Q, the CPU IC1 of computing machine, triode VT, first electric capacity C1 is to the 4th electric capacity C4, first integrated regulator IC2 and the second integrated regulator IC2, the positive pole of power supply respectively with the negative pole of the first diode D1, the negative pole of the 3rd diode D3, the negative pole of the 5th diode D5, the input end of the first integrated regulator IC2 is connected with the input end of the second integrated regulator IC2, the positive pole of the first diode D1 respectively with the negative pole of the second diode D2, the P12 port of the CPU IC1 of computing machine, the first end of the 3rd resistance R3 is connected with the input end of clock of deck Q, the positive pole of the second diode D2 respectively with the positive pole of the 4th diode D4, ground connection after the earth terminal of deck Q is connected with the positive pole of the 6th diode D6, the positive pole of the 3rd diode D3 respectively with the negative pole of the 4th diode D4, the P11 port of the CPU IC1 of computing machine, the first end of the second resistance R2 is connected with the reset terminal of deck Q, the positive pole of the 5th diode D5 respectively with the negative pole of the 6th diode D6, the P10 port of the CPU IC1 of computing machine, first resistance R1 is connected with the FPDP of deck Q, and the input end of the CPU IC1 of computing machine and second of deck Q blocks to be tested line end and be connected, the first card p-wire end ground connection of deck Q, the power end of deck Q respectively with second end of the first resistance R1, second end of the second resistance R2, second end of the 3rd resistance R3, the collector of triode VT is connected with the first end of the first electric capacity C1, the base stage of triode VT is connected with the first end of the 4th resistance R4, second end of the 4th resistance R4 is connected with the P17 port of the CPUIC1 of computing machine, the P16 port of the CPU IC1 of computing machine is connected with the first end of the 5th resistance R5 and the negative pole of the 7th diode D7 respectively, the positive pole of the 7th diode D7 respectively with the emitter of triode VT, the output terminal of the second integrated regulator IC2 is connected with the first end of the second electric capacity C2, the second end ground connection of the 5th resistance R5, the power end of the CPU IC1 of computing machine respectively with the first end of the 4th electric capacity C4, the first end of the 3rd electric capacity C3 is connected with the output terminal of the first integrated regulator IC2, second end of the 4th electric capacity C4 respectively with second end of the 3rd electric capacity C3, the earth terminal of the first integrated regulator IC2, the earth terminal of the second integrated regulator IC2, second end of the second electric capacity C2 is connected rear ground connection with second end of the first electric capacity C1.
Principle of work of the present utility model is as follows:
When inserting without card, the second card test line end of deck Q is high level, when there being card to insert, the second card test line end of deck Q tests line end short circuit because blocking with first of deck Q, the second card test line end of deck Q is low level, the phenomenon of first diode D1 to the 6th diode D6 for preventing circuit from occurring transient overvoltage, this circuit is powered and is adopted the mode of independent current source, and be controlled by the CPU IC1 of computing machine, when the P16 port of the CPU IC1 of computing machine is low level, then cut off the power supply to IC-card seat.
Claims (1)
1. one kind for the deck of card system and the connecting circuit of computing machine, it is characterized in that: comprise power supply, first diode is to the 7th diode, first resistance is to the 5th resistance, deck, the CPU of computing machine, triode, first electric capacity is to the 4th electric capacity, first integrated regulator and the second integrated regulator, the positive pole of described power supply respectively with the negative pole of described first diode, the negative pole of described 3rd diode, the negative pole of described 5th diode, the input end of described first integrated regulator is connected with the input end of described second integrated regulator, the positive pole of described first diode respectively with the negative pole of described second diode, the P12 port of the CPU of described computing machine, the first end of described 3rd resistance is connected with the input end of clock of deck, the positive pole of described second diode respectively with the positive pole of described 4th diode, the earth terminal of described deck is connected rear ground connection with the positive pole of the 6th diode, the positive pole of described 3rd diode respectively with the negative pole of described 4th diode, the P11 port of the CPU of described computing machine, the first end of described second resistance is connected with the reset terminal of described deck, the positive pole of described 5th diode respectively with the negative pole of described 6th diode, the P10 port of the CPU of described computing machine, described first resistance is connected with the FPDP of described deck, the input end of the CPU of described computing machine and second of described deck blocks to be tested line end and is connected, first card p-wire end ground connection of described deck, the power end of described deck respectively with the second end of described first resistance, second end of described second resistance, second end of described 3rd resistance, the collector of described triode is connected with the first end of described first electric capacity, the base stage of described triode is connected with the first end of described 4th resistance, described second end of the 4th resistance is connected with the P17 port of the CPU of described computing machine, the P16 port of the CPU of described computing machine is connected with the first end of described 5th resistance and the negative pole of described 7th diode respectively, the positive pole of described 7th diode respectively with the emitter of described triode, the output terminal of described second integrated regulator is connected with the first end of described second electric capacity, second end ground connection of described 5th resistance, the power end of the CPU of described computing machine respectively with the first end of described 4th electric capacity, the first end of described 3rd electric capacity is connected with the output terminal of described first integrated regulator, second end of described 4th electric capacity respectively with the second end of described 3rd electric capacity, the earth terminal of described first integrated regulator, the earth terminal of described second integrated regulator, second end of described second electric capacity is connected rear ground connection with the second end of described first electric capacity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420740016.1U CN204331581U (en) | 2014-11-29 | 2014-11-29 | A kind of for the deck of card system and the connecting circuit of computing machine |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420740016.1U CN204331581U (en) | 2014-11-29 | 2014-11-29 | A kind of for the deck of card system and the connecting circuit of computing machine |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204331581U true CN204331581U (en) | 2015-05-13 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420740016.1U Expired - Fee Related CN204331581U (en) | 2014-11-29 | 2014-11-29 | A kind of for the deck of card system and the connecting circuit of computing machine |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204331581U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104407679A (en) * | 2014-11-29 | 2015-03-11 | 成都中远信电子科技有限公司 | Connection circuit for card holder of e-card system and computer |
-
2014
- 2014-11-29 CN CN201420740016.1U patent/CN204331581U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104407679A (en) * | 2014-11-29 | 2015-03-11 | 成都中远信电子科技有限公司 | Connection circuit for card holder of e-card system and computer |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20160527 Address after: 550002 4F-A5, Guiyang New World Digital Plaza, 20 Zhonghua Road, Nanming District, Guizhou, Guiyang Patentee after: Guizhou Jing Cheng Fu Technology Co., Ltd. Address before: High tech Zone Tianchen road Chengdu City, Sichuan province 610041 No. 88 Patentee before: Chengdu Zhongyuanxin Electronic Technology Co., Ltd. |
|
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150513 Termination date: 20161129 |