CN204316115U - A kind of POS power supply circuits adopting single lithium battery - Google Patents
A kind of POS power supply circuits adopting single lithium battery Download PDFInfo
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- CN204316115U CN204316115U CN201420729677.4U CN201420729677U CN204316115U CN 204316115 U CN204316115 U CN 204316115U CN 201420729677 U CN201420729677 U CN 201420729677U CN 204316115 U CN204316115 U CN 204316115U
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Abstract
The utility model relates to a kind of POS power supply circuits adopting single lithium battery, comprising, and: USB powers port, lithium battery charging circuit, lithium battery power supply circuit, the first booster circuit, the second booster circuit, the first reduction voltage circuit, the second reduction voltage circuit, the 3rd reduction voltage circuit and the 4th reduction voltage circuit; Power port, lithium battery charging circuit of USB is connected successively with lithium battery power supply circuit; First booster circuit, the second booster circuit, the first reduction voltage circuit are all connected with lithium battery power supply circuit with the second reduction voltage circuit; 3rd reduction voltage circuit is connected with the second booster circuit with the 4th reduction voltage circuit.The utility model to propose a kind of POS power supply circuits of single lithium battery that adopt be that POS provides abundant power output interface, the power supply facilitating POS power consumption equipment provides, and reduces the volume and weight of POS simultaneously, improves portability.
Description
Technical field
The utility model relates to POS power circuit, particularly a kind of POS power supply circuits adopting single lithium battery.
Background technology
At present, conventional P OS machine adopts the lithium batteries of two joint series connection to power, and lithium battery voltage is powered directly to thermal printer, and is depressured to 4.0V by DC-DC and powers to GPRS communication module, and the method circuit is fairly simple.But two joint lithium battery volume ratios are huger and heavy, cause POS volume also larger, are inconvenient to carry; Charge simultaneously and also need special power supply adaptor, bring inconvenience to charging; And along with the increase of POS ancillary equipment, it is also more and more obvious that power circuit exports not enough drawback.
Summary of the invention
The purpose of this utility model is to provide a kind of POS power supply circuits adopting single lithium battery, to overcome the defect existed in prior art.
For achieving the above object, the technical solution of the utility model is: a kind of POS power supply circuits adopting single lithium battery, it is characterized in that, comprising that: USB powers port, lithium battery charging circuit, lithium battery power supply circuit, the first booster circuit, the second booster circuit, the first reduction voltage circuit, the second reduction voltage circuit, the 3rd reduction voltage circuit and the 4th reduction voltage circuit; Described USB port of powering is connected with described lithium battery power supply circuit through described charging circuit; The input of described first booster circuit, the input of described second booster circuit, the input of described first reduction voltage circuit are connected with described lithium battery power supply circuit respectively with the input of described second reduction voltage circuit; The output of described first booster circuit is connected with the energization input of thermal printer in POS; The output of described second booster circuit is connected with described 4th reduction voltage circuit input with the input of described 3rd reduction voltage circuit respectively; The output of described 3rd reduction voltage circuit is connected with the energization input of GPRS communicating circuit in POS; Described 4th reduction voltage circuit is connected with the CPU energization input of control circuit in POS; The output of described first reduction voltage circuit is connected with the energization input of main memory circuit in POS; The output of described second reduction voltage circuit is connected with the energization input of flash memory circuit in POS.
In the utility model one embodiment, described first booster circuit comprises: the first to the 5th resistance, the first inductance, the first to the 6th electric capacity, metal-oxide-semiconductor and chip MP3428; The BST end of described chip MP3428 is connected with described first electric capacity one end through described first resistance; The other end of described first electric capacity accesses the source electrode of described metal-oxide-semiconductor; The grid of described metal-oxide-semiconductor is held with the SDR of described chip MP3428 and is connected; SW1 to the SW5 end of described chip MP3428 is all connected with one end of described first inductance, and accesses the other end of described first electric capacity; The other end of described first inductance is connected with one end of described second electric capacity, and as the input of described first booster circuit; The other end ground connection of described second electric capacity; The SENSE end of described chip MP3428 is held with IN and is connected, and accesses the other end of described first inductance; The MODE end of described chip MP3428 is through described second grounding through resistance; The VDD_5V end of described chip MP3428 is through described 3rd capacity earth; The SS end of described chip MP3428 is through described 4th capacity earth; The COMP end of described chip MP3428 accesses one end of described 3rd resistance, the other end ground connection of described 3rd resistance through described 5th electric capacity; One end of described 4th resistance is connected with one end of described 5th resistance, and accesses the FB end of described chip MP3428; The other end ground connection of described 5th resistance; The other end of described 4th resistance is held with the OUT of described chip MP3428 and is connected, and accesses the drain electrode of described metal-oxide-semiconductor; The drain electrode of described metal-oxide-semiconductor is connected with one end of described 6th electric capacity, and as described first booster circuit output; The other end ground connection of described 6th electric capacity;
Described second booster circuit comprises: the 6th resistance, the 7th resistance, the second inductance, the 7th electric capacity, the 8th electric capacity and chip MP3422; One end of described second inductance is connected with one end of described 7th electric capacity, and as the input of described second booster circuit; The other end ground connection of described 7th electric capacity; The other end of described second inductance is held with the SW1 of described chip MP3422 respectively to hold with SW2 and is connected; The IN end of described chip MP3422 is connected with NC2 end, and accesses one end of described second inductance; One end of described 6th resistance is connected with one end of described 7th resistance, and accesses the FB end of described chip MP3422; The other end ground connection of described 7th resistance; Described 6th resistance the other end is held with the OUT1 of described chip MP3422 respectively, OUT2 holds, OUT3 holds and one end of the 8th electric capacity is connected, and as the output of described second booster circuit; The other end ground connection of described 8th electric capacity.
In the utility model one embodiment, described first reduction voltage circuit comprises: the 9th electric capacity, the tenth electric capacity and chip LC1463-18; The VCC end of described chip LC1463-18 is connected with one end of described 9th electric capacity, and as the input of described first reduction voltage circuit; The other end ground connection of described 9th electric capacity; The CE termination of described chip LC1463-18 enters the VCC end of described chip LC1463-18; The VOUT end of described chip LC1463-18 is connected with described tenth electric capacity one end, and as the output of described first reduction voltage circuit; The other end ground connection of described tenth electric capacity;
Described second reduction voltage circuit comprises: the 8th resistance, the 9th resistance, the 3rd inductance, the 11 electric capacity, the 12 electric capacity, the 13 electric capacity and the first chip SY8088; One end of described 11 electric capacity is held with the VIN of described first chip SY8088 and is connected, and as the input of described second reduction voltage circuit; One end of described 8th resistance R4 is connected with one end of described 12 electric capacity, and accesses one end of described 9th resistance; The other end ground connection of described 9th resistance; The FB termination of described first chip SY8088 enters one end of described 9th resistance; The SW end of described first chip SY8088 accesses the other end of described 8th resistance through described 3rd inductance; And the other end of described 8th resistance is also connected with the other end of described 12 electric capacity, and access one end of described 13 electric capacity, and as the output of described second reduction voltage circuit.
In the utility model one embodiment, described 3rd reduction voltage circuit comprises: the tenth resistance, the 11 resistance, the 14 electric capacity, the 15 electric capacity and chip APL5930; The VIN end of described chip APL5930 is connected with one end of described 14 electric capacity, and as the input of described 3rd reduction voltage circuit; The other end ground connection of described 14 electric capacity; The VCNTL termination of described chip APL5930 enters the VIN end of described chip APL5930; One end of described tenth resistance is connected with one end of described 11 resistance, and accesses the FB end of described chip APL5930; The other end of described tenth resistance is held with the VOUT1 of described chip APL5930 and is connected, and as the output of described 3rd reduction voltage circuit; And the VOUT2 of described chip APL5930 holds to hold with the VOUT1 of described chip APL5930 and is connected; One end of described 15 electric capacity is connected with the output of described 3rd reduction voltage circuit, and the other end is connected with the other end of described 11 resistance and ground connection; The EX_PAD of described chip APL5930 holds ground connection;
4th reduction voltage circuit comprises: the 16 to the 18 electric capacity, the 4th inductance, the 12 resistance, the 13 resistance and the second chip SY8088; The VIN end of described second chip SY8088 is connected with one end of described 16 electric capacity, and as the input of described 4th reduction voltage circuit; The other end ground connection of described 16 electric capacity; The EN end of described second chip SY8088 is held with the VIN of described second chip SY8088 and is connected; One end of described 12 resistance is connected with one end of described 17 electric capacity, and accesses one end of described 13 resistance; The other end ground connection of described 13 resistance; The FB termination of described second chip SY8088 enters one end of described 13 resistance; The other end of described 12 resistance is connected with the other end of described 17 electric capacity, and is connected with one end of described 4th inductance; One end of described 4th inductance is also connected with one end of described 18 electric capacity, and as the output of described 4th reduction voltage circuit; The other end of described 4th inductance is held with the SW of described second chip SY8088 and is connected; The other end ground connection of described 18 electric capacity.
In the utility model one embodiment, described lithium battery charging circuit comprises: the 14 to the 17 resistance, the 19 to the 21 electric capacity and chip MP2602; One end of described 19 electric capacity is held with the IN of described chip MP2602 and is connected, and as the input of described charging circuit; The other end of described 19 electric capacity is held with the EN of described chip MP2602 and is connected, and ground connection; One end of described 14 resistance is connected with one end of described 19 electric capacity; The other end of described 14 resistance is connected with one end of described 15 resistance, and accesses the NTC end of described chip MP2602; The other end ground connection of described 15 resistance; The SS end of described chip MP2602 is through the 20 capacity earth; The IBF end of described chip MP2602 is through the 16 grounding through resistance; The ISET end of described chip MP2602 is through the 17 grounding through resistance; The BATT end of described chip MP2602 is connected with one end of described 21 electric capacity, and as the output of described charging circuit; The other end ground connection of described 21 electric capacity.
Compared to prior art, the utility model has following beneficial effect: a kind of POS power supply circuits adopting single lithium battery that the utility model proposes, provide abundant lithium battery source circuit output port, reduce the volume and weight of POS largely, improve portability, and USB port can be used to charge, facilitate the charging of power supply, decrease conventional power source configuration and the drawback brought of charging modes, solve simultaneously due to ancillary equipment increase do the problem of power supply and the charging modes inconvenience caused.
Accompanying drawing explanation
Fig. 1 is a kind of circuit theory diagrams adopting the POS power supply circuits of single lithium battery in the utility model.
Fig. 2 is the circuit diagram of lithium battery charging circuit in the utility model.
Fig. 3 is the circuit diagram of the first booster circuit in the utility model.
Fig. 4 is the circuit diagram of the second booster circuit in the utility model.
Fig. 5 is the circuit diagram of the first reduction voltage circuit in the utility model.
Fig. 6 is the circuit diagram of the second reduction voltage circuit in the utility model.
Fig. 7 is the circuit diagram of the 3rd reduction voltage circuit in the utility model.
Fig. 8 is the circuit diagram of the 4th reduction voltage circuit in the utility model.
Embodiment
Below in conjunction with accompanying drawing, the technical solution of the utility model is specifically described.
The utility model provides a kind of POS power supply circuits adopting single lithium battery, as shown in Figure 1, it is characterized in that, comprising that: USB powers port, lithium battery charging circuit, lithium battery power supply circuit, the first booster circuit, the second booster circuit, the first reduction voltage circuit, the second reduction voltage circuit, the 3rd reduction voltage circuit and the 4th reduction voltage circuit; Described USB port of powering is connected with described lithium battery power supply circuit through described charging circuit; The input of described first booster circuit, the input of described second booster circuit, the input of described first reduction voltage circuit are connected with described lithium battery power supply circuit respectively with the input of described second reduction voltage circuit; The output of described first booster circuit is connected with the energization input of thermal printer in POS; The output of described second booster circuit is connected with described 4th reduction voltage circuit input with the input of described 3rd reduction voltage circuit respectively; The output of described 3rd reduction voltage circuit is connected with the energization input of GPRS communicating circuit in POS; Described 4th reduction voltage circuit is connected with the CPU energization input of control circuit in POS; The output of described first reduction voltage circuit is connected with the energization input of main memory circuit in POS; The output of described second reduction voltage circuit is connected with the energization input of flash memory circuit in POS.
In the present embodiment, as shown in Figure 2, described lithium battery charging circuit comprises: the 14 to the 17 resistance, the 19 to the 21 electric capacity and chip MP2602; One end of described 19 electric capacity C1 is held with the IN of described chip MP2602 and is connected, and as the input of described charging circuit, and this input and USB power, port is connected, and provides 5.0V voltage by USB feeder ear; The other end of described 19 electric capacity C1 is held with the EN of described chip MP2602 and is connected, and ground connection; One end of described 14 resistance R1 is connected with one end of described 19 electric capacity C1; The other end of described 14 resistance R1 is connected with one end of described 15 resistance R2, and accesses the NTC end of described chip MP2602; The other end ground connection of described 15 resistance R2; The SS end of described chip MP2602 is through the 20 electric capacity C2 ground connection; The IBF end of described chip MP2602 is through the 16 resistance R3 ground connection; The ISET end of described chip MP2602 is through the 17 resistance R4 ground connection; The BATT end of described chip MP2602 is connected with one end of described 21 electric capacity C3, and as the output of described charging circuit, output voltage and the described lithium battery power supply circuit of this output match, and in the present embodiment in adopt single-unit high-multiplying power discharge lithium battery; The other end ground connection of described 21 electric capacity C3.
As shown in Figure 3, described first booster circuit comprises: the first to the 5th resistance, the first inductance, the first to the 6th electric capacity, metal-oxide-semiconductor and chip MP3428; The BST end of described chip MP3428 is connected with described first electric capacity C107 one end through described first resistance R34; The other end of described first electric capacity C107 accesses the source electrode of described metal-oxide-semiconductor; The grid of described metal-oxide-semiconductor is held with the SDR of described chip MP3428 and is connected; SW1 to the SW5 end of described chip MP3428 is all connected with one end of described first inductance L 3, and accesses the other end of described first electric capacity C107; The other end of described first inductance L 3 is connected with one end of described second electric capacity C86, and as the input of described first booster circuit; The other end ground connection of described second electric capacity C86; The SENSE end of described chip MP3428 is held with IN and is connected, and accesses the other end of described first inductance L 3; The MODE end of described chip MP3428 is through described second resistance R40 ground connection; The VDD_5V end of described chip MP3428 is through described 3rd electric capacity C105 ground connection; The SS end of described chip MP3428 is through described 4th electric capacity C106 ground connection; The COMP end of described chip MP3428 accesses one end of described 3rd resistance R36, the other end ground connection of described 3rd resistance R36 through described 5th electric capacity C110; One end of described 4th resistance R69 is connected with one end of described 5th resistance R74, and accesses the FB end of described chip MP3428; The other end ground connection of described 5th resistance R74; The other end of described 4th resistance R69 is held with the OUT of described chip MP3428 and is connected, and accesses the drain electrode of described metal-oxide-semiconductor; The drain electrode of described metal-oxide-semiconductor is connected with one end of described 6th electric capacity C100, and as described first booster circuit output, in the present embodiment, the output of this first booster circuit exports 8.0V voltage; The other end ground connection of described 6th electric capacity C100;
As shown in Figure 4, described second booster circuit comprises: the 6th resistance, the 7th resistance, the second inductance, the 7th electric capacity, the 8th electric capacity and chip MP3422; One end of described second inductance L 4 is connected with one end of described 7th electric capacity C76, and as the input of described second booster circuit; The other end ground connection of described 7th electric capacity C76; The other end of described second inductance L 4 is held with the SW1 of described chip MP3422 respectively to hold with SW2 and is connected; The IN end of described chip MP3422 is connected with NC2 end, and accesses one end of described second inductance L 4; One end of described 6th resistance R66 is connected with one end of described 7th resistance R47, and accesses the FB end of described chip MP3422; The other end ground connection of described 7th resistance R47; Described 6th resistance R66 the other end is held with the OUT1 of described chip MP3422 respectively, OUT2 holds, OUT3 holds and one end of the 8th electric capacity C77 is connected, and as the output of described second booster circuit, in the present embodiment, this second booster circuit exports 5.0V voltage; The other end ground connection of described 8th electric capacity C77.
In the present embodiment, as shown in Figure 5, described first reduction voltage circuit comprises: the 9th electric capacity, the tenth electric capacity and chip LC1463-18; The VCC end of described chip LC1463-18 is connected with one end of described 9th electric capacity C169, and as the input of described first reduction voltage circuit; The other end ground connection of described 9th electric capacity C169; The CE termination of described chip LC1463-18 enters the VCC end of described chip LC1463-18; The VOUT end of described chip LC1463-18 is connected with described tenth electric capacity C67 one end, and as the output of described first reduction voltage circuit; The other end ground connection of described tenth electric capacity C67;
As shown in Figure 6, described second reduction voltage circuit comprises: the 8th resistance, the 9th resistance, the 3rd inductance, the 11 electric capacity, the 12 electric capacity, the 13 electric capacity and the first chip SY8088; One end of described 11 electric capacity C236 is held with the VIN of described first chip SY8088 and is connected, and as the input of described second reduction voltage circuit; One end of described 8th resistance R4 is connected with one end of described 12 electric capacity C114, and accesses one end of described 9th resistance R92; The other end ground connection of described 9th resistance R92; The FB termination of described first chip SY8088 enters one end of described 9th resistance R92; The SW end of described first chip SY8088 accesses the other end of described 8th resistance R4 through described 3rd inductance L 27; And the other end of described 8th resistance R4 is also connected with the other end of described 12 electric capacity C114, and access one end of described 13 electric capacity C214, and as the output of described second reduction voltage circuit, in the present embodiment, the output voltage of this second reduction voltage circuit is 1.2V.
In the present embodiment, as shown in Figure 7, described 3rd reduction voltage circuit comprises: the tenth resistance, the 11 resistance, the 14 electric capacity, the 15 electric capacity and chip APL5930; The VIN end of described chip APL5930 is connected with one end of described 14 electric capacity C5, and as the input of described 3rd reduction voltage circuit; The other end ground connection of described 14 electric capacity C5; The VCNTL termination of described chip APL5930 enters the VIN end of described chip APL5930; One end of described tenth resistance R6 is connected with one end of described 11 resistance R8, and accesses the FB end of described chip APL5930; The other end of described tenth resistance R6 is held with the VOUT1 of described chip APL5930 and is connected, and as the output of described 3rd reduction voltage circuit, in the present embodiment, the output of the 3rd reduction voltage circuit exports 4.0V voltage; And the VOUT2 of described chip APL5930 holds to hold with the VOUT1 of described chip APL5930 and is connected; One end of described 15 electric capacity C9 is connected with the output of described 3rd reduction voltage circuit, and the other end is connected with the other end of described 11 resistance R8 and ground connection; The EX_PAD of described chip APL5930 holds ground connection;
As shown in Figure 8, the 4th reduction voltage circuit comprises: the 16 to the 18 electric capacity, the 4th inductance, the 12 resistance, the 13 resistance and the second chip SY8088; The VIN end of described second chip SY8088 is connected with one end of described 16 electric capacity C101, and as the input of described 4th reduction voltage circuit; The other end ground connection of described 16 electric capacity C101; The EN end of described second chip SY8088 is held with the VIN of described second chip SY8088 and is connected; One end of described 12 resistance R170 is connected with one end of described 17 electric capacity C99, and accesses one end of described 13 resistance R169; The other end ground connection of described 13 resistance R169; The FB termination of described second chip SY8088 enters one end of described 13 resistance R169; The other end of described 12 resistance R170 is connected with the other end of described 17 electric capacity C99, and is connected with one end of described 4th inductance L 2; One end of described 4th inductance L 2 is also connected with one end of described 18 electric capacity C103, and as the output of described 4th reduction voltage circuit, in the present embodiment, the output of the 4th reduction voltage circuit exports 3.3V voltage; The other end of described 4th inductance L 2 is held with the SW of described second chip SY8088 and is connected; The other end ground connection of described 18 electric capacity C103.
Be more than preferred embodiment of the present utility model, all changes done according to technical solutions of the utility model, when the function produced does not exceed the scope of technical solutions of the utility model, all belong to protection range of the present utility model.
Claims (5)
1. one kind adopts the POS power supply circuits of single lithium battery, it is characterized in that, comprising that: USB powers port, lithium battery charging circuit, lithium battery power supply circuit, the first booster circuit, the second booster circuit, the first reduction voltage circuit, the second reduction voltage circuit, the 3rd reduction voltage circuit and the 4th reduction voltage circuit; Described USB port of powering is connected with described lithium battery power supply circuit through described charging circuit; The input of described first booster circuit, the input of described second booster circuit, the input of described first reduction voltage circuit are connected with described lithium battery power supply circuit respectively with the input of described second reduction voltage circuit; The output of described first booster circuit is connected with the energization input of thermal printer in POS; The output of described second booster circuit is connected with described 4th reduction voltage circuit input with the input of described 3rd reduction voltage circuit respectively; The output of described 3rd reduction voltage circuit is connected with the energization input of GPRS communicating circuit in POS; Described 4th reduction voltage circuit is connected with the CPU energization input of control circuit in POS; The output of described first reduction voltage circuit is connected with the energization input of main memory circuit in POS; The output of described second reduction voltage circuit is connected with the energization input of flash memory circuit in POS.
2. a kind of POS power supply circuits adopting single lithium battery according to claim 1, is characterized in that: described first booster circuit comprises: the first to the 5th resistance, the first inductance, the first to the 6th electric capacity, metal-oxide-semiconductor and chip MP3428; The BST end of described chip MP3428 is connected with described first electric capacity one end through described first resistance; The other end of described first electric capacity accesses the source electrode of described metal-oxide-semiconductor; The grid of described metal-oxide-semiconductor is held with the SDR of described chip MP3428 and is connected; SW1 to the SW5 end of described chip MP3428 is all connected with one end of described first inductance, and accesses the other end of described first electric capacity; The other end of described first inductance is connected with one end of described second electric capacity, and as the input of described first booster circuit; The other end ground connection of described second electric capacity; The SENSE end of described chip MP3428 is held with IN and is connected, and accesses the other end of described first inductance; The MODE end of described chip MP3428 is through described second grounding through resistance; The VDD_5V end of described chip MP3428 is through described 3rd capacity earth; The SS end of described chip MP3428 is through described 4th capacity earth; The COMP end of described chip MP3428 accesses one end of described 3rd resistance, the other end ground connection of described 3rd resistance through described 5th electric capacity; One end of described 4th resistance is connected with one end of described 5th resistance, and accesses the FB end of described chip MP3428; The other end ground connection of described 5th resistance; The other end of described 4th resistance is held with the OUT of described chip MP3428 and is connected, and accesses the drain electrode of described metal-oxide-semiconductor; The drain electrode of described metal-oxide-semiconductor is connected with one end of described 6th electric capacity, and as described first booster circuit output; The other end ground connection of described 6th electric capacity;
Described second booster circuit comprises: the 6th resistance, the 7th resistance, the second inductance, the 7th electric capacity, the 8th electric capacity and chip MP3422; One end of described second inductance is connected with one end of described 7th electric capacity, and as the input of described second booster circuit; The other end ground connection of described 7th electric capacity; The other end of described second inductance is held with the SW1 of described chip MP3422 respectively to hold with SW2 and is connected; The IN end of described chip MP3422 is connected with NC2 end, and accesses one end of described second inductance; One end of described 6th resistance is connected with one end of described 7th resistance, and accesses the FB end of described chip MP3422; The other end ground connection of described 7th resistance; Described 6th resistance the other end is held with the OUT1 of described chip MP3422 respectively, OUT2 holds, OUT3 holds and one end of the 8th electric capacity is connected, and as the output of described second booster circuit; The other end ground connection of described 8th electric capacity.
3. a kind of POS power supply circuits adopting single lithium battery according to claim 1, is characterized in that: described first reduction voltage circuit comprises: the 9th electric capacity, the tenth electric capacity and chip LC1463-18; The VCC end of described chip LC1463-18 is connected with one end of described 9th electric capacity, and as the input of described first reduction voltage circuit; The other end ground connection of described 9th electric capacity; The CE termination of described chip LC1463-18 enters the VCC end of described chip LC1463-18; The VOUT end of described chip LC1463-18 is connected with described tenth electric capacity one end, and as the output of described first reduction voltage circuit; The other end ground connection of described tenth electric capacity;
Described second reduction voltage circuit comprises: the 8th resistance, the 9th resistance, the 3rd inductance, the 11 electric capacity, the 12 electric capacity, the 13 electric capacity and the first chip SY8088; One end of described 11 electric capacity is held with the VIN of described first chip SY8088 and is connected, and as the input of described second reduction voltage circuit; One end of described 8th resistance R4 is connected with one end of described 12 electric capacity, and accesses one end of described 9th resistance; The other end ground connection of described 9th resistance; The FB termination of described first chip SY8088 enters one end of described 9th resistance; The SW end of described first chip SY8088 accesses the other end of described 8th resistance through described 3rd inductance; And the other end of described 8th resistance is also connected with the other end of described 12 electric capacity, and access one end of described 13 electric capacity, and as the output of described second reduction voltage circuit.
4. a kind of POS power supply circuits adopting single lithium battery according to claim 1, is characterized in that: described 3rd reduction voltage circuit comprises: the tenth resistance, the 11 resistance, the 14 electric capacity, the 15 electric capacity and chip APL5930; The VIN end of described chip APL5930 is connected with one end of described 14 electric capacity, and as the input of described 3rd reduction voltage circuit; The other end ground connection of described 14 electric capacity; The VCNTL termination of described chip APL5930 enters the VIN end of described chip APL5930; One end of described tenth resistance is connected with one end of described 11 resistance, and accesses the FB end of described chip APL5930; The other end of described tenth resistance is held with the VOUT1 of described chip APL5930 and is connected, and as the output of described 3rd reduction voltage circuit; And the VOUT2 of described chip APL5930 holds to hold with the VOUT1 of described chip APL5930 and is connected; One end of described 15 electric capacity is connected with the output of described 3rd reduction voltage circuit, and the other end is connected with the other end of described 11 resistance and ground connection; The EX_PAD of described chip APL5930 holds ground connection;
4th reduction voltage circuit comprises: the 16 to the 18 electric capacity, the 4th inductance, the 12 resistance, the 13 resistance and the second chip SY8088; The VIN end of described second chip SY8088 is connected with one end of described 16 electric capacity, and as the input of described 4th reduction voltage circuit; The other end ground connection of described 16 electric capacity; The EN end of described second chip SY8088 is held with the VIN of described second chip SY8088 and is connected; One end of described 12 resistance is connected with one end of described 17 electric capacity, and accesses one end of described 13 resistance; The other end ground connection of described 13 resistance; The FB termination of described second chip SY8088 enters one end of described 13 resistance; The other end of described 12 resistance is connected with the other end of described 17 electric capacity, and is connected with one end of described 4th inductance; One end of described 4th inductance is also connected with one end of described 18 electric capacity, and as the output of described 4th reduction voltage circuit; The other end of described 4th inductance is held with the SW of described second chip SY8088 and is connected; The other end ground connection of described 18 electric capacity.
5. a kind of POS power supply circuits adopting single lithium battery according to claim 1, is characterized in that: described lithium battery charging circuit comprises: the 14 to the 17 resistance, the 19 to the 21 electric capacity and chip MP2602; One end of described 19 electric capacity is held with the IN of described chip MP2602 and is connected, and as the input of described charging circuit; The other end of described 19 electric capacity is held with the EN of described chip MP2602 and is connected, and ground connection; One end of described 14 resistance is connected with one end of described 19 electric capacity; The other end of described 14 resistance is connected with one end of described 15 resistance, and accesses the NTC end of described chip MP2602; The other end ground connection of described 15 resistance; The SS end of described chip MP2602 is through the 20 capacity earth; The IBF end of described chip MP2602 is through the 16 grounding through resistance; The ISET end of described chip MP2602 is through the 17 grounding through resistance; The BATT end of described chip MP2602 is connected with one end of described 21 electric capacity, and as the output of described charging circuit; The other end ground connection of described 21 electric capacity.
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| CN201420729677.4U CN204316115U (en) | 2014-11-29 | 2014-11-29 | A kind of POS power supply circuits adopting single lithium battery |
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| CN201420729677.4U CN204316115U (en) | 2014-11-29 | 2014-11-29 | A kind of POS power supply circuits adopting single lithium battery |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106394024A (en) * | 2016-11-22 | 2017-02-15 | 重庆品胜科技有限公司 | Power supply circuit system for portable label printer and working method thereof |
| CN107480750A (en) * | 2017-07-27 | 2017-12-15 | 深圳市新国都支付技术有限公司 | A kind of USB flash disk power supply circuit and POS |
-
2014
- 2014-11-29 CN CN201420729677.4U patent/CN204316115U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106394024A (en) * | 2016-11-22 | 2017-02-15 | 重庆品胜科技有限公司 | Power supply circuit system for portable label printer and working method thereof |
| CN107480750A (en) * | 2017-07-27 | 2017-12-15 | 深圳市新国都支付技术有限公司 | A kind of USB flash disk power supply circuit and POS |
| CN107480750B (en) * | 2017-07-27 | 2020-10-23 | 深圳市新国都支付技术有限公司 | USB flash disk power supply circuit and POS machine |
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