CN204291039U - A kind of RJ45 interface circuit being applicable to switch - Google Patents
A kind of RJ45 interface circuit being applicable to switch Download PDFInfo
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- CN204291039U CN204291039U CN201420633565.9U CN201420633565U CN204291039U CN 204291039 U CN204291039 U CN 204291039U CN 201420633565 U CN201420633565 U CN 201420633565U CN 204291039 U CN204291039 U CN 204291039U
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- resistance
- sendaisle
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- interface
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Abstract
The utility model relates to the transmission field of digital information, discloses a kind of RJ45 interface circuit being applicable to switch.Described interface circuit comprises ethernet physical layer chip, RJ45 interface, network transformer chip; And described network transformer chip includes sendaisle and receive path, and described sendaisle also includes sendaisle input and sendaisle output, and described receive path also includes receive path input and receive path output; Send signal is connected to network transformer chip sendaisle input from ethernet physical layer chip, the sendaisle output through network transformer chip connects RJ45 interface; Received signal strength is connected to the receive path input of network transformer chip from RJ45 interface, and the receive path output through network transformer chip is connected to ethernet physical layer chip.This circuit has that volume is little, integrated level is high, connect advantage simple and low in energy consumption.
Description
Technical field
The utility model relates to the transmission field of digital information, refers to a kind of RJ45 interface circuit being applicable to switch especially.
Background technology
Interconnect port the most frequently used in the design of switch is RJ45 interface at present, i.e. the network interface of the common netting twine connection of every day use.For this network port, it is mainly used in the connection of 1 gigabit (1G), and its interface modes is called 1000base-t interface, adopts 2 pairs of differential lines to transmit 2 groups of differential signals to realize the transmitting-receiving of signal.The structure of the existing RJ45 interface circuit for switch as shown in Figure 1.
In RJ45 interface circuit as shown in Figure 1, PHY represents ethernet physical layer chip, and its effect upper layer data is converted to 2 differential signals transmitted applicable RJ45 network interface; RJ45 network interface is an external-connected port, and its effect facilitates netting twine to connect; And PHY connects RJ45 network interface by isolating transformer, the effect of isolating transformer is that the signal of PHY transmission and netting twine are carried out an isolation by the signal that RJ45 network interface transmits, prevent internal and external interference, improve the reliability of transmission, in order to filtering common mode interference, between isolating transformer and RJ45 network interface, be also serially connected with common mode inductance.
Prior art Problems existing is, isolating transformer and common mode inductance all adopt discrete component to build, make whole RJ45 interface circuit line complicated, take that area between plate is large, integrated level is low and power consumption is high.
Summary of the invention
In order to solve prior art Problems existing, the utility model provides a kind of RJ45 interface circuit being applicable to switch, has that volume is little, integrated level is high, connect advantage simple and low in energy consumption.
For solving the problems of the technologies described above, the utility model provides following technical scheme:
Be applicable to a RJ45 interface circuit for switch, comprise ethernet physical layer chip, RJ45 interface, also include network transformer chip, described ethernet physical layer chip connects RJ45 interface by network transformer chip;
Concrete, described network transformer chip includes sendaisle and receive path, and described sendaisle also includes sendaisle input and sendaisle output, and described receive path also includes receive path input and receive path output;
Concrete, send signal is connected to described network transformer chip sendaisle input from described ethernet physical layer chip, the sendaisle output through network transformer chip connects RJ45 interface; Received signal strength is connected to the receive path input of described network transformer chip from RJ45 interface, and the receive path output through network transformer chip is connected to ethernet physical layer chip;
Concrete, described sendaisle input, sendaisle output, receive path input and receive path output all include a positive differential holding wire and a negative differential signal line.
Further, described RJ45 interface circuit also includes the first matching network be connected with network transformer chip receive path output; The second matching network be connected with network transformer chip sendaisle input; The 3rd matching network be connected with RJ45 interface.
Preferably but be not limited to, described first matching network includes the first resistance, the second resistance and the first filter capacitor, described first resistance and the second resistance are connected positive differential holding wire and the negative differential signal line of the receive path output of described network transformer chip respectively, and described first resistance and the second resistance other end are by the first filter capacitor ground connection;
Preferably but be not limited to, described second matching network comprises the 3rd resistance, the 4th resistance and the second filter capacitor, described 3rd resistance and the 4th resistance are connected positive differential holding wire and the negative differential signal line of the sendaisle input of described network transformer chip respectively, and described 3rd resistance and the 4th resistance other end are by the second filter capacitor ground connection.
Preferably but be not limited to, described 3rd matching network comprises the 6th resistance, the 7th resistance and the 3rd filter capacitor, and described 6th resistance is connected with RJ45 interface with the 7th resistance one end, and described 6th resistance and the 7th resistance other end pass through the 3rd filter capacitor ground connection.
The utility model compared with prior art, its remarkable advantage is: a kind of RJ45 interface circuit being applicable to switch that the utility model provides, what adopt is that integrated level is high and the Ethernet transformer chip that volume is little, instead of bulky discrete transformer and common mode inductance in prior art, this utility model has that volume is little, integrated level is high, connect advantage simple and low in energy consumption;
Further, a kind of RJ45 interface circuit being applicable to switch that the utility model provides, the first matching network is connected with network transformer chip receive path output, be connected with the second matching network with network transformer chip sendaisle input, be connected with the 3rd matching network with RJ45 interface; Owing to adding impedance matching in circuit, make can not increase return loss in signals transmission, and ensure that the efficiency of transmission of signal.
Above-mentioned explanation is only the general introduction of technical solutions of the utility model, in order to technological means of the present utility model can be better understood, and can be implemented according to the content of specification, and can become apparent to allow above and other object of the present utility model, feature and advantage, below especially exemplified by preferred embodiment, and coordinate accompanying drawing, be described in detail as follows.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme in the utility model embodiment, below the accompanying drawing used required in describing embodiment is briefly introduced, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is the structured flowchart of the RJ45 interface circuit being applicable to switch in prior art;
Fig. 2 is the structured flowchart of the RJ45 interface circuit being applicable to switch in the utility model;
Fig. 3 is the circuit theory diagrams of embodiment one in the utility model;
Fig. 4 is the cut-away view of the network transformer chip U1 described in Fig. 3.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, the technical solution of the utility model is clearly and completely described.Based on the embodiment in the utility model, those of ordinary skill in the art, not making the every other embodiment obtained under creative work prerequisite, belong to the scope of protection of the invention.
embodiment 1:
As shown in Figure 3, the present embodiment provides a kind of RJ45 interface circuit being applicable to switch, comprise ethernet physical layer chip, RJ45 interface, also include network transformer chip U1, described ethernet physical layer chip connects RJ45 interface by network transformer chip U1; In the present embodiment, network transformer chip U1 preferably adopts Bothhand company of U.S. model to be the chip of 16PT8520X, and this chip internal is integrated with two transformers and two common mode inductances, and for convenience of understanding, accompanying drawing 4 is the cut-away view of this chip.As shown in Figure 4, the sendaisle input of this chip connects the elementary two ends of the first transformer, sendaisle input positive differential holding wire TD+, sendaisle input negative differential signal line TD-respectively, the secondary two ends of this first transformer are connected with the first common mode inductance, and the other end of the first common mode inductance connects the sendaisle output positive differential holding wire TX+ of this chip, sendaisle output negative differential signal line TX-respectively; Receive path input positive differential holding wire RX+ and the receive path input negative differential signal line RX-of this chip are connected with the second common mode inductance, the other end of the second common mode inductance connects the secondary of the second transformer, and the receive path output positive differential holding wire RD+ of elementary this chip of connection of the second transformer and receive path output negative differential signal line RD-.And the primary center tap of the first transformer and the second transformer to be interconnected be that the CT of this chip holds, it is that the CMGND of this chip holds that the secondary centre tap of the first transformer and the second transformer is interconnected.Transformer in this chip can realize the effect of common-mode isolation and differential mode coupling, and the common mode disturbances in the common mode inductance energy filtered signal be connected in series with transformer.The length, width and height of this chip are respectively 20.30mm, 9.70mm and 6.80mm, add that the volume of two common mode inductances is much smaller relative to two transformers, and relative to the discrete transformer of employing and common mode inductance, the degree of coupling wants better, and whole circuit connects simpler.In the embodiment shown in fig. 3, the CT of network transformer chip U1 end by high-frequency filter capacitor C3 ground connection, for the High-frequency Interference in the primary coil of inner first transformer of filtering chip U1 and the second transformer.
During this circuit specific works, send signal is connected to the sendaisle input of described network transformer chip U1 positive and negative differential signal line TD+, TD-from described ethernet physical layer chip PHY, network transformer chip U1 is used for signal to carry out being coupled, amplifying and export to cable interface after transformation, and positive differential holding wire TX+ and the negative differential signal line TX-of the sendaisle output of network transformer chip U1 are connected the E2 end of RJ45 interface, E1 end respectively; Received signal strength holds from the E6 of RJ45 interface and E3 holds the positive differential holding wire RX+, the negative differential signal line RX-that are connected respectively to the receive path input of described network transformer chip U1; After carrying out coupling and transformation by network transformer chip U1, then be connected to ethernet physical layer chip through the positive differential holding wire RD+ of the receive path output of network transformer chip U1 and negative differential signal line RD-.
Further, described RJ45 interface circuit also includes the first matching network be connected with network transformer chip receive path output; The second matching network be connected with network transformer chip sendaisle input; The 3rd matching network be connected with RJ45 interface.Matching network makes can not increase return loss in signals transmission, and ensure that the efficiency of transmission of signal.
Preferably but be not limited to, first matching network includes the first resistance R1, the second resistance R2 and the first filter capacitor C1, described first resistance R1 and the second resistance R2 are connected positive differential holding wire RD+ and the negative differential signal line RD-of the receive path output of described network transformer chip U1 respectively, and described first resistance R1 and the second resistance R2 other end are by the first filter capacitor C1 ground connection; First filter capacitor C1 is by the High-frequency Interference filtering in signal.
Preferably but be not limited to, second matching network comprises the 3rd resistance R3, the 4th resistance R4 and the second filter capacitor C2, described 3rd resistance R2 and the 4th resistance R4 are connected positive differential holding wire TD+ and the negative differential signal line TD-of the sendaisle input of described network transformer chip U1 respectively, described 3rd resistance R3 and the 4th resistance R4 other end are by the second filter capacitor C2 ground connection, and the second filter capacitor C2 is by the High-frequency Interference filtering in signal.
Preferably but be not limited to, 3rd matching network comprises the 6th resistance R6, the 7th resistance R7 and the 3rd filter capacitor C4, described 6th resistance R6 is connected with RJ45 interface with the 7th resistance R7 one end, and described 6th resistance R6 and the 7th resistance R7 other end are by the 3rd filter capacitor C4 ground connection.The CMGND end of network transformer chip U1 is connected with the 6th resistance R6 by current-limiting resistance R5, damages RJ45 interface for preventing electric current excessive.
Above-described execution mode, does not form the restriction to this technical scheme protection range.The amendment done within any spirit at above-mentioned execution mode and principle, equivalently to replace and improvement etc., within the protection range that all should be included in this technical scheme.
Claims (4)
1. one kind is applicable to the RJ45 interface circuit of switch, comprise ethernet physical layer chip, RJ45 interface, it is characterized in that: described in be applicable to switch RJ45 interface circuit also include network transformer chip, described ethernet physical layer chip connects RJ45 interface by network transformer chip;
Described network transformer chip includes sendaisle and receive path, and described sendaisle also includes sendaisle input and sendaisle output, and described receive path also includes receive path input and receive path output;
Send signal is connected to described network transformer chip sendaisle input from described ethernet physical layer chip, the sendaisle output through network transformer chip connects RJ45 interface;
Received signal strength is connected to the receive path input of described network transformer chip from RJ45 interface, and the receive path output through network transformer chip is connected to ethernet physical layer chip;
And described sendaisle input, sendaisle output, receive path input and receive path output all include a positive differential holding wire and a negative differential signal line.
2. a kind of RJ45 interface circuit being applicable to switch as claimed in claim 1, is characterized in that: described RJ45 interface circuit also includes the first matching network be connected with network transformer chip receive path output; The second matching network be connected with network transformer chip sendaisle input; The 3rd matching network be connected with RJ45 interface.
3. a kind of RJ45 interface circuit being applicable to switch as claimed in claim 2, it is characterized in that: described first matching network includes the first resistance, the second resistance and the first filter capacitor, described first resistance and the second resistance are connected positive differential holding wire and the negative differential signal line of the receive path output of described network transformer chip respectively, and described first resistance and the second resistance other end are by the first filter capacitor ground connection;
Described second matching network comprises the 3rd resistance, the 4th resistance and the second filter capacitor, described 3rd resistance and the 4th resistance are connected positive differential holding wire and the negative differential signal line of the sendaisle input of described network transformer chip respectively, and described 3rd resistance and the 4th resistance other end are by the second filter capacitor ground connection.
4. a kind of RJ45 interface circuit being applicable to switch as claimed in claim 2, it is characterized in that: described 3rd matching network comprises the 6th resistance, the 7th resistance and the 3rd filter capacitor, described 6th resistance is connected with RJ45 interface with the 7th resistance one end, and described 6th resistance and the 7th resistance other end are by the 3rd filter capacitor ground connection.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420633565.9U CN204291039U (en) | 2014-10-29 | 2014-10-29 | A kind of RJ45 interface circuit being applicable to switch |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420633565.9U CN204291039U (en) | 2014-10-29 | 2014-10-29 | A kind of RJ45 interface circuit being applicable to switch |
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| Publication Number | Publication Date |
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| CN204291039U true CN204291039U (en) | 2015-04-22 |
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| CN201420633565.9U Expired - Fee Related CN204291039U (en) | 2014-10-29 | 2014-10-29 | A kind of RJ45 interface circuit being applicable to switch |
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Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107332675A (en) * | 2017-07-31 | 2017-11-07 | 博为科技有限公司 | PoE equipment without network transformer |
| CN107579832A (en) * | 2017-07-31 | 2018-01-12 | 博为科技有限公司 | Ethernet interface telecommunication circuit without network transformer |
| CN109032032A (en) * | 2018-08-22 | 2018-12-18 | 重庆华医康道科技有限公司 | Laboratory network equipment access system |
| CN111131087A (en) * | 2019-12-13 | 2020-05-08 | 威创集团股份有限公司 | Transmission system and signal transmission method for Ethernet physical layer signal |
| CN111381190A (en) * | 2020-03-02 | 2020-07-07 | 优利德科技(中国)股份有限公司 | Novel digital network line searching device and method |
| CN112559421A (en) * | 2020-12-24 | 2021-03-26 | 西安翔腾微电子科技有限公司 | Program-controlled 1394 signal switching circuit |
| CN112637089A (en) * | 2020-12-09 | 2021-04-09 | 锐捷网络股份有限公司 | Switch |
-
2014
- 2014-10-29 CN CN201420633565.9U patent/CN204291039U/en not_active Expired - Fee Related
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107332675A (en) * | 2017-07-31 | 2017-11-07 | 博为科技有限公司 | PoE equipment without network transformer |
| CN107579832A (en) * | 2017-07-31 | 2018-01-12 | 博为科技有限公司 | Ethernet interface telecommunication circuit without network transformer |
| CN107579832B (en) * | 2017-07-31 | 2023-11-28 | 博为科技有限公司 | Ethernet port communication circuit without network transformer |
| CN109032032A (en) * | 2018-08-22 | 2018-12-18 | 重庆华医康道科技有限公司 | Laboratory network equipment access system |
| CN111131087A (en) * | 2019-12-13 | 2020-05-08 | 威创集团股份有限公司 | Transmission system and signal transmission method for Ethernet physical layer signal |
| CN111381190A (en) * | 2020-03-02 | 2020-07-07 | 优利德科技(中国)股份有限公司 | Novel digital network line searching device and method |
| CN112637089A (en) * | 2020-12-09 | 2021-04-09 | 锐捷网络股份有限公司 | Switch |
| CN112637089B (en) * | 2020-12-09 | 2023-03-21 | 锐捷网络股份有限公司 | Switch |
| CN112559421A (en) * | 2020-12-24 | 2021-03-26 | 西安翔腾微电子科技有限公司 | Program-controlled 1394 signal switching circuit |
| CN112559421B (en) * | 2020-12-24 | 2023-05-05 | 西安翔腾微电子科技有限公司 | Program control 1394 signal switching circuit |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150422 Termination date: 20151029 |
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| EXPY | Termination of patent right or utility model |