CN204290948U - Anti-radio reception interfered circuit and radio equipment - Google Patents
Anti-radio reception interfered circuit and radio equipment Download PDFInfo
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- CN204290948U CN204290948U CN201420847840.7U CN201420847840U CN204290948U CN 204290948 U CN204290948 U CN 204290948U CN 201420847840 U CN201420847840 U CN 201420847840U CN 204290948 U CN204290948 U CN 204290948U
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Abstract
The utility model discloses a kind of anti-radio reception interfered circuit, comprise microprocessor, frequency error factor control module and PWM control module.The invention also discloses a kind of radio equipment, comprise Switching Power Supply and above-mentioned anti-radio reception interfered circuit.The utility model is by preset radio reception frequency in microprocessor, mapping relations between the level combinations three of supply frequency and microprocessor two signal output parts, microprocessor exports the level combinations corresponding with current radio reception frequency to frequency error factor control module according to the current radio reception frequency received and these mapping relations, by frequency error factor control module control PWM control module, the operating frequency of Switching Power Supply is switched to the supply frequency corresponding with the level combinations that microprocessor exports, to make the operating frequency of Switching Power Supply different from current radio reception frequency, the two does not interfere with each other, thus can evade or reduce the interference of Switching Power Supply to radio equipment, improve the antijamming capability of radio equipment.
Description
Technical field
The utility model relates to electronic equipment Anti-Jamming Technique field, particularly relates to a kind of anti-radio reception interfered circuit and radio equipment.
Background technology
In electronic product, so-called interference, just refers to that another system of systematic influence makes another system normally work, and general interference source all shows as same frequency interference, and the path of interference is: interference source → interference path → disturbed target.Usually the impact of interference on target is reduced from following three aspects:
(1) reduce the interference power of interference source, as shielding interference source, do not allow the external radiation interference signals of interference source; (2) turning off interference path, as increased magnetic bead or ground connection on the transmit path, allowing interference signal change path in transmitting procedure; (3) protecting target makes it not disturbed, as shielding target, does not allow target be disturbed by external interference signal.
At present, broadcast receiver uses linear power supply to power to avoid interference usually, if reason uses Switching Power Supply to power, can produce serious interference to wireless medium wave radio reception frequency (520KHz-1710KHz).The operating frequency of general Switching Power Supply is tens to hundreds of KHz, according to electromagnetic theory knowledge, Switching Power Supply operating frequency also can send many harmonic waves, the odd of these different frequencies and even-order harmonic, such as 3,5,7 times of equifrequents just in time drop in wireless medium wave radio reception frequency range, and these frequency harmonics can directly be received by radio antenna.Therefore, when broadcast receiver, high power acoustics system use medium wave amplitude modulation function of radio receiver, need one of them problem solved is exactly how to reduce the interference of power supply to radio system.
Traditional discrete device amplitude-modulation receiver cost is high, lower tone, although take microprocessor as the radio system digitlization of core, coordinate Switching Power Supply and class D power amplifier and the digital am radio system that forms has the features such as tonequality is good, channel selection is convenient, but because the operating frequency harmonic wave of Switching Power Supply is very close to medium wave radio reception frequency, the odd harmonic of Switching Power Supply is by severe jamming medium wave radio reception frequency, have a strong impact on radio system, particularly affect the receiving sensitivity of radio system, thus the antijamming capability improving digital am radio system seems and is even more important.
Utility model content
Main purpose of the present utility model is to evade or reduce the interference of Switching Power Supply to radio equipment, improves the antijamming capability of radio equipment.
In order to achieve the above object, the utility model provides a kind of anti-radio reception interfered circuit, this anti-radio reception interfered circuit is for preventing Switching Power Supply to the interference of radio equipment, and described anti-radio reception interfered circuit comprises microprocessor, frequency error factor control module and PWM control module, two inputs of described frequency error factor control module are connected with two signal output parts of described microprocessor respectively, and two outputs of described frequency error factor control module all arrange to hold with the frequency of oscillation of described PWM control module and are connected, wherein, the preset radio reception frequency of described microprocessor, mapping relations between the level combinations three of supply frequency and microprocessor two signal output parts, described microprocessor exports the level combinations corresponding with described current radio reception frequency to described frequency error factor control module according to the current radio reception frequency received and described mapping relations by two signal output parts, the level combinations that described frequency error factor control module exports according to described microprocessor, control described PWM control module and the operating frequency of Switching Power Supply is switched to the supply frequency corresponding with the level combinations that described microprocessor exports, to make the operating frequency of Switching Power Supply different from current radio reception frequency.
Preferably, described frequency error factor control module comprises the first switch unit and the second switch unit, the input of described first switch unit is connected with the first signal output part of described microprocessor, and the output of described first switch unit arranges to hold with the frequency of oscillation of described PWM control module and is connected; The input of described second switch unit is connected with the secondary signal output of described microprocessor, and the output of described second switch unit arranges to hold with the frequency of oscillation of described PWM control module and is connected; The conducting when described first signal output part exports high level signal of described first switch unit, turn off when described first signal output part output low level signal, the conducting when described secondary signal output exports high level signal of described second switch unit, turn off when described secondary signal output output low level signal, to control the operating frequency of described PWM control module diverter switch power supply.
Preferably, described first switch unit comprises the first feeder ear, the first photoelectrical coupler, the first electronic switch, the first resistance and the second resistance;
The anode of the primary diode of described first photoelectrical coupler is connected with the first signal output part of described microprocessor, the minus earth of the primary diode of described first photoelectrical coupler, the collector electrode of the secondary triode of described first photoelectrical coupler is connected with described first feeder ear, the emitter of the secondary triode of described first photoelectrical coupler is connected with the first end of described first electronic switch, and via described first grounding through resistance; Second end of described first electronic switch arranges to hold with the frequency of oscillation of described PWM control module via described second resistance and is connected, the 3rd end ground connection of described first electronic switch.
Preferably, described first electronic switch is a NPN triode, the base stage of a described NPN triode is the first end of described first electronic switch, second end of very described first electronic switch of current collection of a described NPN triode, the 3rd end of very described first electronic switch of transmitting of a described NPN triode.
Preferably, described first switch unit also comprises the 3rd resistance, the 4th resistance, the 5th resistance, the first electric capacity and the second electric capacity;
Described one end of 3rd resistance is connected with the first signal output part of described microprocessor, the other end of described 3rd resistance is via described 4th grounding through resistance, and described 3rd resistance is connected with the anode of the primary diode of described first photoelectrical coupler with the common port of described 4th resistance; One end of described first electric capacity is connected with the common port of described 3rd resistance and described 4th resistance, the other end ground connection of described first electric capacity;
One end of described 5th resistance is connected with described first feeder ear, and the other end of described 5th resistance is connected with the collector electrode of the secondary triode of described first photoelectrical coupler; One end of described second electric capacity is connected with the first end of described first electronic switch, the other end ground connection of described second electric capacity.
Preferably, described second switch unit comprises the second feeder ear, the second photoelectrical coupler, the second electronic switch, the 6th resistance and the 7th resistance;
The anode of the primary diode of described second photoelectrical coupler is connected with the secondary signal output of described microprocessor, the minus earth of the primary diode of described second photoelectrical coupler, the collector electrode of the secondary triode of described second photoelectrical coupler is connected with described second feeder ear, the emitter of the secondary triode of described second photoelectrical coupler is connected with the first end of described second electronic switch, and via described 6th grounding through resistance; Second end of described second electronic switch arranges to hold with the frequency of oscillation of described PWM control module via described 7th resistance and is connected, the 3rd end ground connection of described second electronic switch.
Preferably, described second electronic switch is the 2nd NPN triode, the base stage of described 2nd NPN triode is the first end of described second electronic switch, second end of very described second electronic switch of current collection of described 2nd NPN triode, the 3rd end of very described second electronic switch of transmitting of described 2nd NPN triode.
Preferably, described second switch unit also comprises the 8th resistance, the 9th resistance, the tenth resistance, the 3rd electric capacity and the 4th electric capacity;
Described one end of 8th resistance is connected with the secondary signal output of described microprocessor, the other end of described 8th resistance is via described 9th grounding through resistance, and described 8th resistance is connected with the anode of the primary diode of described second photoelectrical coupler with the common port of described 9th resistance; One end of described 3rd electric capacity is connected with the common port of described 8th resistance and described 9th resistance, the other end ground connection of described 3rd electric capacity;
One end of described tenth resistance is connected with described second feeder ear, and the other end of described tenth resistance is connected with the collector electrode of the secondary triode of described second photoelectrical coupler; One end of described 4th electric capacity is connected with the first end of described second electronic switch, the other end ground connection of described 4th electric capacity.
Preferably, described PWM control module comprises PWM controller, the 11 resistance, the 12 resistance and the 5th electric capacity;
The frequency of oscillation of described PWM controller arranges pin and is connected with the output of described first switch unit and the output of described second switch unit respectively; One end of described 11 resistance arranges pin with the frequency of oscillation of described PWM controller and is connected, and modulates pin via described 12 resistance with the clock rate of described PWM controller and be connected, the other end ground connection of described 11 resistance; Described one end of 5th electric capacity is modulated pin with the clock rate of described PWM controller and is connected, the other end ground connection of described 5th electric capacity.
In addition, in order to achieve the above object, the utility model also provides a kind of radio equipment, this radio equipment comprises Switching Power Supply and anti-radio reception interfered circuit, this anti-radio reception interfered circuit is for preventing Switching Power Supply to the interference of radio equipment, and described anti-radio reception interfered circuit comprises microprocessor, frequency error factor control module and PWM control module, two inputs of described frequency error factor control module are connected with two signal output parts of described microprocessor respectively, and two outputs of described frequency error factor control module all arrange to hold with the frequency of oscillation of described PWM control module and are connected, wherein, the preset radio reception frequency of described microprocessor, mapping relations between the level combinations three of supply frequency and microprocessor two signal output parts, described microprocessor exports the level combinations corresponding with described current radio reception frequency to described frequency error factor control module according to the current radio reception frequency received and described mapping relations by two signal output parts, the level combinations that described frequency error factor control module exports according to described microprocessor, control described PWM control module and the operating frequency of Switching Power Supply is switched to the supply frequency corresponding with the level combinations that described microprocessor exports, to make the operating frequency of Switching Power Supply different from current radio reception frequency.
Anti-radio reception interfered circuit of the present utility model and radio equipment, by radio reception frequency preset in microprocessor, mapping relations between the level combinations three of supply frequency and microprocessor two signal output parts, microprocessor exports the level combinations corresponding with current radio reception frequency to frequency error factor control module according to the current radio reception frequency received and these mapping relations, by frequency error factor control module control PWM control module, the operating frequency of Switching Power Supply is switched to the supply frequency corresponding with the level combinations that microprocessor exports, to make the operating frequency of Switching Power Supply different from current radio reception frequency, the operating frequency of Switching Power Supply and current radio reception frequency are not interfere with each other, thus can evade or reduce the interference of Switching Power Supply to radio equipment, improve the antijamming capability of radio equipment.
Accompanying drawing explanation
Fig. 1 is the theory diagram of the utility model anti-radio reception interfered circuit preferred embodiment;
Fig. 2 is the utility model anti-radio reception interfered circuit preferred embodiment electrical block diagram.
The realization of the purpose of this utility model, functional characteristics and advantage, will in conjunction with the embodiments, and be described further with reference to accompanying drawing.
Embodiment
Should be appreciated that specific embodiment described herein only in order to explain the utility model, and be not used in restriction the utility model.
The utility model provides a kind of anti-radio reception interfered circuit, and this anti-radio reception interfered circuit is applied to radio equipment, such as, have the consumer electronics product (as mobile phone), sound equipment, broadcast receiver etc. of function of radio receiver.
With reference to the theory diagram that Fig. 1, Fig. 1 are the preferred embodiment of the utility model anti-radio reception interfered circuit.
In the utility model preferred embodiment, anti-radio reception interfered circuit of the present utility model is for preventing Switching Power Supply to the interference of radio equipment, and this anti-radio reception interfered circuit comprises microprocessor 100, frequency error factor control module 200 and PWM control module 300; Two inputs of frequency error factor control module 200 are connected with two signal output parts of microprocessor 100 respectively, and two outputs of frequency error factor control module 200 all arrange to hold with the frequency of oscillation of PWM control module 300 and are connected.
Wherein, the preset radio reception frequency of microprocessor 100, mapping relations between the level combinations three of two signal output parts of supply frequency and microprocessor 100, in practical application, when user utilizes radio equipment channel searching, microprocessor 100 will receive radio reception frequency corresponding to channel that user's current search arrives, namely microprocessor 100 receives current radio reception frequency, due to the preset radio reception frequency of microprocessor 100, mapping relations between the level combinations three of two signal output parts of supply frequency and microprocessor 100, microprocessor 100 is according to the current radio reception frequency received and above-mentioned mapping relations, the level combinations corresponding with current radio reception frequency is exported to frequency error factor control module 200 by two signal output parts of microprocessor 100, the level combinations that frequency error factor control module 200 exports according to microprocessor 100, the operating frequency of Switching Power Supply is switched to the supply frequency corresponding with the level combinations that microprocessor 100 exports by control PWM control module 300, to make the operating frequency of Switching Power Supply different from current radio reception frequency, wherein, described level combinations can be low and high level, high high level and the combination of low low level, this is not restricted herein.
Because the medium wave radio reception frequency of each country is relatively fixing, the whole world is divided into two large systems, namely often walks 9KHz and often walks 10KHz two kinds.Therefore, when radio equipment presets corresponding sales region in advance, just can know corresponding frequency interval (9KHz or 10KHz), also the frequency range of corresponding medium wave radio reception frequency the country one belongs to is just known, as in China, medium wave radio reception frequency range is 531KHz to 1620KHz, and frequency interval is 9KHz.
Find through test, when radio reception frequency is at below 999KHz, the higher switching frequency (as 110KHz) of Switching Power Supply can make the receiving sensitivity of radio equipment higher; When radio reception frequency is higher than 1008KHz, the lower switching frequency (as 80KHz) of Switching Power Supply can make the receiving sensitivity of radio equipment higher.In experimental test procedures, by testing full frequency band 531-1620KHz (9KHz cadence) and 530-1710KHz (10KHz cadence) and obtaining the receiving sensitivity data of radio equipment at all Frequency points, the present embodiment is as shown in table 1 below to be described with full frequency band 531-1620KHz (9KHz cadence), in table 1, " √ " represents that the receiving sensitivity of radio equipment is high, "×" represents that the receiving sensitivity of radio equipment is low, table 1 be can refer to for the situation taking 10KHz as cadence, concrete be that cadence is similar with 9KHz, therefore not to repeat here.Take 9KHz as cadence, then 531-1620KHz has 122 channels, the receiving sensitivity that known each channel is corresponding is by experiment different, thus the receiving sensitivity data of correspondence are different, as being respectively 68dBu, 70dBu, 80dBu etc., when testing, the operating frequency of different Switching Power Supplies, the receiving sensitivity of radio equipment also can be different.
Such as, if when radio reception frequency is 530KHz, when Switching Power Supply frequency is 100KHz, now testing the receiving sensitivity obtained is 68dBu; And when Switching Power Supply frequency is 120KHz, now testing the receiving sensitivity obtained is 75dBu, then show that this operating frequency of 120KHz is that 530KHz has obvious interference to radio reception frequency, reduces receiving sensitivity 7dBu.At this moment, when can determine that radio reception frequency is 530KHz, Switching Power Supply uses 100KHz operating frequency, and the receiving sensitivity of radio equipment can be made higher.
Experimentally test data, shown in mapping relations table 1 specific as follows between the level combinations three of two signal output parts of radio reception frequency, supply frequency and the microprocessor 100 that the present embodiment is preset in microprocessor 100, logical one in table 1 in " level combinations " row represents high level, logical zero represents low level, and the unit of radio reception frequency and supply frequency is KHz.
The mapping relations of table 1 radio reception frequency, supply frequency and level combinations and the receiving sensitivity data of correspondence
Continued 1
Continued 1
According to the corresponding relation of data each in table 1, the corresponding relation of each data in preset above-mentioned table 1 in microprocessor 100, thus when radio equipment automatic search or user receive channel searching, microprocessor 100 will judge the radio reception frequency that succeeding channel is corresponding in advance, and the corresponding relation of each data is determined according to table 1 data, different level combinations will be exported for different radio reception frequencies, such as, when searching 1620KHz, microprocessor 100 judges that the level combinations that export is as " 11 ", namely two signal output parts of microprocessor 100 all export high level.
Relative to prior art, anti-radio reception interfered circuit of the present utility model, by microprocessor 100 according to the current radio reception frequency received, and preset radio reception frequency, mapping relations between the level combinations three of two signal output parts of supply frequency and microprocessor 100, export the level combinations corresponding with current radio reception frequency to frequency error factor control module 200, by frequency error factor control module 200 control PWM control module 300, the operating frequency of Switching Power Supply is switched to the supply frequency corresponding with the level combinations that microprocessor 100 exports, to make the operating frequency of Switching Power Supply different from current radio reception frequency, the operating frequency of Switching Power Supply and current radio reception frequency are not interfere with each other, thus can evade or reduce the interference of Switching Power Supply to radio equipment, improve the antijamming capability of radio equipment.
The utility model does not need closing switch power supply (i.e. interference source), the radio system of mask switch power supply or radio equipment is not needed yet, but pass through the operating frequency of diverter switch power supply, make the operating frequency of Switching Power Supply different from the current radio reception frequency of radio equipment, the operating frequency of Switching Power Supply and current radio reception frequency are not interfere with each other, evade or reduce the interference of Switching Power Supply to radio equipment, the current radio reception frequency of the interference signal namely making Switching Power Supply radiate and radio equipment does not show as interference, the interference signal that Switching Power Supply radiates does not affect the receiving sensitivity of radio equipment, thus the antijamming capability of radio equipment can be improved.
Particularly, as shown in Figure 1, frequency error factor control module 200 comprises the first switch unit 210 and the second switch unit 220, the input of the first switch unit 210 is connected with the first signal output part of microprocessor 100, first signal output part of microprocessor 100 can be a universal input/input port of microprocessor 100, and output and the frequency of oscillation of PWM control module 300 of the first switch unit 210 arrange to hold and be connected; The input of the second switch unit 220 is connected with the secondary signal output of microprocessor 100, the secondary signal output of microprocessor 100 can be a universal input/input port of microprocessor 100, and output and the frequency of oscillation of PWM control module 300 of the second switch unit 220 arrange to hold and be connected; The conducting when the first signal output part exports high level signal of first switch unit 210, turn off when the first signal output part output low level signal, the conducting when secondary signal output exports high level signal of second switch unit 220, turn off when secondary signal output output low level signal, with the operating frequency of control PWM control module 300 diverter switch power supply.
When microprocessor 100 receives current radio reception frequency, microprocessor 100 is according to the current radio reception frequency received, and preset radio reception frequency, mapping relations between the level combinations three of supply frequency and microprocessor 100 two signal output parts, the level combinations corresponding with current radio reception frequency is exported to the first switch unit 210 and the second switch unit 220 in frequency error factor control module 200 respectively by the first signal output part of microprocessor 100 and secondary signal output, specifically comprise by the first signal output part output low level signal to the first switch unit 210, secondary signal output output low level signal, be " 00 " according to the known level combinations now of table 1, or by the first signal output part output low level signal to the first switch unit 210, secondary signal output exports high level signal, is " 01 " according to the known level combinations now of table 1, or export high level signal to the first switch unit 210 by the first signal output part, secondary signal output output low level signal is " 10 " according to the known level combinations now of table 1, or exporting high level signal to the first switch unit 210, secondary signal output IO2 by the first signal output part and export high level signal, is " 11 " according to the known level combinations now of table 1.
The first switch unit 210 conducting when the first switch unit 210 receives high level signal, when the first switch unit 210 receives low level signal, the first switch unit 210 turns off, the second switch unit 220 conducting when the second switch unit 220 receives high level signal, when the second switch unit 220 receives low level signal, the second switch unit 220 turns off, the concrete four kinds of level combinations corresponding to microprocessor 100 and export, first switch unit 210 and the second switch unit 220 have four kinds of break-make assembled state, namely when the level combinations exported when microprocessor 100 is " 00 ", first switch unit 210 and the second switch unit 220 turn off simultaneously, now control PWM control module 300 operating frequency of Switching Power Supply can be switched to the supply frequency corresponding with level combinations " 00 ", when the level combinations that microprocessor 100 exports is " 01 ", the first switch unit 210 turns off, the second switch unit 220 conducting, now control PWM control module 300 operating frequency of Switching Power Supply can be switched to the supply frequency corresponding with level combinations " 01 ", when the level combinations that microprocessor 100 exports is " 10 ", the first switch unit 210 conducting, the second switch unit 220 turns off, and now control PWM control module 300 operating frequency of Switching Power Supply can be switched to the supply frequency corresponding with level combinations " 10 ", when the level combinations that microprocessor 100 exports is " 11 ", first switch unit 210 and the conducting simultaneously of the second switch unit 220, now control PWM control module 300 can switch to the supply frequency corresponding with level combinations " 11 " by the operating frequency of Switching Power Supply.
From the above, corresponding to four kinds of level combinations that microprocessor 100 exports, the operating frequency of the changeable Switching Power Supply of PWM control module 300 is four kinds of supply frequencies, and these four kinds of supply frequencies are supply frequencies that the preset level combinations exported with microprocessor 100 of microprocessor 100 and radio reception frequency form mapping relations.The operating frequency of PWM control module 300 pairs of Switching Power Supplies switches, and make the operating frequency of Switching Power Supply different from current radio reception frequency, the two does not interfere with each other, thus the operating frequency of Switching Power Supply can be avoided the impact of current radio reception frequency.
Refer again to Fig. 2, Fig. 2 is the utility model anti-radio reception interfered circuit preferred embodiment electrical block diagram.
Particularly, the first switch unit 210 comprises the first feeder ear VFB, the first photoelectrical coupler U1, the first electronic switch Q1, the first resistance R1 and the second resistance R2.
The anode of the primary diode of the first photoelectrical coupler U1 is connected with the first signal output part IO1 of microprocessor 100, the minus earth of the primary diode of the first photoelectrical coupler U1, the collector electrode of the secondary triode of the first photoelectrical coupler U1 is connected with the first feeder ear VFB, the emitter of the secondary triode of the first photoelectrical coupler U1 is connected with the first end of the first electronic switch Q1, and via the first resistance R1 ground connection; Second end of the first electronic switch Q1 arranges to hold with the frequency of oscillation of PWM control module 300 via the second resistance R2 and is connected, the 3rd end ground connection of the first electronic switch Q1.
Particularly, first electronic switch Q1 is a NPN triode, the base stage of the one NPN triode is the first end of the first electronic switch Q1, second end of the current collection of a NPN triode very the first electronic switch Q1, the 3rd end of the transmitting of a NPN triode very the first electronic switch Q1.
Particularly, the first switch unit 210 also comprises the 3rd resistance R3, the 4th resistance R4, the 5th resistance R5, the first electric capacity C1 and the second electric capacity C2.
One end of 3rd resistance R3 is connected with the first signal output part IO1 of microprocessor 100, the other end of the 3rd resistance R3 is via the 4th resistance R4 ground connection, and the 3rd resistance R3 is connected with the anode of the primary diode of the first photoelectrical coupler U1 with the common port of the 4th resistance R4; One end of first electric capacity C1 is connected with the common port of the 3rd resistance R3 and the 4th resistance R4, the other end ground connection of the first electric capacity C1.
One end of 5th resistance R5 is connected with the first feeder ear VFB, and the other end of the 5th resistance R5 is connected with the collector electrode of the secondary triode of the first photoelectrical coupler U1; One end of second electric capacity C2 is connected with the first end of the first electronic switch Q1, the other end ground connection of the second electric capacity C2.
Particularly, the second switch unit 210 comprises the second feeder ear VFP, the second photoelectrical coupler U2, the second electronic switch Q2, the 6th resistance R6 and the 7th resistance R7.The voltage that first feeder ear VFB and the second feeder ear VFP input can be identical, also can be different, as long as the voltage that the first feeder ear VFB inputs can drive the first photoelectrical coupler U1 to work, the voltage that the second feeder ear VFP inputs can drive the second photoelectrical coupler U2 to work.
The anode of the primary diode of the second photoelectrical coupler U2 is connected with the secondary signal output IO2 of microprocessor 100, the minus earth of the primary diode of the second photoelectrical coupler U2, the collector electrode of the secondary triode of the second photoelectrical coupler U2 is connected with the second feeder ear VFP, the emitter of the secondary triode of the second photoelectrical coupler U2 is connected with the first end of the second electronic switch Q2, and via the 6th resistance R6 ground connection; Second end of the second electronic switch Q2 arranges to hold with the frequency of oscillation of PWM control module 300 via the 7th resistance R7 and is connected, the 3rd end ground connection of the second electronic switch Q2.
Particularly, second electronic switch Q2 is the 2nd NPN triode, the base stage of the 2nd NPN triode is the first end of the second electronic switch Q2, second end of the current collection of the 2nd NPN triode very the second electronic switch Q2, the 3rd end of the transmitting of the 2nd NPN triode very the second electronic switch Q2.
Particularly, the second switch unit 210 also comprises the 8th resistance R8, the 9th resistance R9, the tenth resistance R10, the 3rd electric capacity C3 and the 4th electric capacity C4.
One end of 8th resistance R8 is connected with the secondary signal output IO2 of microprocessor 100, the other end of the 8th resistance R8 is via the 9th resistance R9 ground connection, and the 8th resistance R8 is connected with the anode of the primary diode of the second photoelectrical coupler U2 with the common port of the 9th resistance R9; One end of 3rd electric capacity C3 is connected with the common port of the 8th resistance R8 and the 9th resistance R9, the other end ground connection of the 3rd electric capacity C3.
One end of tenth resistance R10 is connected with the second feeder ear VFP, and the other end of the tenth resistance R10 is connected with the collector electrode of the secondary triode of the second photoelectrical coupler U2; One end of 4th electric capacity C4 is connected with the first end of the second electronic switch Q2, the other end ground connection of the 4th electric capacity C4.
Particularly, PWM control module 300 comprises PWM controller U3, the 11 resistance R11, the 12 resistance R12 and the 5th electric capacity C5.
The frequency of oscillation of PWM controller U3 arranges pin OCS and is connected with the output of the first switch unit 210 and the output of the second switch unit 220 respectively, concrete as in Fig. 2, the frequency of oscillation of PWM controller U3 arranges pin OCS and is connected with the collector electrode of the first electronic switch Q1 via the second resistance R2, and the 7th resistance R7 is connected with the collector electrode of the first electronic switch Q2; One end and the frequency of oscillation of PWM controller U3 of the 11 resistance R11 arrange pin OCS and are connected, and modulate pin FMOD via the 12 resistance R12 with the clock frequency of PWM controller U3 and be connected, the other end ground connection of the 11 resistance R11; One end of 5th electric capacity C5 is connected with the clock FMOD frequency modulation(FM) pin of PWM controller U3, the other end ground connection of the 5th electric capacity C5.
The operation principle of the utility model anti-radio reception interfered circuit is specific as follows:
Microprocessor 100 data according to preset table 1, for different radio reception frequencies, microprocessor 100 exports different level combinations by by the first signal output part IO1 and secondary signal output IO2.When the first signal output part IO1 of microprocessor 100 exports high level signal, the primary diode of the first photoelectrical coupler U1 is luminous, make the secondary triode ON of the first photoelectrical coupler U1, now the base stage of the first electronic switch Q1 is owing to obtaining voltage and saturation conduction, after first electronic switch Q1 saturation conduction, resistance between the collector electrode of the first electronic switch Q1 and emitter becomes very little, second resistance R2 is equivalent to short circuit over the ground, be equivalent to the second resistance R2 in parallel with the 11 resistance R11, due to the second resistance R2 in parallel with the 11 resistance R11 after total resistance value diminish, PWM controller U3 and the 5th electric capacity C5 can be affected after this total resistance value diminishes, 11 resistance R11, the frequency of oscillation of the oscillation circuit that the 12 resistance R12 is formed, thus the operating frequency of Switching Power Supply will be changed.
When the first signal output part IO1 output low level signal of microprocessor 100, the primary diode cut-off of the first photoelectrical coupler U1, make the secondary triode cut-off of the first photoelectrical coupler U1, now the first electronic switch Q1 due to base stage be that low level is ended, after first electronic switch Q1 ends, resistance between the collector electrode of the first electronic switch Q1 and emitter becomes very large, second resistance R2 is equivalent to open a way over the ground, now the second resistance R2 does not form parallel relationship with the 11 resistance R11, total resistance value is constant, PWM controller U3 and the 5th electric capacity C5, 11 resistance R11, the frequency of oscillation of the oscillation circuit that the 12 resistance R12 is formed is also just constant, namely Switching Power Supply operating frequency is constant.
In like manner, when the secondary signal output IO2 pin of microprocessor 100 exports high level signal, the primary diode of the second photoelectrical coupler U2 is luminous, make the secondary triode ON of the second photoelectrical coupler U2, now the base stage of the second electronic switch Q2 is owing to obtaining voltage and saturation conduction, after second electronic switch Q2 saturation conduction, resistance between the collector electrode of the second electronic switch Q2 and emitter becomes very little, 7th resistance R7 is equivalent to short circuit over the ground, be equivalent to the 7th resistance R7 in parallel with the 11 resistance R11, total resistance value after 7th resistance R7 is in parallel with the 11 resistance R11 will diminish, PWM controller U3 and the 5th electric capacity C5 can be affected after this total resistance value diminishes, 11 resistance R11, the frequency of oscillation of the oscillation circuit that the 12 resistance R12 is formed, thus the operating frequency of Switching Power Supply will be changed.
When the secondary signal output IO2 output low level signal of microprocessor 100, the primary diode cut-off of the second photoelectrical coupler U2, make the secondary triode cut-off of the second photoelectrical coupler U2, now the second electronic switch Q2 due to base stage be that low level is ended, after second electronic switch Q2 ends, resistance between the collector electrode of the second electronic switch Q2 and emitter becomes very large, 7th resistance R7 is equivalent to open a way over the ground, now the 7th resistance R7 does not form parallel relationship with the 11 resistance R11, total resistance value is constant, PWM controller U3 and the 5th electric capacity C5, 11 resistance R11, the frequency of oscillation of the oscillation circuit that the 12 resistance R12 is formed is also just constant, namely Switching Power Supply operating frequency is constant.
From the above, when the equal output low level signal of the first signal output part IO1 and secondary signal output IO2, the frequency of oscillation of the oscillation circuit that PWM controller U3 and the 5th electric capacity C5, the 11 resistance R11, the 12 resistance R12 are formed is determined by the resistance of the 11 resistance R11, according to table 1, now frequency of oscillation is adjusted to 80KHz by PWM controller U3, and namely the operating frequency of Switching Power Supply switches to 80KHz; When the first signal output part IO1 output low level signal, when secondary signal output IO2 exports high level signal, total resistance value after the frequency of oscillation of the oscillation circuit that PWM controller U3 is formed with the 5th electric capacity C5, the 11 resistance R11, the 12 resistance R12 is in parallel by the 7th resistance R7 and the 11 resistance R11 is determined, according to table 1, now frequency of oscillation is adjusted to 100KHz by PWM controller U3, and namely the operating frequency of Switching Power Supply switches to 100KHz; When the first signal output part IO1 exports high level signal, during secondary signal output IO2 output low level signal, total resistance value after the frequency of oscillation of the oscillation circuit that PWM controller U3 is formed with the 5th electric capacity C5, the 11 resistance R11, the 12 resistance R12 is in parallel by the second resistance R2 and the 11 resistance R11 is determined, according to table 1, now frequency of oscillation is adjusted to 120KHz by PWM controller U3, and namely the operating frequency of Switching Power Supply switches to 120KHz; When the first signal output part IO1 and secondary signal output IO2 all exports high level signal, total resistance value after PWM controller U3 is in parallel by the second resistance R2, the 7th resistance R7 and the 11 resistance R11 with the frequency of oscillation of the oscillation circuit that the 5th electric capacity C5, the 11 resistance R11, the 12 resistance R12 are formed is determined, according to table 1, now frequency of oscillation is adjusted to 140KHz by PWM controller U3, and namely the operating frequency of Switching Power Supply switches to 140KHz.
The utility model also provides this radio equipment a kind of to comprise Switching Power Supply and anti-radio reception interfered circuit, this anti-radio reception interfered circuit is for preventing Switching Power Supply to the interference of radio equipment, the circuit structure of this anti-radio reception interfered circuit, operation principle and the beneficial effect that brings, all with reference to above-described embodiment, repeat no more herein.
The foregoing is only preferred embodiment of the present utility model; not thereby the scope of the claims of the present utility model is limited; every utilize the utility model specification and accompanying drawing content to do equivalent structure or equivalent flow process conversion; or be directly or indirectly used in other relevant technical fields, be all in like manner included in scope of patent protection of the present utility model.
Claims (10)
1. an anti-radio reception interfered circuit, for preventing Switching Power Supply to the interference of radio equipment, is characterized in that, described anti-radio reception interfered circuit comprises microprocessor, frequency error factor control module and PWM control module, two inputs of described frequency error factor control module are connected with two signal output parts of described microprocessor respectively, and two outputs of described frequency error factor control module all arrange to hold with the frequency of oscillation of described PWM control module and are connected, wherein, the preset radio reception frequency of described microprocessor, mapping relations between the level combinations three of supply frequency and microprocessor two signal output parts, described microprocessor exports the level combinations corresponding with described current radio reception frequency to described frequency error factor control module according to the current radio reception frequency received and described mapping relations by two signal output parts, the level combinations that described frequency error factor control module exports according to described microprocessor, control described PWM control module and the operating frequency of Switching Power Supply is switched to the supply frequency corresponding with the level combinations that described microprocessor exports, to make the operating frequency of Switching Power Supply different from current radio reception frequency.
2. anti-radio reception interfered circuit as claimed in claim 1, it is characterized in that, described frequency error factor control module comprises the first switch unit and the second switch unit, the input of described first switch unit is connected with the first signal output part of described microprocessor, and the output of described first switch unit arranges to hold with the frequency of oscillation of described PWM control module and is connected; The input of described second switch unit is connected with the secondary signal output of described microprocessor, and the output of described second switch unit arranges to hold with the frequency of oscillation of described PWM control module and is connected; The conducting when described first signal output part exports high level signal of described first switch unit, turn off when described first signal output part output low level signal, the conducting when described secondary signal output exports high level signal of described second switch unit, turn off when described secondary signal output output low level signal, to control the operating frequency of described PWM control module diverter switch power supply.
3. anti-radio reception interfered circuit as claimed in claim 2, is characterized in that, described first switch unit comprises the first feeder ear, the first photoelectrical coupler, the first electronic switch, the first resistance and the second resistance;
The anode of the primary diode of described first photoelectrical coupler is connected with the first signal output part of described microprocessor, the minus earth of the primary diode of described first photoelectrical coupler, the collector electrode of the secondary triode of described first photoelectrical coupler is connected with described first feeder ear, the emitter of the secondary triode of described first photoelectrical coupler is connected with the first end of described first electronic switch, and via described first grounding through resistance; Second end of described first electronic switch arranges to hold with the frequency of oscillation of described PWM control module via described second resistance and is connected, the 3rd end ground connection of described first electronic switch.
4. anti-radio reception interfered circuit as claimed in claim 3, it is characterized in that, described first electronic switch is a NPN triode, the base stage of a described NPN triode is the first end of described first electronic switch, second end of very described first electronic switch of current collection of a described NPN triode, the 3rd end of very described first electronic switch of transmitting of a described NPN triode.
5. anti-radio reception interfered circuit as claimed in claim 3, is characterized in that, described first switch unit also comprises the 3rd resistance, the 4th resistance, the 5th resistance, the first electric capacity and the second electric capacity;
Described one end of 3rd resistance is connected with the first signal output part of described microprocessor, the other end of described 3rd resistance is via described 4th grounding through resistance, and described 3rd resistance is connected with the anode of the primary diode of described first photoelectrical coupler with the common port of described 4th resistance; One end of described first electric capacity is connected with the common port of described 3rd resistance and described 4th resistance, the other end ground connection of described first electric capacity;
One end of described 5th resistance is connected with described first feeder ear, and the other end of described 5th resistance is connected with the collector electrode of the secondary triode of described first photoelectrical coupler; One end of described second electric capacity is connected with the first end of described first electronic switch, the other end ground connection of described second electric capacity.
6. anti-radio reception interfered circuit as claimed in claim 2, is characterized in that, described second switch unit comprises the second feeder ear, the second photoelectrical coupler, the second electronic switch, the 6th resistance and the 7th resistance;
The anode of the primary diode of described second photoelectrical coupler is connected with the secondary signal output of described microprocessor, the minus earth of the primary diode of described second photoelectrical coupler, the collector electrode of the secondary triode of described second photoelectrical coupler is connected with described second feeder ear, the emitter of the secondary triode of described second photoelectrical coupler is connected with the first end of described second electronic switch, and via described 6th grounding through resistance; Second end of described second electronic switch arranges to hold with the frequency of oscillation of described PWM control module via described 7th resistance and is connected, the 3rd end ground connection of described second electronic switch.
7. anti-radio reception interfered circuit as claimed in claim 6, it is characterized in that, described second electronic switch is the 2nd NPN triode, the base stage of described 2nd NPN triode is the first end of described second electronic switch, second end of very described second electronic switch of current collection of described 2nd NPN triode, the 3rd end of very described second electronic switch of transmitting of described 2nd NPN triode.
8. anti-radio reception interfered circuit as claimed in claim 6, is characterized in that, described second switch unit also comprises the 8th resistance, the 9th resistance, the tenth resistance, the 3rd electric capacity and the 4th electric capacity;
Described one end of 8th resistance is connected with the secondary signal output of described microprocessor, the other end of described 8th resistance is via described 9th grounding through resistance, and described 8th resistance is connected with the anode of the primary diode of described second photoelectrical coupler with the common port of described 9th resistance; One end of described 3rd electric capacity is connected with the common port of described 8th resistance and described 9th resistance, the other end ground connection of described 3rd electric capacity;
One end of described tenth resistance is connected with described second feeder ear, and the other end of described tenth resistance is connected with the collector electrode of the secondary triode of described second photoelectrical coupler; One end of described 4th electric capacity is connected with the first end of described second electronic switch, the other end ground connection of described 4th electric capacity.
9. anti-radio reception interfered circuit as claimed in claim 2, is characterized in that, described PWM control module comprises PWM controller, the 11 resistance, the 12 resistance and the 5th electric capacity;
The frequency of oscillation of described PWM controller arranges pin and is connected with the output of described first switch unit and the output of described second switch unit respectively; One end of described 11 resistance arranges pin with the frequency of oscillation of described PWM controller and is connected, and modulates pin via described 12 resistance with the clock rate of described PWM controller and be connected, the other end ground connection of described 11 resistance; Described one end of 5th electric capacity is modulated pin with the clock rate of described PWM controller and is connected, the other end ground connection of described 5th electric capacity.
10. a radio equipment, comprises Switching Power Supply, it is characterized in that, described radio equipment also comprises the anti-radio reception interfered circuit in claim 1 to 9 described in any one, and described anti-radio reception interfered circuit is for preventing Switching Power Supply to the interference of radio equipment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420847840.7U CN204290948U (en) | 2014-12-26 | 2014-12-26 | Anti-radio reception interfered circuit and radio equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420847840.7U CN204290948U (en) | 2014-12-26 | 2014-12-26 | Anti-radio reception interfered circuit and radio equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204290948U true CN204290948U (en) | 2015-04-22 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420847840.7U Withdrawn - After Issue CN204290948U (en) | 2014-12-26 | 2014-12-26 | Anti-radio reception interfered circuit and radio equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204290948U (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105790780A (en) * | 2014-12-26 | 2016-07-20 | Tcl通力电子（惠州）有限公司 | Circuit for preventing radio interference and radio equipment |
| CN106910454A (en) * | 2017-05-09 | 2017-06-30 | 广东欧珀移动通信有限公司 | The display panel control circuit of electronic installation, display screen and electronic installation |
| WO2017197844A1 (en) * | 2016-05-20 | 2017-11-23 | 广东百事泰电子商务股份有限公司 | Control chip for integrated system of photovoltaic inverter |
-
2014
- 2014-12-26 CN CN201420847840.7U patent/CN204290948U/en not_active Withdrawn - After Issue
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105790780A (en) * | 2014-12-26 | 2016-07-20 | Tcl通力电子（惠州）有限公司 | Circuit for preventing radio interference and radio equipment |
| CN105790780B (en) * | 2014-12-26 | 2018-05-18 | Tcl通力电子（惠州）有限公司 | Anti- radio reception interference circuit and radio equipment |
| WO2017197844A1 (en) * | 2016-05-20 | 2017-11-23 | 广东百事泰电子商务股份有限公司 | Control chip for integrated system of photovoltaic inverter |
| CN106910454A (en) * | 2017-05-09 | 2017-06-30 | 广东欧珀移动通信有限公司 | The display panel control circuit of electronic installation, display screen and electronic installation |
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