CN204287846U - A kind of multimode sequential control circuit - Google Patents
A kind of multimode sequential control circuit Download PDFInfo
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- CN204287846U CN204287846U CN201420767914.6U CN201420767914U CN204287846U CN 204287846 U CN204287846 U CN 204287846U CN 201420767914 U CN201420767914 U CN 201420767914U CN 204287846 U CN204287846 U CN 204287846U
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- circuit
- nmos tube
- sequential control
- delay circuit
- control circuit
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Abstract
The utility model discloses a kind of multimode sequential control circuit, comprise and each module delay circuit and shaping circuit one to one, the input end of described delay circuit is connected with signal detection end, output terminal is connected with the input end of shaping circuit, and the output terminal of described shaping circuit is connected with the Enable Pin of module corresponding to it.Multimode sequential control circuit of the present utility model, adopt delay circuit to build in conjunction with shaping circuit, circuit structure is simple, highly sensitive, reduces cost of products.
Description
Technical field
The utility model belongs to time sequence adjusting circuit technical field, specifically, relates to a kind of multimode sequential control circuit.
Background technology
Current electronic device product needs usually to comprise multiple module according to function.When system is opened and turn off, because the signal of multiple module associates, need the control of a sequential.The most usual control mode adopts different modules to carry out power supply segmentation at present, then control each power module.Each module has a control signal.So often need a MCU, for managing and controlling each power module, complicacy and the cost of system will be increased.
Summary of the invention
The utility model needs to adopt single-chip microcomputer to control to solve existing multimode sequential control, cause the problem that cost of products is high, propose a kind of multimode sequential control circuit, employing stable performance, cheap electron device are built into control circuit, circuit structure is simple, highly sensitive, reduce cost of products.
In order to solve the problems of the technologies described above, the utility model is achieved by the following technical solutions:
A kind of multimode sequential control circuit, comprise and each module delay circuit and shaping circuit one to one, the input end of described delay circuit is connected with signal detection end, and output terminal is connected with the input end of shaping circuit, and the output terminal of described shaping circuit is connected with the Enable Pin of module corresponding to it.
Preferably, described delay circuit comprises RC circuit.
Further, described delay circuit comprises start delay circuit and turning-off delay circuit, described start delay circuit comprises a RC circuit and the first on-off circuit for controlling a described RC circuit turn-on state, and described turning-off delay circuit comprises the 2nd RC circuit and the second switch circuit for controlling described 2nd RC circuit turn-on state.
Further again, a described RC circuit comprises the first resistance, described first resistance and described first switching circuit in series, and described 2nd RC circuit comprises the second resistance, described second resistance and described second switch circuit connected in series, a described RC circuit and the 2nd RC circuit share electric capacity.
Further, described first on-off circuit is one of them in the first diode, the first NMOS tube or a NPN triode, the conducting when described sense terminal exports high level of described first on-off circuit, described second switch circuit is one of them in the second diode, the second NMOS tube or the 2nd NPN triode, the conducting when described sense terminal output low level of described second switch circuit.
Preferably, described shaping circuit comprises the two-stage phase-veversal switch circuit connected in turn mutually.
Further, described shaping circuit comprises the 3rd NMOS tube and the 4th NOMS manages, the grid of described 3rd NMOS tube is connected with the output terminal of described start delay circuit and turning-off delay circuit, the drain electrode of described 3rd NMOS tube is leaded up to the first pull-up resistor and is connected with direct supply, an other road is connected with the grid of the 4th NMOS tube, the source electrode of described 3rd NMOS tube connects earth terminal, the drain electrode of described 4th NMOS tube is leaded up to the second divider resistance and is connected with direct supply, an other road is connected with the Enable Pin of module corresponding to it, the source electrode of described 4th NMOS tube connects earth terminal.
Or described shaping circuit comprises the first phase inverter and the second phase inverter that connect in turn mutually.
Compared with prior art, advantage of the present utility model and good effect are: multimode sequential control circuit of the present utility model, adopt delay circuit to build in conjunction with shaping circuit, thus realize the unlatching of module and turn off sequential, circuit structure is simple, highly sensitive, reduces cost of products.
After reading the detailed description of the utility model embodiment by reference to the accompanying drawings, other features of the present utility model and advantage will become clearly.
Accompanying drawing explanation
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, be briefly described to the accompanying drawing used required in embodiment or description of the prior art below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, other accompanying drawing can also be obtained according to these accompanying drawings.
Fig. 1 is a kind of embodiment functional-block diagram of the multimode sequential control circuit that the utility model proposes;
Fig. 2 is a kind of embodiment functional-block diagram of delay circuit in the multimode sequential control circuit that proposes of the utility model;
Fig. 3 is a kind of embodiment circuit theory diagrams of the multimode sequential control circuit that the utility model proposes;
Fig. 4 is another the embodiment circuit theory diagrams of the multimode sequential control circuit that the utility model proposes;
Fig. 5 is another the embodiment circuit theory diagrams of the multimode sequential control circuit that the utility model proposes.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Embodiment one, the present embodiment proposes a kind of multimode sequential control circuit, as shown in Figure 1, comprise delay circuit and shaping circuit, described delay circuit and shaping circuit and each module connect one to one, if also namely need to control multiple module, just need to arrange a set of sequential control circuit respectively to each module, the input end of delay circuit is connected with signal detection end, sense terminal is used for the plug state of detecting joint and produces detection signal, output terminal is connected with the input end of shaping circuit, the output terminal of described shaping circuit is connected with the Enable Pin of module corresponding to it.The multimode sequential control circuit of the present embodiment, delay circuit is adopted to build in conjunction with shaping circuit, only use limited electronic component, such as, described delay circuit can adopt RC circuit realiration, circuit structure is simple, be conducive to reducing cost of products, and by adjusting the parameter value of delay circuit, can realize adjusting delay duration, can need according to the time delay of disparate modules the electronic component selecting different parameters value, control electronics highly sensitive.
As a preferred embodiment, controlled respectively with shutdown time delay in order to realize each module start time delay, described delay circuit comprises start delay circuit and turning-off delay circuit, as shown in Figure 2, described start delay circuit comprises a RC circuit and the first on-off circuit for controlling a described RC circuit turn-on state, and described turning-off delay circuit comprises the 2nd RC circuit and the second switch circuit for controlling described 2nd RC circuit turn-on state.By the resistance parameter of resistance in adjustment RC circuit, the controlled of delay circuit institute time delay length can be realized, start delay circuit and turning-off delay circuit are arranged respectively, start delay duration and the shutdown delay duration of this module can be set respectively, and then the difference realizing each module start delay duration and shutdown delay duration is controlled.
In the present embodiment, in order to simplify the structure of this sequential control circuit further, reduce the use of electronic component, as shown in Figure 3, give the sequential control circuit of one of them module, a described RC circuit comprises the first resistance R1, described first resistance R1 and the first switching circuit in series, described 2nd RC circuit comprises the second resistance R2, described second resistance R2 and second switch circuit connected in series, and a described RC circuit and the 2nd RC circuit share electric capacity C1.Share electric capacity C1 by two RC circuit, the value that can adjust the first resistance R1 and the second resistance R2 respectively realizes start shooting delay duration and the controlled of delay duration of shutting down.When the signal that the sense terminal equipment that detects inserts, export high level, now the first on-off circuit conducting, second switch circuit ends, therefore, now the first resistance R1 and electric capacity C1 forms RC circuit, and electric capacity C1 charges, and its charging rate is relevant with the capacitance of electric capacity CI with the resistance of the first resistance R1, when electric capacity C1 charges to certain electric charge, shaping circuit exports the Enable Pin of high level to module, and this module is effective status, achieves electric-opening in this module time delay.As a same reason, when the signal that the sense terminal equipment of detecting is pulled up, output low level, now the first on-off circuit cut-off, second switch circuit turn-on, therefore, now the second resistance R2 and electric capacity C1 forms RC circuit, electric capacity C1 charges, its charging rate is relevant with the capacitance of electric capacity C1 with the resistance of the second resistance R2, and when electric capacity C1 charges to certain electric charge, shaping circuit output low level is to the Enable Pin of module, this module is disarmed state, achieves this module time delay power down and quits work.One of them embodiment circuit theory diagrams of on-off circuit in multimode sequential control circuit have been shown in Fig. 3, described first on-off circuit adopts the first diode D1 to realize, described second switch circuit adopts the second diode D2 to realize, the anode of described first diode D1 is connected with sense terminal, the first diode D1 conducting when described sense terminal exports high level, and then the work of start delay circuit, the negative electrode of described second diode D2 is connected with sense terminal, described second diode D2 conducting when described sense terminal output low level, and then turning-off delay circuit work.
The multimode sequential control circuit of the present embodiment, by opening each module, shutdown circuit is respectively arranged with a RC delay circuit and controls, due to the discharge and recharge timeconstantτ=R × C of RC circuit, only need adjust corresponding R or C parameter value, intermodule can be realized open, shutdown sequential, such as, the time constant of the start delay circuit (being also a RC circuit) of module 1 is τ 1, wherein τ 1=R1 × C1, the time constant of turning-off delay circuit (being also the 2nd RC circuit) is τ 2, wherein τ 2=R2 × C1, the time constant of the start delay circuit of module 2 is τ 3, the time constant of turning-off delay circuit is τ 4, if make module 1 open early than module 2, the timeconstantτ 1 of the start delay circuit of module 1 is only needed to be less than the timeconstantτ 3 of the start delay circuit of module 2, if make module 1 be later than module 2 to close, the timeconstantτ 2 of the turning-off delay circuit of module 1 is only needed to be greater than the discharge and recharge timeconstantτ 4 of module 2.
Embodiment two, this gives the another one embodiment circuit theory diagrams of the on-off circuit in multimode sequential control circuit, as shown in Figure 4, described first on-off circuit adopts the first NMOS tube Q1 to realize, described second switch circuit adopts the second NMOS tube Q2 to realize, the grid 1 of described first NMOS tube Q1 is connected with sense terminal, grid 1 is connected with drain electrode 3, source electrode 2 is connected with the first resistance R1, the source electrode of the second NMOS tube Q2 is connected with sense terminal by the second resistance R2, grid 1 and drain electrode 3 connect earth terminal by electric capacity C1, described first NMOS tube Q1 is when described sense terminal exports high level, grid 1 voltage is greater than source electrode 2 voltage, and then the first NMOS tube Q1 conducting, the work of start delay circuit, and source electrode 2 voltage of the second NMOS tube Q2 is greater than grid 1 voltage, therefore the second NMOS tube Q2 cut-off, turning-off delay circuit turns off, otherwise, when sense terminal output low level, described second NMOS tube Q2 conducting, and then turning-off delay circuit work, first NMOS tube Q1 cut-off, start delay circuit turns off.
It should be noted that, on-off circuit, except NMOS tube that the present embodiment adopts realizes, can also adopt NPN type triode to realize, no longer specifically describe in this present embodiment.
In the present embodiment, described shaping circuit comprises the two-stage phase-veversal switch circuit connected in turn mutually.As shown in Figure 4, show a kind of physical circuit schematic diagram of shaping circuit, in the present embodiment, shaping circuit comprises the 3rd NMOS tube Q3 and the 4th NOMS pipe Q4, the grid 1 of described 3rd NMOS tube Q3 is connected with the output terminal of described start delay circuit and turning-off delay circuit, the drain electrode 3 of described 3rd NMOS tube Q3 is leaded up to the first pull-up resistor R3 and is connected with direct supply Vcc1, an other road is connected with the grid 1 of the 4th NMOS tube Q4, the source electrode 2 of the 3rd NOMO pipe Q3 connects earth terminal, the drain electrode 3 of described 4th NMOS tube Q4 is leaded up to the second divider resistance R4 and is connected with direct supply Vcc2, an other road is connected with the Enable Pin EN of module corresponding to it.In the present embodiment, the principle of work of shaping circuit is, when the signal that the sense terminal equipment of not detecting is extracted, output low level, therefore the grid 1 of the 3rd NMOS tube Q3 is low level with the level of source electrode 2, therefore the 3rd NMOS tube Q3 cut-off, the drain electrode 3 of the 3rd NMOS tube Q3 is high level, the grid 1 of the 4th NMOS tube Q4 is connected with the drain electrode of the 3rd NMOS tube Q3, for high level, the source electrode 2 of the 4th NMOS tube Q4 connects earth terminal, for low level, therefore the 4th NMOS tube Q4 conducting, drain electrode 3 output low level of the 4th NMOS tube, the drain electrode 3 of the 4th NMOS tube Q4 is connected with the Enable Pin of its control module, therefore the Enable Pin input low level of this module.When the signal that the sense terminal equipment that detects inserts, export high level, the conducting of start delay circuit, electric capacity C1 charges, now the grid 1 of the 3rd NMOS tube Q3 is connected with the positive pole of electric capacity C1, when electric capacity C1 charges to certain quantity of electric charge, when making the cut-in voltage being greater than the 3rd NMOS tube Q3, the 3rd NMOS tube Q3 conducting, the level of its drain electrode 3 drags down, therefore the 4th NMOS tube Q4 cut-off, now, the drain electrode 3 of the 4th NMOS tube Q4 exports high level to the Enable Pin of its control module.When the signal that the sense terminal equipment of detecting is extracted, output voltage transfers low level to by high level, electric capacity C1 discharges, shutdown circuit conducting, when cut-in voltage value lower than the 3rd NMOS tube of the anode voltage of electric capacity, 3rd NMOS tube cut-off, drain electrode 3 level of the 3rd NMOS tube is drawn high, and therefore grid 1 level of the 4th NMOS tube is corresponding draws high, the 4th NMOS tube conducting, therefore drain electrode 2 level of the 4th NMOS tube drags down, to the Enable Pin output low level of its control module.
Embodiment three, this gives the another one embodiment circuit theory diagrams of the shaping circuit in multimode sequential control circuit, and other circuit parts are identical with structure described in embodiment one or embodiment two, and therefore not to repeat here.As shown in Figure 5, the shaping circuit of the present embodiment comprises the first phase inverter U1 and the second phase inverter U2 that connect in turn mutually, when the signal that the sense terminal equipment of not detecting is extracted, output low level, therefore the first phase inverter U1 input low level, high level is exported through the anti-phase backward second phase inverter U2 of the first phase inverter U1, second phase inverter U2 is again anti-phase by this high level, output low level, the output terminal of the second phase inverter U2 is connected with the Enable Pin of its control module, therefore the Enable Pin input low level of this module, module does not work on power.When the signal that the sense terminal equipment that detects inserts, export high level, the conducting of start delay circuit, electric capacity C1 charges, when electric capacity C1 charging certain hour, first phase inverter U1 input high level, anti-phase output low level, the second phase inverter U2 input low level, anti-phase output high level, also namely export high level to the Enable Pin of its control module, this module works on power.When the signal that the sense terminal equipment of detecting is extracted, output voltage transfers low level to by high level, electric capacity C1 discharges, shutdown circuit conducting, when the anode voltage of electric capacity is lower than the first phase inverter U1 incoming level thresholding, is judged to its input low level, the anti-phase output high level of first phase inverter U1, second phase inverter U2 carries out anti-phase output low level again, and therefore to the Enable Pin output low level of its control module, this module power down quits work.
Certainly; above-mentioned explanation is not to restriction of the present utility model; the utility model is also not limited in above-mentioned citing, the change that those skilled in the art make in essential scope of the present utility model, remodeling, interpolation or replacement, also should belong to protection domain of the present utility model.
Claims (8)
1. a multimode sequential control circuit, it is characterized in that: comprise and each module delay circuit and shaping circuit one to one, the input end of described delay circuit is connected with signal detection end, output terminal is connected with the input end of shaping circuit, and the output terminal of described shaping circuit is connected with the Enable Pin of module corresponding to it.
2. multimode sequential control circuit according to claim 1, is characterized in that: described delay circuit comprises RC circuit.
3. multimode sequential control circuit according to claim 1, it is characterized in that: described delay circuit comprises start delay circuit and turning-off delay circuit, described start delay circuit comprises a RC circuit and the first on-off circuit for controlling a described RC circuit turn-on state, and described turning-off delay circuit comprises the 2nd RC circuit and the second switch circuit for controlling described 2nd RC circuit turn-on state.
4. multimode sequential control circuit according to claim 3, it is characterized in that: a described RC circuit comprises the first resistance, described first resistance and described first switching circuit in series, described 2nd RC circuit comprises the second resistance, described second resistance and described second switch circuit connected in series, a described RC circuit and the 2nd RC circuit share electric capacity.
5. multimode sequential control circuit according to claim 4, it is characterized in that: described first on-off circuit is one of them in the first diode, the first NMOS tube or a NPN triode, the conducting when described sense terminal exports high level of described first on-off circuit, described second switch circuit is one of them in the second diode, the second NMOS tube or the 2nd NPN triode, the conducting when described sense terminal output low level of described second switch circuit.
6. multimode sequential control circuit according to claim 5, is characterized in that: described shaping circuit comprises the two-stage phase-veversal switch circuit connected in turn mutually.
7. multimode sequential control circuit according to claim 6, it is characterized in that: described shaping circuit comprises the 3rd NMOS tube and the 4th NOMS manages, the grid of described 3rd NMOS tube is connected with the output terminal of described start delay circuit and turning-off delay circuit, the drain electrode of described 3rd NMOS tube is leaded up to the first pull-up resistor and is connected with direct supply, an other road is connected with the grid of the 4th NMOS tube, the source electrode of described 3rd NMOS tube connects earth terminal, the drain electrode of described 4th NMOS tube is leaded up to the second divider resistance and is connected with direct supply, an other road is connected with the Enable Pin of module corresponding to it, the source electrode of described 4th NMOS tube connects earth terminal.
8. multimode sequential control circuit according to claim 6, is characterized in that: described shaping circuit comprises the first phase inverter and the second phase inverter that connect in turn mutually.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420767914.6U CN204287846U (en) | 2014-12-09 | 2014-12-09 | A kind of multimode sequential control circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420767914.6U CN204287846U (en) | 2014-12-09 | 2014-12-09 | A kind of multimode sequential control circuit |
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| CN204287846U true CN204287846U (en) | 2015-04-22 |
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| CN201420767914.6U Withdrawn - After Issue CN204287846U (en) | 2014-12-09 | 2014-12-09 | A kind of multimode sequential control circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104635569A (en) * | 2014-12-09 | 2015-05-20 | 青岛歌尔声学科技有限公司 | Multi-module time sequence control circuit |
-
2014
- 2014-12-09 CN CN201420767914.6U patent/CN204287846U/en not_active Withdrawn - After Issue
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104635569A (en) * | 2014-12-09 | 2015-05-20 | 青岛歌尔声学科技有限公司 | Multi-module time sequence control circuit |
| CN104635569B (en) * | 2014-12-09 | 2017-06-30 | 青岛歌尔声学科技有限公司 | A kind of multimode sequential control circuit |
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Legal Events
| Date | Code | Title | Description |
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| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20150422 Effective date of abandoning: 20170630 |
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| AV01 | Patent right actively abandoned |