CN204287793U - A kind of low-power dissipation power supply control circuit - Google Patents
A kind of low-power dissipation power supply control circuit Download PDFInfo
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- CN204287793U CN204287793U CN201420495297.9U CN201420495297U CN204287793U CN 204287793 U CN204287793 U CN 204287793U CN 201420495297 U CN201420495297 U CN 201420495297U CN 204287793 U CN204287793 U CN 204287793U
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Abstract
The utility model discloses a kind of low-power dissipation power supply control circuit, this circuit comprises triode Q1 and Q2, P channel MOS tube Q3, power supply BT1, power management chip U1 and a touch controlled key S1 of two NPN type; This circuit adopts battery to power, touch controlled key carries out trigging control to power initiation, two NPN triode Q1 and Q2 jointly control the grid of P channel MOS tube, reach low-power consumption and trigger startup, with the control object that need stop, when load power source closed by needs, power management chip U1 exports and becomes low level, triode Q2 enters cut-off state, the grid of P channel MOS tube is in noble potential, and metal-oxide-semiconductor is in cut-off state, and the supply of load circuit power supply is cut off, managing chip also enters the state of physics power down simultaneously, only has faint leakage current.
Description
Technical field
The utility model relates to a kind of low-power dissipation power supply control circuit.
Background technology
Along with the developing direction of electronics miniaturization and portability, the requirement of battery volume is also improved day by day, Large Copacity height continuation of the journey under traditional mode is gradually to low energy consumption height continuation of the journey development, and under this application scenario, the power control of a low-power consumption has application prospect.
Under current practical application, the power consumption exemplary currents employing the monoblock circuit board of the power control of low-power consumption is generally mA rank.On the embedded equipment using the portable energy source such as button cell, the power consumption of existing mA rank is still unsatisfactory; In the existing product can monitored on off state, under surveying state to be triggered, the existing product power consumption of ST master control is for being 36mA, the existing product power consumption of Texas Instrument MSP430 is 39.75mA, the existing product power consumption of auspicious Sa master control is 5.60mA, and though the main control chip of low-power dissipation power supply control device and peripheral cell are in low-power consumption mode but still in working order, this causes the serious consume in the life-span to whole low-power dissipation power supply control device; Meanwhile, under prior art, touch switch is often because the instability of self causes power supply by triggering repeatedly and closedown after the long period uses, and easily causes the maloperation problem of Energy control.
Utility model content
The utility model proposes a kind of low-power dissipation power supply control circuit, its object is to overcome the power control power consumption that exists in the above-mentioned prior art problem up to mA level and Energy control poor stability.
A kind of low-power dissipation power supply control circuit, comprises triode Q1 and Q2 of two NPN type, P channel MOS tube Q3, power supply BT1, power management chip U1 and a touch controlled key S1;
The positive pole of described power supply BT1 is connected with the stationary contact of touch controlled key S1 by resistance R1, and namely the moving contact of described touch controlled key S1 to be held with the negative pole of described power supply BT1 by resistance R3 and be connected;
The moving contact of described touch controlled key S1 also connects the base stage of triode Q1 by resistance R2, the collector of triode Q1 and Q2 is all connected to the grid of P channel MOS tube Q3, the equal ground connection of emitter of triode Q1 and Q2, the source electrode of P channel MOS tube Q3 connects the positive pole of power supply BT1, and the drain electrode of P channel MOS tube Q3 connects the negative pole being loaded to power supply BT1;
The positive pole of power supply BT1 is connected to the grid of P channel MOS tube Q3 by resistance R5, the power input VCC of power management chip U1 connects the drain electrode of P channel MOS tube, the earth terminal GND of power management chip U1 connects the negative pole of power supply BT1, and the level output end PCON of power management chip U1 is connected to the base stage of triode Q2 by resistance R4;
The indirect load RFZ of the emitter of described triode Q2 and the drain electrode of P channel MOS tube;
Described load RFZ is not defined as resistive load, conveniently illustrates, is equivalent to resistive load.
Described power management chip is by single-chip microcomputer or the embedded-type ARM break-make by programmed control current supply circuit, namely exports high level by the level output end PCON of power management chip U1 or low level realizes.
Electric capacity C1 is also provided with between the stationary contact of described touch controlled key S1 and the negative pole of power supply BT1.
This electric capacity plays a part to prevent key jitter (false triggering).
The course of work is as follows:
(1) when touch controlled key does not trigger, triode Q1 and Q2 all ends, and P channel MOS tube ends, and Power supply loop disconnects;
(2) after the triggering of touch controlled key, triode Q1 conducting, thus the conducting of control P channel MOS tube, starting power supply is that power management chip U1 powers, and exports high level or low level by power management chip U1 control level output terminal:
When power management chip U1 exports high level, the conducting of Power supply loop, power supply is that power source loads is powered;
Adopt touch controlled key power initiation is triggered, after trigger process completes, touch controlled key unclamp the normal work that also can not affect power supply, the maintenance power supply state of this circuit stability;
When power management chip U1 output low level, triode Q2 ends, and P channel MOS tube is ended, and power supply enters closed condition, and Power supply loop disconnects, and power supply stops powering for power source loads and power management chip.
When the peripheral signal that the timer in described power management chip U1 arrives setting-up time or power management chip U1 triggers low level output, the level output end PCON output low level of power management chip U1.
Beneficial effect
The utility model proposes a kind of low-power dissipation power supply control circuit, this circuit comprises triode Q1 and Q2, P channel MOS tube Q3, power supply BT1, power management chip U1 and a touch controlled key S1 of two NPN type; This circuit adopts battery to power, touch controlled key carries out trigging control to power initiation, two NPN triode Q1 and Q2 jointly control the grid of P channel MOS tube, reach low-power consumption and trigger startup, with the control object that need stop, when load power source closed by needs, power management chip U1 exports and becomes low level, triode Q2 enters cut-off state, the grid of P channel MOS tube is in noble potential, and metal-oxide-semiconductor is in cut-off state, and the supply of load circuit power supply is cut off, managing chip also enters the state of physics power down simultaneously, only has faint leakage current.Whole circuit structure solves the problem of power control power consumption up to mA level and Energy control poor stability simply, dexterously.
Under state to be triggered described in the utility model, power consumption can reach uA rank, under hinge structure, mA rank power control has the advantage on the order of magnitude, power supply power consumption under embedded device holding state can be reduced significantly, avoid unnecessary device loss, extend the life-span applying the equipment of this device.Good to switch compatibility, can use various non-self-lock-ing button, the course of work, to the no requirement (NR) of switch reliability, has good stability; By power management chip, power supply can be exported closedown as required simultaneously.In the actual test of the test sample applying this device, the standby current of below 70uA, also cannot have the situation of breakthrough within battery technology short-term under, this device for the optimization of user to battery experience effect, comparatively obviously.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of low-power dissipation power supply control circuit described in the utility model.
Embodiment
A kind of low-power dissipation power supply control circuit, comprises triode Q1 and Q2 of two NPN type, P channel MOS tube Q3, power supply BT1, power management chip U1 and a touch controlled key S1;
The positive pole of described power supply BT1 is connected with the stationary contact of touch controlled key S1 by resistance R1, and namely the moving contact of described touch controlled key S1 to be held with the negative pole of described power supply BT1 by resistance R3 and be connected;
The moving contact of described touch controlled key S1 also connects the base stage of triode Q1 by resistance R2, the collector of triode Q1 and Q2 is all connected to the grid of P channel MOS tube Q3, the equal ground connection of emitter of triode Q1 and Q2, the source electrode of P channel MOS tube Q3 connects the positive pole of power supply BT1, and the drain electrode of P channel MOS tube Q3 connects the negative pole being loaded to power supply BT1;
The positive pole of power supply BT1 is connected to the grid of P channel MOS tube Q3 by resistance R5, the power input VCC of power management chip U1 connects the drain electrode of P channel MOS tube, the earth terminal GND of power management chip U1 connects the negative pole of power supply BT1, and the level output end PCON of power management chip U1 is connected to the base stage of triode Q2 by resistance R4;
The load of described control device is connected between the emitter of triode Q2 and the drain electrode of P channel MOS tube.
3.3K resistance R1 and 47k resistance R3 is that the voltage of NPN triode Q1 plays dividing potential drop effect, in the firing state for triode Q1 provides safe base-on voltage, 10K resistance R2 and R4 limits the base current of triode Q1 and Q2 respectively, the collector current of 10K resistance R5 to triode Q2 limits, the stability that ensuring equipment runs.
Described power management chip is by single-chip microcomputer or the embedded-type ARM break-make by programmed control current supply circuit, namely exports high level by the level output end PCON of power management chip U1 or low level realizes.
Electric capacity C1 is also provided with between the stationary contact of described touch controlled key S1 and the negative pole of power supply BT1.
This electric capacity plays a part to prevent key jitter (false triggering).
The course of work is as follows:
(1) when touch controlled key does not trigger, triode Q1 and Q2 all ends, and P channel MOS tube ends, and Power supply loop disconnects;
Namely in the load circuit of power supply and power supply status managing chip theoretical value, no current passes through, and is in low-power consumption state to be triggered, and actual measurement only has on P channel MOS tube and creates weak current;
(2) after the triggering of touch controlled key, triode Q1 conducting, thus the conducting of control P channel MOS tube, starting power supply is that power management chip U1 powers, and exports high level or low level by power management chip U1 control level output terminal:
When power management chip U1 exports high level, the conducting of Power supply loop, power supply is that power source loads is powered;
When power management chip U1 output low level, triode Q2 ends, and P channel MOS tube is ended, and power supply enters closed condition, and Power supply loop disconnects, and power supply stops powering for power source loads and power management chip.
When the peripheral signal that the timer in described power management chip U1 arrives setting-up time or power management chip U1 triggers low level output, the level output end PCON output low level of power management chip U1.
Utilize circuit described in the utility model to control power supply, when actual measurement touch controlled key is to be triggered, the power consumption of this circuit is as shown in table 1:
Table 1
Test sample sequence number | Actual measurement standby current |
1 | 66.82uA |
2 | 66.76uA |
3 | 66.58uA |
4 | 65.87uA |
5 | 66.07uA |
6 | 66.72uA |
7 | 66.68uA |
8 | 66.52uA |
9 | 67.51uA |
10 | 67.96uA |
11 | 66.19uA |
12 | 66.64uA |
13 | 66.77uA |
14 | 66.72uA |
15 | 66.76uA |
16 | 67.10uA |
17 | 66.55uA |
18 | 67.14uA |
19 | 66.89uA |
20 | 66.70uA |
As can be seen from test result shown in table 1, circuit described in the utility model is to the low power consumption control successful of power supply, and when circuit is in state to be triggered, the power consumption of whole circuit is all in below 70uA, this substantially prolongs the service time of battery.
Claims (2)
1. a low-power dissipation power supply control circuit, is characterized in that, comprises triode Q1 and Q2 of two NPN type, P channel MOS tube Q3, power supply BT1, power management chip U1 and a touch controlled key S1;
The positive pole of described power supply BT1 is connected with the stationary contact of touch controlled key S1 by resistance R1, and namely the moving contact of described touch controlled key S1 to be held with the negative pole of described power supply BT1 by resistance R3 and be connected;
The moving contact of described touch controlled key S1 also connects the base stage of triode Q1 by resistance R2, the collector of triode Q1 and Q2 is all connected to the grid of P channel MOS tube Q3, the equal ground connection of emitter of triode Q1 and Q2, the source electrode of P channel MOS tube Q3 connects the positive pole of power supply BT1, and the drain electrode of P channel MOS tube Q3 connects the negative pole being loaded to power supply BT1;
The positive pole of power supply BT1 is connected to the grid of P channel MOS tube Q3 by resistance R5, the power input VCC of power management chip U1 connects the drain electrode of P channel MOS tube, the earth terminal GND of power management chip U1 connects the negative pole of power supply BT1, and the level output end PCON of power management chip U1 is connected to the base stage of triode Q2 by resistance R4;
Load RFZ is connected between the emitter of described triode Q2 and the drain electrode of P channel MOS tube.
2. low-power dissipation power supply control circuit according to claim 1, is characterized in that, is also provided with electric capacity C1 between the stationary contact of described touch controlled key S1 and the negative pole of power supply BT1.
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CN201420495297.9U CN204287793U (en) | 2014-08-29 | 2014-08-29 | A kind of low-power dissipation power supply control circuit |
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CN201420495297.9U CN204287793U (en) | 2014-08-29 | 2014-08-29 | A kind of low-power dissipation power supply control circuit |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104181833A (en) * | 2014-08-29 | 2014-12-03 | 长城信息产业股份有限公司 | Low power consumption power control circuit and method |
CN106851952A (en) * | 2017-01-04 | 2017-06-13 | 上海奕瑞光电子科技有限公司 | A kind of flat panel detector circuit implementing method for reducing patient leakage current |
CN107817734A (en) * | 2017-12-05 | 2018-03-20 | 无锡市瀚为科技有限公司 | A kind of super low-power consumption key control circuit |
-
2014
- 2014-08-29 CN CN201420495297.9U patent/CN204287793U/en not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104181833A (en) * | 2014-08-29 | 2014-12-03 | 长城信息产业股份有限公司 | Low power consumption power control circuit and method |
CN106851952A (en) * | 2017-01-04 | 2017-06-13 | 上海奕瑞光电子科技有限公司 | A kind of flat panel detector circuit implementing method for reducing patient leakage current |
CN106851952B (en) * | 2017-01-04 | 2018-09-25 | 上海奕瑞光电子科技股份有限公司 | A kind of flat panel detector circuit implementing method reducing patient leakage current |
CN107817734A (en) * | 2017-12-05 | 2018-03-20 | 无锡市瀚为科技有限公司 | A kind of super low-power consumption key control circuit |
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CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150422 Termination date: 20160829 |