CN204287461U - Intelligent substation combined unit rating delay detector - Google Patents

Abstract

The utility model discloses a rated delay detector for a merging unit of an intelligent substation, which comprises an analog quantity acquisition module, wherein the analog quantity acquisition module adopts independent high-speed DSP for sampling, is used for acquiring the analog quantity output by a conventional relay protection tester and marking the accurate receiving time of the acquired analog quantity, and transmits the analog quantity to a CPU processing module; the digital quantity acquisition module adopts independent FPGA sampling and is used for acquiring the digital quantity output by the merging unit, marking the accurate receiving time of the acquired digital quantity and transmitting the digital quantity to the CPU processing module; the CPU processing module is used for recording, storing and analyzing the sampling data and converting the sampling data into a displayable waveform; the input module is connected with the CPU processing module and is used for inputting a wave recording starting command and a wave recording stopping command; and the GPS clock module is used for providing absolute time for the analog quantity acquisition module, the digital quantity acquisition module and the CPU processing module.

Description

Intelligent substation combined unit rating delay detector

technical field

The utility model relates to a rated time delay detector of an intelligent substation combining unit.

Background technique

A merging unit is a physical unit for time-dependent combining of current and/or voltage data from electronic transformer secondary converters. With the development of large-scale construction of grid smart substations, the importance of smart substation merging units is becoming more and more prominent. At present, the merging unit commonly used in smart substations has an analog input and a digital output. The fixed delay from the time when the primary current or voltage is measured to the time when the digital quantity starts to be sent is called the rated delay of the merging unit. If the rated delay is set incorrectly, it will directly lead to errors in the sampling of protection, metering and other devices, and even cause errors in protection devices. action, resulting in a serious accident.

During the on-site test of the smart substation, there are mainly two ways to measure the rated delay of the merging unit. The first way is to use the hardware device to record the time scale of the input signal and output signal of the merging unit. delay. For this method, the existing merging unit rated delay detector calculates the rated delay, and compares the zero-crossing point of the input signal of the merging unit with the output signal waveform, thereby calculating the rated delay of the merging unit. This test method sometimes ignores the first cycle of the merging unit output, and the detection accuracy of the merging unit with a rated delay of less than 20ms (one cycle) can meet the requirements, but when the rated delay of the merging unit is equal to or greater than 20ms, this detection method If it is detected that the rated delay is 0 or the detection result is less than 20ms, the correct result cannot be given. For example: when the delay of the merging unit is 20ms, the detector judges that the rated delay is 0; when the delay of the merging unit is 45ms, the detector judges that the rated delay is 5ms. And some relevant literature studies pointed out that this detection method involves a large amount of data, and the dispersion of test results is large, which is not conducive to the evaluation of test results. The second method is to use the wave recording device to compare the time difference or phase difference between the two signals transmitted through the merging unit and those without the merging unit to calculate the rated delay of the merging unit. This method requires the use of a fault recording device, and the wiring is complicated. The sampling synchronization and timing accuracy of the fault recording device will directly affect the test results.

Utility model content

In order to solve the above problems, the utility model provides a rated time delay detector for the merging unit of the intelligent substation. Thus, the rated delay of the merging unit can be accurately measured, including the merging unit whose rated delay is equal to or greater than 20 ms.

In order to achieve the above object, the utility model adopts the following technical solutions:

A rated time delay detector for an intelligent substation merging unit, comprising:

An analog quantity acquisition module, which adopts independent high-speed DSP sampling, is used to collect the analog quantity output by the conventional relay protection tester and mark the accurate receiving time of the collected analog quantity, and transmit it to the CPU processing module; and

A digital quantity acquisition module, which adopts independent FPGA sampling, is used to collect the digital quantity output by the merging unit, and marks the accurate receiving time of the collected digital quantity, and transmits it to the CPU processing module; and

CPU processing module, used for wave recording, storage and analysis of sampled data, and converting sampled data into displayable waveforms; and

An input module, which is connected with the CPU processing module, is used to input commands for starting wave recording and stopping wave recording; and

The GPS clock module is used to provide absolute time for the analog quantity acquisition module, the digital quantity acquisition module and the CPU processing module.

The beneficial effects of the utility model are:

(1) The analog quantity acquisition module and the digital quantity acquisition module in the utility model adopt independent plug-ins, the data processing ability is strong, and can effectively avoid generation interference between the analog quantity and the digital quantity, by the same clock signal time synchronization, improved Sampling accuracy, and increase the versatility of the device, making maintenance and replacement more convenient;

(2) The detector of the present utility model can be tested by utilizing the output analog quantity of the conventional relay protection tester, and the input merging unit analog quantity is the same quantity as the reference quantity used for comparison, which eliminates the influencing factors of the power source; itself does not With power source, compact structure, small size, light weight, safe and convenient to carry and transport, easy to use, and strong practicability;

(3) The utility model calculates the rated time delay by comparing waveforms after analog and digital sampling and recording, and starts recording at the beginning of the test to ensure that the first cycle is recorded, and the test results are accurate and intuitive.

Description of drawings

Fig. 1 is the structural representation of the utility model;

Fig. 2 is a schematic diagram of the rated time delay of the test merging unit of the present invention.

Detailed ways

The utility model will be further described below in conjunction with the accompanying drawings. The following examples are only used to illustrate the technical solution of the utility model more clearly, but not to limit the protection scope of the utility model.

As shown in Figure 1, a smart substation combined unit rating delay detector includes:

The CPU processing module is used to record, store and analyze the sampled data, and convert the sampled data into a displayable waveform; the analog quantity acquisition module is used to collect the analog quantity output by the conventional relay protection tester, using an independent high-speed DSP Sampling, synchronizing and storing sampling multi-channel analog data, marking the collected analog data with precise receiving time and exchanging data with the CPU processing module;

The digital quantity acquisition module is used to collect the digital quantity output by the merging unit, and uses an independent FPGA for sampling. The digital quantity acquisition module supports the reception of digital quantities in IEC61850-9-2 and FT3 formats, and marks the collected digital quantities with accurate Receive the time and exchange data with the CPU processing module; the input module is connected to the CPU processing module and is used to input the commands to start wave recording and stop wave recording;

The display module that links to each other with described CPU processing module, is used for displaying the waveform of the digital quantity that gathers and analog quantity; GPS clock module, is used for providing absolute time for analog quantity acquisition module, digital quantity acquisition module and CPU processing module, guarantees Absolute synchronous sampling of analog and digital quantities, and the sampling data has an absolute time scale.

Wherein, the analog acquisition module adopts a 32-bit high-speed floating-point digital signal processor of TI Company of the United States;

Described digital quantity acquisition module adopts the FPGA of Xilinx Company;

The GPS clock module adopts the Leiming digital clock developed by Shijiazhuang Leiming Electronic Technology Co., Ltd. This clock does not need a master clock or an antenna, but the internal circuit of the slave clock receives the Unicom CDMA standard time signal and traces back to UTC time , that is, CDMA digital clocks can be used to display standard time in any place where Unicom CDMA mobile phones can be used;

The CPU processing module adopts a 32-bit embedded CPU based on the VxWorks embedded operating system, which can easily record, store and draw the collected analog and digital waveforms.

The operating principle of the combined unit rated delay detector of the present utility model is as shown in Figure 2:

Step 1: Connect the two identical analog quantities output by the conventional relay protection tester, one path to the merged unit under test, and the other path to the analog quantity acquisition module interface of the rated delay detector of the merged unit, and merge The digital quantity output by the unit is connected to the digital quantity acquisition module interface of the rated delay detector of the merging unit;

Step 2: During the test, send the wave recording command to the CPU processing module through the input module. At this time, the analog acquisition module of the rated delay detector of the merging unit will mark each sampled value with an accurate absolute time label. , similarly, the digital quantity acquisition module also stamps a precise absolute time tag on the received digital quantity output by each merging unit;

Step 3: According to the absolute time labels of the analog and digital quantities, the CPU processing module unifies these two sets of quantities on a coordinate axis whose horizontal axis is the absolute time and transmits it to the display unit, and displays it in the form of a waveform; because The analog quantity directly connected to the rated time delay detector of the merging unit has no delay, while the digital quantity connected to the rated time delay detector of the merging unit after passing through the merging unit has a delay, which is the time delay of the merging unit. Unit rated delay, compare the time difference of the first point of the two waveforms on the abscissa to get the rated delay of the merged unit under test;

When the detection is completed, the command to stop wave recording is sent to the CPU processing module through the input module.

Although the specific implementation of the utility model has been described above in conjunction with the accompanying drawings, it does not limit the protection scope of the utility model. Those skilled in the art should understand that on the basis of the technical solution of the utility model, those skilled in the art do not need to Various modifications or deformations that can be made with creative efforts are still within the protection scope of the present utility model.

Claims (2)

1. A smart substation merging unit rated time delay detector, characterized in that it comprises: CPU processing module, used for wave recording, storage and analysis of sampled data, and converting sampled data into displayable waveforms; and An analog quantity acquisition module, which adopts independent high-speed DSP sampling, is used to collect the analog quantity output by the conventional relay protection tester and mark the accurate receiving time of the collected analog quantity, and transmit it to the CPU processing module; and A digital quantity acquisition module, which adopts independent FPGA sampling, is used to collect the digital quantity output by the merging unit, and marks the accurate receiving time of the collected digital quantity, and transmits it to the CPU processing module; and The GPS clock module is used to provide absolute time for the analog quantity acquisition module, the digital quantity acquisition module and the CPU processing module. 2. A kind of intelligent substation merging unit rated time-delay detector as claimed in claim 1, is characterized in that, CPU processing module is also connected with input module, and described input module is used for sending start wave recording and stop wave recording command to CPU processing module.