CN204272142U - A kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit - Google Patents
A kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit Download PDFInfo
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- CN204272142U CN204272142U CN201420691029.4U CN201420691029U CN204272142U CN 204272142 U CN204272142 U CN 204272142U CN 201420691029 U CN201420691029 U CN 201420691029U CN 204272142 U CN204272142 U CN 204272142U
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Abstract
The utility model discloses a kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit, it comprises multiple synchronized sampling passage, each synchronized sampling passage is by high-speed radio-frequency signal sampling interface circuit (1), mixting circuit (2), clock zone change-over circuit (3) and filter circuit (4) composition, clock zone 1 is total to multipath high-speed radiofrequency signal to clock zone N and is connected (1) with high-speed radio-frequency signal sampling interface circuit respectively, the output of high-speed radio-frequency signal sampling interface circuit (1) is connected with mixting circuit (2), intermediate-freuqncy signal is obtained after down-converted made by mixting circuit (2), the intermediate-freuqncy signal that mixting circuit (2) exports is connected with clock zone change-over circuit (3), the output of clock zone change-over circuit (3) exports the baseband signal of Complete Synchronization after circuit (4) carries out CIC filtering after filtering.The utility model Channel Synchronous is high, the baseband signal of exportable Complete Synchronization.
Description
Technical field
The utility model relates to a kind of sample circuit, especially relates to a kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit.
Background technology
Radiofrequency signal is just through modulation, have the electric wave of certain tranmitting frequency, when wave frequency is lower than 100kHz, electromagnetic wave can be absorbed by earth's surface, can not form effective transmission, once wave frequency higher than 100kHz, electromagnetic wave just can be propagated in atmosphere, and through the ionospheric reflection of atmosphere outer rim, form long-distance transmissions ability, we call radio frequency the frequency electromagnetic waves with long-distance transmissions ability.Radio-frequency technique has widely at wireless communication field, not replaceable effect.In recent years, along with the progress of radio communication, radio-frequency transmitter is also in develop rapidly.As practicality technology widely, the purposes of radio-frequency transmitter covers radio communication, television broadcasting, radar fix, remote measuring and controlling, satellite communication and has entered the every field such as the mobile communication equipment of average family completely now.And multichannel wideband radio receiver is widely used in military and civilian communication especially, there is far-reaching social effect and great researching value.
Frequently penetrate receiver for multichannel broadband, each road radiofrequency signal all receives from independently radio-frequency channel.Receiver is frequently penetrated in multichannel broadband, and each road radiofrequency signal all receives from independently radio-frequency channel.Synchronous in order to carry out, existing scheme is most from hardware enterprising row clock territory synchronization scenario, and all radio frequency reception channel all adopt same reference clock.But each road high-speed radio-frequency signal is all from different radio-frequency transmitter passages, each receiver is mutually independently, does not have identical clock reference, bring huge difficulty to hardware synchronization scheme mutually.
Utility model content
The purpose of this utility model is to overcome the deficiencies in the prior art, and provide a kind of multi-clock zone high-speed radio-frequency synchronized sampling circuit, have volume little, dynamically wide, Channel Synchronous is high, the advantage that channel difference is little.
The purpose of this utility model is achieved through the following technical solutions: a kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit, it comprises multiple synchronized sampling passage, each synchronized sampling passage is by high-speed radio-frequency signal sampling interface circuit, mixting circuit, clock zone change-over circuit and filter circuit composition, clock zone 1 is total to multipath high-speed radiofrequency signal to clock zone N and is connected with high-speed radio-frequency signal sampling interface circuit respectively, the output of high-speed radio-frequency signal sampling interface circuit is connected with mixting circuit, do to obtain intermediate-freuqncy signal after down-converted through mixting circuit, the intermediate-freuqncy signal that mixting circuit exports is connected with clock zone change-over circuit, clock zone 1 is all converted to the synchronizing signal of synchronous clock domains S by clock zone change-over circuit to all intermediate-freuqncy signals of clock zone N, the output of clock zone change-over circuit after filtering circuit exports the baseband signal of Complete Synchronization after carrying out CIC filtering, all baseband signals are all in same clock zone S.
Described clock zone change-over circuit is asynchronously turn sync buffering device.
Described filter circuit is cic filter.
The beneficial effects of the utility model are:
By clock zone change-over circuit, clock zone 1 is converted into the synchronizing signal of synchronous clock domains S to all intermediate-freuqncy signals of clock zone N, then the synchronizing signal of synchronous clock domains S carries out CIC filtering, improve Channel Synchronous further, export the baseband signal of Complete Synchronization.
Accompanying drawing explanation
Fig. 1 is the theory diagram of the utility model technology;
In figure: 1-high-speed radio-frequency signal sampling interface circuit, 2-mixting circuit, 3-clock zone change-over circuit, 4-filter circuit.
Embodiment
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail, but protection range of the present utility model is not limited to the following stated.
As shown in Figure 1, a kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit, it comprises multiple synchronized sampling passage, each synchronized sampling passage is by high-speed radio-frequency signal sampling interface circuit 1, mixting circuit 2, clock zone change-over circuit 3 and filter circuit 4 form, clock zone 1 is total to multipath high-speed radiofrequency signal to clock zone N and is connected with high-speed radio-frequency signal sampling interface circuit 1 respectively, the output of high-speed radio-frequency signal sampling interface circuit 1 is connected with mixting circuit 2, do to obtain intermediate-freuqncy signal after down-converted through mixting circuit 2, the intermediate-freuqncy signal that mixting circuit 2 exports is connected with clock zone change-over circuit 3, clock zone 1 is all converted to the synchronizing signal of synchronous clock domains S by clock zone change-over circuit 3 to all intermediate-freuqncy signals of clock zone N, the output of clock zone change-over circuit 3 exports the baseband signal of Complete Synchronization after circuit 4 carries out CIC filtering after filtering, all baseband signals are all in same clock zone S.
Described clock zone change-over circuit is asynchronously turn sync buffering device.
Described filter circuit is cic filter.
Claims (3)
1. a multi-clock zone high-speed radio-frequency signal synchronized sampling circuit, it is characterized in that: it comprises multiple synchronized sampling passage, each synchronized sampling passage is by high-speed radio-frequency signal sampling interface circuit (1), mixting circuit (2), clock zone change-over circuit (3) and filter circuit (4) composition, clock zone 1 is total to multipath high-speed radiofrequency signal to clock zone N and is connected with high-speed radio-frequency signal sampling interface circuit (1) respectively, the output of high-speed radio-frequency signal sampling interface circuit (1) is connected with mixting circuit (2), intermediate-freuqncy signal is obtained after down-converted made by mixting circuit (2), the intermediate-freuqncy signal that mixting circuit (2) exports is connected with clock zone change-over circuit (3), clock zone 1 is all converted to the synchronizing signal of synchronous clock domains S by clock zone change-over circuit (3) to all intermediate-freuqncy signals of clock zone N, the output of clock zone change-over circuit (3) exports the baseband signal of Complete Synchronization after circuit (4) carries out CIC filtering after filtering, all baseband signals are all in same clock zone S.
2. a kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit according to claim 1, is characterized in that: described clock zone change-over circuit (3) turns sync buffering device for asynchronous.
3. a kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit according to claim 1, is characterized in that: described filter circuit (4) is cic filter.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201420691029.4U CN204272142U (en) | 2014-11-18 | 2014-11-18 | A kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit |
Applications Claiming Priority (1)
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CN201420691029.4U CN204272142U (en) | 2014-11-18 | 2014-11-18 | A kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit |
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CN204272142U true CN204272142U (en) | 2015-04-15 |
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CN201420691029.4U Expired - Fee Related CN204272142U (en) | 2014-11-18 | 2014-11-18 | A kind of multi-clock zone high-speed radio-frequency signal synchronized sampling circuit |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105306846A (en) * | 2015-11-24 | 2016-02-03 | 北京北广科技股份有限公司 | Digital television exciter capable of outputting multiple channels simultaneously |
CN109741286A (en) * | 2019-02-19 | 2019-05-10 | 厦门码灵半导体技术有限公司 | Median filter method, device, storage medium and electronic equipment |
-
2014
- 2014-11-18 CN CN201420691029.4U patent/CN204272142U/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105306846A (en) * | 2015-11-24 | 2016-02-03 | 北京北广科技股份有限公司 | Digital television exciter capable of outputting multiple channels simultaneously |
CN109741286A (en) * | 2019-02-19 | 2019-05-10 | 厦门码灵半导体技术有限公司 | Median filter method, device, storage medium and electronic equipment |
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Legal Events
Date | Code | Title | Description |
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C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150415 Termination date: 20191118 |