CN204258307U - Control circuit of voltage sag generator - Google Patents
Control circuit of voltage sag generator Download PDFInfo
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- CN204258307U CN204258307U CN201420675510.4U CN201420675510U CN204258307U CN 204258307 U CN204258307 U CN 204258307U CN 201420675510 U CN201420675510 U CN 201420675510U CN 204258307 U CN204258307 U CN 204258307U
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Abstract
The utility model provides a control circuit of voltage sag generator mainly is applicable to the real-time, intelligent control of voltage sag generator. The utility model discloses a core control circuit is based on the three nuclear control circuit structures that two DSP chips and a slice FPGA designed and formed, has satisfied real-time, accuracy nature and the stability requirement of control, has fully utilized FPGA's powerful logic department and parallel processing ability, has reduced peripheral logic comparison circuit in a large number, strengthens the flexibility of system design, and the three divides the worker to make clear, makes the operating efficiency of total system obviously improve. The voltage sag generator using the control circuit can simulate various sag conditions such as three-phase sag or sag, only one-phase sag or sag and the like, and can be used for testing the anti-interference characteristic of the equipment to be tested on the voltage quality.
Description
Technical field
The utility model relates to a kind of voltage sag generator control circuit, especially a kind of voltage sag generator control circuit adopting two CSTR+FPGA.
Background technology
Along with science and technology and economic development, the sensitive load of the precision equipment class being core with computer, Programmable Logic Controller, embedded system accesses electrical network in a large number, these sensitive equipments are very high to the requirement of quality of voltage, primarily of the voltage dip that the system failure causes, often cause sensitive equipment to lose efficacy, thus cause huge loss.Therefore, voltage dip causes the hot subject power consumption equipment impact that particularly sensitive equipment causes having been become to quality of power supply area research.Study voltage dip on power consumption equipment produces affect time, sometimes need to test the working condition of power consumption equipment under voltage dip condition.But, in real process, the voltage cost of electrical network generation specific duration and waveform very large and be difficult to reach.Therefore, the development that can produce the device of specific voltage waveform seems particularly important.
At present, the devices such as voltage sag generator (VSG), electric energy quality signal generator, quality of power supply interferance generator all can produce required voltage waveform, for the experiment testing power consumption equipment provides condition.
But it is perfect not enough to simulate the high-power generating means producing various voltage signal in prior art, its control circuit generally adopts the framework such as single-chip microcomputer, single digital signal processor (DSP), as will be taken into account computing, export the functional requirements such as control, fault detect, man-machine interaction simultaneously, control cycle must be caused to extend and control precision reduction, thus existing equipment ubiquity structure bulky, function singleness, low precision, power output is little, lack of wisdom, the shortcoming that versatility is inadequate.
Utility model content
Technical problem to be solved in the utility model, just be to provide a kind of control circuit of the voltage sag generator based on double digital signal processor (DSP) and field programmable gate array (FPGA) framework, the real-time of further raising voltage sag generator, implementation structure is simple, high accuracy, the designing requirement such as multi-functional, intelligent.
Solve the problems of the technologies described above, the utility model adopts following technical scheme:
A kind of control circuit of voltage sag generator, it is characterized in that: comprise one by the core control circuit of double digital signal processor and field programmable gate array framework, described core control circuit is input voltage and the electric current signal successively after CT/PT conversion, the conditioning of electric current and voltage modulate circuit, the conversion of A/D modular converter and the signal of failure detector circuit respectively, after core control circuit processes input signal, output pwm signal to level conversion optocoupler driver module, I/O signal to relay or contactor.
In described double digital signal processor, processing instruction input and mutual display data be the first digital signal processor module, input A/D transformation result and the first digital signal processor module data, to export three-phase reference voltage be the second digital signal processor module to the first digital signal processor module, the first digital signal processor module external touch.
The software program of described field programmable gate array module (FPGA), the embedded prior art of the first digital signal processor module.
The utility model adopts " two CSTR (F2812)+FPGA " framework; a DSP (being called a DSP) is responsible for deal with data display and is inputted with data; another DSP (being called the 2nd DSP) is responsible for producing reference waveform and controlling output waveform; field programmable gate array (FPGA) is responsible for controlling the work of modulus (A/D) conversion chip; the generation of inverter IGBT drive singal and system-wide fault detect; once there be fault can instantaneous execution defence program, do not affect by DSP operating state.
The function applying voltage sag generator of the present utility model embodies by touch-screen: operator by touch-screen input voltage temporary range of decrease value, fall start-phase and fall the duration temporarily temporarily, the information such as output voltage electric current, malfunction, operational mode of touch-screen real-time display system simultaneously.Touch-control system friendly interface, easy and simple to handle, there is higher real-time.
The utility model compared with prior art has the following advantages and beneficial effect:
(1) three core treatment systems of double digital signal processor (DSP) and field programmable gate array (FPGA) framework are adopted: a digital signal processor carries out separately output and controls, resources of chip controls for the output of voltage completely, meets the requirement of real-time, accuracy and the stability controlled; The human-computer interaction functions such as the independent deal with data input of another digital signal processor, data display, fast response time during operation, does not affect and exports control; Field programmable gate array FPGA, as system core control device, makes full use of its powerful logic place and parallel processing capability, can reduce peripheral logic comparison circuit in a large number, strengthens the flexibility of system; Improve system to the response speed of fault simultaneously, reduce the impact that fault causes system to greatest extent.Three divides the work clearly, and system-wide operational efficiency is significantly improved.
The accurate control of (2) the 2nd DSP primary responsibility output voltage waveforms, its control algolithm adopts the double-closed-loop control algorithm of outer voltage current inner loop, accelerates the dynamic response process of system and improves the static stability of system.
(3) operator by touch-screen input voltage temporary range of decrease value, fall start-phase and fall the duration temporarily temporarily, the information such as output voltage electric current, malfunction, operational mode of touch-screen real-time display system, easy and simple to handle simultaneously.
(4) adopt SPWM control mode, amplitude, start-phase, duration all adjustable three-phase can be simulated according to control command and fall temporarily or rise temporarily, only have a phase to fall temporarily or rise temporarily etc. and polytypely fall situation temporarily.
Accompanying drawing explanation
Fig. 1 is composition of the present utility model and annexation block architecture diagram;
Fig. 2 is the programming flowchart of the FPGA module in the utility model;
Fig. 3 is the programming flowchart of the first DSP module in the utility model;
Fig. 4 is the programming flowchart of the second DSP module in the utility model;
Fig. 5 is voltage dip instrument control system block diagram of the present utility model;
Fig. 6 is hardware circuit module design drawing of the present utility model;
Fig. 7 is that the utility model three-phase falls voltage oscillogram simultaneously temporarily;
Fig. 8 is that the utility model only has a phase to fall voltage oscillogram temporarily;
Fig. 9 is the utility model three-phase temporary up voltage oscillogram simultaneously;
Figure 10 is that the utility model only has a mutually temporary up voltage oscillogram.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is elaborated.
The control circuit of the utility model voltage sag generator comprises one by the core control circuit 4 of double digital signal processor and field programmable gate array framework, core control circuit 4 respectively input voltage and electric current successively through CT/PT conversion, electric current and voltage modulate circuit 5 nurses one's health, A/D modular converter 6 change after signal and the signal of failure detector circuit 7, after core control circuit 4 pairs of input signals process, output pwm signal to level conversion optocoupler driver module 8, I/O signal to relay or contactor.In double digital signal processor, processing instruction input and mutual display data be the first digital signal processor module, input A/D transformation result and the first digital signal processor module data, to export three-phase reference voltage be the second digital signal processor module to the first digital signal processor module, the first digital signal processor module external touch.
Adopt " two CSTR+FPGA " framework, wherein DSP is a for digital control 32 designed fixed-point type DSP, and have powerful data operation ability, dominant frequency is up to 150MHz, is widely used in embedded-type control field; FPGA is a kind of signal processor of use able to programme, and user defines its function by changing configuration information, to meet design requirement.There are the resources such as abundant BRAM, GCLK, various direct available IP kernels its inside, has both solved the deficiency of custom circuit, and has overcome again the shortcoming that original programming device gate circuit number is limited, and effectively improve flexibility and the efficiency of design.
In order to improve operational paradigm and the real time reaction speed of VSG control circuit, the advantage that fpga logic judges should be given full play to, applying it and carrying out various faults Logic judgment and IO output.Meanwhile, play the data operation ability that DSP is powerful, apply it and export control accurately.Therefore, make following functions to a FPGA and two piece DSP to distribute.Fig. 1 is composition and the annexation block architecture diagram of VSG control circuit.
FPGA mainly contains cubic surface function: one is control A/D conversion chip, carries out analog-to-digital conversion and read result to the voltage and current signal after outside CT/PT and modulate circuit, result is sent to the first and second DSP simultaneously; Two is as the data exchange channel between a DSP and the 2nd DSP; Three is that inverter IGBT drive singal exports; Four is carry out TSD total system down detection and IO control output.Fig. 2 is the programming flowchart of FPGA.
One DSP primary responsibility and man-machine interface communication and data management, a DSP reads the information such as electric current and voltage data in FPGA and malfunction and shows in man-machine interface, and transmits the order in man-machine interface.Fig. 3 is the programming flowchart of a DSP.
The stable of 2nd DSP primary responsibility control waveform accurately exports.2nd DSP carries out data interaction by FPGA and a DSP, the instruction of reading touch-screen input generates the Voltage Reference waveform of specifying, and the analog-digital conversion result read in FPGA, as the input of outer voltage current inner loop double closed-loop control system, real-time control output voltage, and comparison value is transferred to FPGA, compare with the triangular carrier of FPGA generation and obtain pwm signal, PWM ripple is through driver module output drive signal, control IGBT opens and closedown, the three-phase alternating voltage that meets the requirements is produced through LC low pass filter, realize the stable of required voltage accurately to export.Fig. 4 is the programming flowchart of the 2nd DSP.
The utility model has carried out careful mathematical analysis, have devised the double closed-loop control system of the current inner loop outer voltage that precision is high, stability is high.Design as follows: the first step is founding mathematical models.With inductive current and output voltage for state variable, be based upon the state-space expression in three-phase static coordinate system.After calculating, can obtain taking modulation signal as input variable, inverter output voltage is the transfer function matrix of output variable, and sets up the Mathematical Modeling under the three-phase static coordinate system of voltage sag generator.Second step carries out two-phase Decoupling Analysis, three-phase static coordinate system to two-phase rest frame.And therefrom analysis obtains: (1), under two-phase rest frame, three-phase inverter is full decoupled, can be equivalent to two single phase half bridge inverters.This decoupling zero mode is simple, and it is also easy to implement.(2) this model is identical with single-phase inverter model, and therefore the design and study method of single-phase inverter can use for reference the control of three-phase inverter.3rd step carries out the double closed-loop control system design of current inner loop outer voltage, and after design, voltage dip instrument control system block diagram is as Fig. 5.
Fig. 6 is hardware circuit module design drawing of the present utility model.Three-phase power grid voltage is input to three-phase uncontrollable rectifier bridge 1 through circuit breaker, and the DC side of three-phase uncontrollable rectifier bridge 1 also connects dc-link capacitance 2, for three phase inverter bridge 3 sets up stable DC voltage.The peripheral circuit such as core control circuit 4 and signal conditioning circuit 5, analog to digital conversion circuit 6, failure detector circuit 7, drive circuit 8, telecommunication circuit 9 based on double digital signal processor (DSP) and field programmable gate array (FPGA) framework forms whole numerical control system.After the voltage and current signal of signal conditioning circuit 5 pairs of current transformers and voltage transformer processes, be transferred to analog to digital conversion circuit 6, core control circuit 4 controls that analog to digital conversion circuit 6 carries out sampling with the frequency of 25.6kHz, digital-to-analogue conversion, then reads analog-digital conversion result.After core control circuit 4 pairs of analog-digital conversion datas carry out corresponding calculation process, the actuating signal of IGBT in three phase inverter bridge 3 is passed to drive circuit 8, signal IGBT controlled in three phase inverter bridge 3 after drive circuit 8 amplifies opens or turns off.The electric current and voltage that failure detector circuit 7 pairs of three phase inverter bridges 3 export, DC voltage detect in real time, once there is certain phase overcurrent in three phase inverter bridge 3, DC voltage is under-voltage or the situation of overvoltage, failure detector circuit 7 will pass to core control circuit 4 corresponding level signal immediately, core control circuit 4 sends locking signal by instantaneous, blocks the output of drive circuit 8.Core control circuit 4 passes to telecommunication circuit 9 in real time data such as the electric current and voltage of the DC voltage of three phase inverter bridge 3, output, fault detect situations in real time.
Running of the present utility model is as follows: the charging first being carried out DC bus capacitor by touch-screen input enabled instruction, charge complete, input falls parameter temporarily, core control circuit produces reference voltage according to instruction, and by sample circuit, electric current and voltage real-time sampling is controlled, the pwm signal that core control circuit exports acts on the IGBT of three phase inverter bridge after drive circuit amplifies, thus produces stable given voltage waveform.
Fig. 7 is that three-phase voltage falls oscillogram simultaneously temporarily, and temporary range of decrease degree is 35%, and the duration is 0.1s.
Fig. 8 is A phase voltage sag oscillogram, and temporary range of decrease degree is 35%, and the duration is 0.1s.
Fig. 9 is that three-phase voltage rises oscillogram simultaneously temporarily, and temporary increasing degree degree is 20%, and the duration is 0.1s.
Figure 10 is that A phase voltage rises oscillogram temporarily, and temporary increasing degree degree is 20%, and the duration is 0.1s.
Claims (2)
1. the control circuit of a voltage sag generator, it is characterized in that: comprise one by the core control circuit (4) of double digital signal processor and field programmable gate array framework, described core control circuit (4) respectively input voltage and electric current converts through CT/PT successively, electric current and voltage modulate circuit (5) is nursed one's health, signal after A/D modular converter (6) conversion, and the signal of failure detector circuit (7), after core control circuit (4) processes input signal, output pwm signal is to level conversion optocoupler driver module (8), I/O signal is to relay or contactor.
2. the control circuit of voltage sag generator according to claim 1, it is characterized in that: in described double digital signal processor, processing instruction input and mutual display data be the first digital signal processor module, input A/D transformation result and the first digital signal processor module data, to export three-phase reference voltage be the second digital signal processor module to the first digital signal processor module, the first digital signal processor module external touch.
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CN201420675510.4U CN204258307U (en) | 2014-11-12 | 2014-11-12 | Control circuit of voltage sag generator |
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108535602A (en) * | 2018-05-08 | 2018-09-14 | 深圳供电局有限公司 | Automatic test platform of voltage sag |
CN109839524A (en) * | 2019-01-25 | 2019-06-04 | 广东电网有限责任公司 | Voltage dip generator and voltage dip control system |
CN109995040A (en) * | 2017-12-29 | 2019-07-09 | 国网冀北电力有限公司张家口供电公司 | The method for solving network voltage and temporarily dropping is dispatched under a kind of micro-capacitance sensor by energy storage |
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2014
- 2014-11-12 CN CN201420675510.4U patent/CN204258307U/en active Active
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109995040A (en) * | 2017-12-29 | 2019-07-09 | 国网冀北电力有限公司张家口供电公司 | The method for solving network voltage and temporarily dropping is dispatched under a kind of micro-capacitance sensor by energy storage |
CN108535602A (en) * | 2018-05-08 | 2018-09-14 | 深圳供电局有限公司 | Automatic test platform of voltage sag |
CN108535602B (en) * | 2018-05-08 | 2024-05-28 | 深圳供电局有限公司 | Automatic voltage sag test platform |
CN109839524A (en) * | 2019-01-25 | 2019-06-04 | 广东电网有限责任公司 | Voltage dip generator and voltage dip control system |
CN109839524B (en) * | 2019-01-25 | 2020-07-03 | 广东电网有限责任公司 | Voltage sag generator and voltage sag control system |
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