CN204231564U - A kind of general real time image processing system based on DSP - Google Patents
A kind of general real time image processing system based on DSP Download PDFInfo
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- CN204231564U CN204231564U CN201420779549.0U CN201420779549U CN204231564U CN 204231564 U CN204231564 U CN 204231564U CN 201420779549 U CN201420779549 U CN 201420779549U CN 204231564 U CN204231564 U CN 204231564U
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Abstract
The utility model provides a kind of general real time image processing system based on DSP, comprise the image capture module of andlogic control model calling respectively, image processing module and result output module, described image capture module utilizes camera collection obtain continuous print analog picture signal and convert data image signal to, described image processing module carries out calculation process to the data image signal after conversion, described result output module carries out computing output to the signal after calculation process, described Logic control module is to described image capture module, the course of work of image processing module and result output module controls.The utility model provide based in the general real time image processing system of DSP, described image processing module is as the core devices of whole image processing system, can require that higher image carries out tracking union to view synthesis, the function of whole image processing system and performance reach expection requirement, recognition speed is fast, and system real time can be high.
Description
Technical Field
The utility model belongs to the image processing field, concretely relates to general real-time image processing system based on DSP.
Background
The rapid development of digital image processing technology enables all image processing problems to be solved in the form of digital signal processing, which provides a wide space for the application of real-time images. First, there are a large number of mature fast algorithms in digital signal processing, such as FFT (fast fourier Transform), which are already applied in image processing in a large number; secondly, with the rapid development of very large scale integrated circuits and the development of Digital Signal Processors (DSP), it is possible to implement Signal processing at high speed and achieve real-time performance of the system. These developments have led to the widespread use of image processing techniques in various fields such as scientific research, industrial and agricultural production, remote sensing of resources, medical care and health, and space exploration.
However, the inventor of the present invention finds, through research, that image processing often performs image acquisition, database management, networked data transmission, etc. on the same machine, which affects the recognition speed and seriously affects the real-time performance of the system.
SUMMERY OF THE UTILITY MODEL
To image acquisition, database management, networked data transmission etc. on image processing that prior art exists, often all go on same platform machine, therefore influenced recognition speed, seriously influenced the technical problem of system real-time performance, the utility model provides a general real-time image processing system based on DSP.
In order to achieve the above purpose, the utility model adopts the following technical scheme:
a general real-time image processing system based on DSP comprises an image acquisition module, an image processing module, a result output module and a logic control module, wherein the image acquisition module, the image processing module and the result output module are respectively connected with the logic control module; wherein,
the image acquisition module acquires continuous analog image signals by using a camera and converts the analog image signals into digital image signals;
the image processing module carries out operation processing on the converted digital image signal;
the result output module is used for carrying out operation output on the signal after operation processing;
and the logic control module controls the working processes of the image acquisition module, the image processing module and the result output module.
The utility model provides an among the general real-time image processing system based on DSP, include image processing module, result output module and logic control module, image processing module can require higher image to trail and operate image real-time processing as whole image processing system's core device, and whole image processing system's function and performance have reached the anticipated requirement, and recognition speed is fast, and system real-time performance is high.
Furthermore, the image processing module comprises a DSP chip unit, a power control unit, a JTAG interface unit, an input FIFO unit, a FLASH unit and an SDRAM unit which are connected with the input end of the DSP chip unit, and a reset control unit, a clock system unit and an output FIFO unit which are connected with the output end of the DSP chip unit.
Furthermore, the DSP chip unit is a TM320C6201 chip.
Further, the power control unit comprises a power driving unit, a first linear voltage stabilizing unit and a second linear voltage stabilizing unit, wherein the power driving unit is connected with an external power supply to drive the first linear voltage stabilizing unit to generate the voltage required by the DSP chip unit and drive the second linear voltage stabilizing unit to generate the voltage required by the peripheral data input/output interface unit of the DSP chip unit.
Further, the operation processing of the image processing module comprises image preprocessing, image segmentation and a matching algorithm.
Drawings
Fig. 1 is a schematic structural diagram of a general real-time image processing system based on a DSP according to the present invention.
Fig. 2 is a schematic diagram of the schematic structure of the image processing module in fig. 1.
In the figure, 1, an image acquisition module; 2. an image processing module; 20. a DSP chip unit; 21. a power supply control unit; 22. a JTAG interface unit; 23. an input FIFO unit; 24. a FLASH unit; 25. an SDRAM unit; 26. a reset control unit; 27. a clock system unit; 28. an output FIFO unit; 3. a result output module; 4. and a logic control module.
Detailed Description
In order to make the technical means, creation features, achievement purposes and functions of the present invention easy to understand and understand, the present invention is further explained by combining with the specific drawings.
Referring to fig. 1, a general real-time image processing system based on a DSP includes an image acquisition module 1, an image processing module 2, a result output module 3, and a logic control module 4, where the image acquisition module 1, the image processing module 2, and the result output module 3 are respectively connected to the logic control module 4; wherein,
the image acquisition module 1 acquires continuous analog image signals by using a camera and converts the analog image signals into digital image signals;
the image processing module 2 performs operation processing on the converted digital image signal;
the result output module 3 performs operation output on the signal after operation processing;
and the logic control module 4 controls the working processes of the image acquisition module 1, the image processing module 2 and the result output module 3.
The utility model provides an among the general real-time image processing system based on DSP, include image processing module, result output module and logic control module, image processing module can require higher image to trail and operate image real-time processing as whole image processing system's core device, and whole image processing system's function and performance have reached the anticipated requirement, and recognition speed is fast, and system real-time performance is high.
As a specific embodiment, please refer to fig. 2, the image processing module includes a DSP chip unit 20, a power control unit 21, a JTAG interface unit 22, an input FIFO unit 23, a FLASH unit 24, and an SDRAM unit 25 connected to an input end of the DSP chip unit 20, and a reset control unit 26, a clock system unit 27, and an output FIFO unit 28 connected to an output end of the DSP chip unit 20. Specifically, the DSP chip unit 20 performs operation processing on the converted digital image signal, the power control unit 21 provides a working voltage for each unit in the image processing module 2, the JTAG interface unit 22 is used for testing the inside of the chip, the input FIFO unit 23 caches the digital image data input from the image acquisition module 1 to the image processing module 2, the FLASH unit 24 stores the image data, the SDRAM unit 25 stores the source program, the reset control unit 26 performs reset control on the DSP chip unit 20, the clock unit 27 provides a system clock with the DSP chip unit 20, and the output FIFO unit 28 outputs the data subjected to operation processing to the result output module 3. The utility model provides an among the image processing system, speed matching problem when considering image data collection and DSP to handle, this embodiment is in image collection module 1 and image processing module 2 (being the DSP module) have adopted data buffering FIFO device between, the warp digital image data that image collection module 1 produced at first buffers to input FIFO unit 23 in, then utilize signals such as HF of input FIFO unit 23 as the sign signal at start-up DMA terminal in the DSP chip, on the basis once, utilize the DMA passageway that HF of input FIFO unit 23 started the DSP chip to convey image data to the SDRAM unit 25 of DSP extension in to effectively reduced the number of times of DSP interrupt that arouses by image data input, and reduced the efficiency that DSP interrupted.
As a specific embodiment, the DSP chip unit 20 selects a chip with a model of TM320C6201, so that it can better meet the requirement of tracking and computing an image with a high requirement for real-time image processing, and improve the function and performance of the whole image processing system.
As a specific embodiment, the power control unit 21 includes a power driving unit, a first linear voltage regulation unit and a second linear voltage regulation unit, where the power driving unit is connected to an external power supply, drives the first linear voltage regulation unit to generate the voltage required by the DSP chip unit, and drives the second linear voltage regulation unit to generate the voltage required by the peripheral data input/output interface unit of the DSP chip unit. Specifically, the selected DSP chip unit TM320C6201 needs two power supply voltages, one is a power supply voltage CVdd needed by a core portion of the DSP chip, that is, the DSP chip itself, and the other is a voltage DVdd needed by a peripheral data input/output (i.e., I/O) interface unit of the DSP chip unit. In order to solve the aforementioned problem of dual-voltage power supply of the DSP chip, in this embodiment, one power supply is used to drive two linear voltage stabilizing modules to generate the required CVdd and DVdd, that is, the power supply control unit 21 includes a power supply driving unit, a first linear voltage stabilizing unit and a second linear voltage stabilizing unit, the power supply driving unit is connected to an external power supply, the first linear voltage stabilizing unit is driven to generate the voltage required by the DSP chip unit, and the second linear voltage stabilizing unit is driven to generate the voltage required by the peripheral data input/output interface unit of the DSP chip unit, so as to meet the power supply requirement of the DSP chip.
As a specific embodiment, the operation processing of the image processing module 2 includes image preprocessing, image segmentation and matching algorithms. Specifically, the image preprocessing includes filtering, image enhancement and the like, the image segmentation is a process of dividing an image into a plurality of specific regions with unique properties and proposing an interested target, and the matching algorithm is a method of seeking similar image targets through analysis of corresponding relations, similarities and consistencies of image contents, characteristics, structures, relations, textures, gray levels and the like.
The above is only the embodiment of the present invention, not the limitation of the patent scope of the present invention, all the equivalent structures made by the contents of the specification and the drawings are directly or indirectly applied to other related technical fields, all the same principle is within the patent protection scope of the present invention.
Claims (5)
1. A general real-time image processing system based on DSP is characterized by comprising an image acquisition module, an image processing module, a result output module and a logic control module, wherein the image acquisition module, the image processing module and the result output module are respectively connected with the logic control module; wherein,
the image acquisition module acquires continuous analog image signals by using a camera and converts the analog image signals into digital image signals;
the image processing module carries out operation processing on the converted digital image signal;
the result output module is used for carrying out operation output on the signal after operation processing;
and the logic control module controls the working processes of the image acquisition module, the image processing module and the result output module.
2. The DSP-based general real-time image processing system according to claim 1, wherein the image processing module comprises a DSP chip unit, a power control unit, a JTAG interface unit, an input FIFO unit, a FLASH unit and an SDRAM unit connected to an input terminal of the DSP chip unit, and a reset control unit, a clock system unit and an output FIFO unit connected to an output terminal of the DSP chip unit.
3. The DSP-based general purpose real-time image processing system according to claim 2, wherein the DSP chip unit is a chip of model TM320C 6201.
4. The DSP-based general real-time image processing system according to claim 2, wherein the power control unit comprises a power driving unit, a first linear voltage stabilization unit, and a second linear voltage stabilization unit, the power driving unit being connected to an external power supply to drive the first linear voltage stabilization unit to generate the voltage required by the DSP chip unit and to drive the second linear voltage stabilization unit to generate the voltage required by the peripheral data input/output interface unit of the DSP chip unit.
5. The DSP based general purpose real-time image processing system of claim 1 wherein the computational processing of the image processing module includes image pre-processing, image segmentation and matching algorithms.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107132855A (en) * | 2017-04-26 | 2017-09-05 | 天津理工大学 | A kind of pendency controller based on video tracking |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107132855A (en) * | 2017-04-26 | 2017-09-05 | 天津理工大学 | A kind of pendency controller based on video tracking |
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Address after: 401329 Chongqing Jiulongpo District Feng Sheng Road No. 27 of No. 3 Patentee after: Chongqing Keyser Polytron Technologies Inc Address before: 401329 Chongqing Jiulongpo District Feng Sheng Road No. 27 of No. 3 Patentee before: CHONGQING KAIZE TECHNOLOGY CO., LTD. |
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Granted publication date: 20150325 Termination date: 20191210 |