CN204206141U - A kind of MLVDS driver with constant differential output voltage - Google Patents
A kind of MLVDS driver with constant differential output voltage Download PDFInfo
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- CN204206141U CN204206141U CN201420717838.8U CN201420717838U CN204206141U CN 204206141 U CN204206141 U CN 204206141U CN 201420717838 U CN201420717838 U CN 201420717838U CN 204206141 U CN204206141 U CN 204206141U
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Abstract
The utility model discloses a kind of MLVDS driver with constant differential output voltage, it comprises output-stage circuit, high level sample circuit, low level sample circuit, differential output voltage sample circuit and error amplifying circuit, the output of output stage is connected to high and low level sampling circuit, the output of high and low level sampling circuit is connected to differential output voltage sample circuit, the output of differential output voltage sample circuit is connected with error amplifier, and the output of error amplifier is connected with output-stage circuit.The utility model provides a kind of MLVDS driver with constant differential output voltage, this driver can be sampled to the low and high level of differential voltage exported and be obtained differential output voltage after doing to differ from, rear adjustment output current is compared by differential output voltage and reference voltage, and then stable difference output voltage.
Description
Technical field
The utility model relates to a kind of MLVDS driver, particularly a kind of MLVDS driver with constant differential output voltage.
Background technology
LVDS technology, with advantages such as low-power consumption, high transfer rate and interference free performances, becomes one of hot technology in the communication technology gradually, and then encounters problem in multiple spot (Multi-Point) application.LVDS bus cannot as RS-485 bus, multiple network node is interconnected composition communication network, and the speed of RS-485 bussing technique and power consumption also limit its in high-speed bus system should, because multiple spot LVDS and MLVDS arises at the historic moment, and issue MLVDS industry standard TIA/EIA-899 in 2002.The MLVDS driver demand fulfillment differential voltage amplitude of oscillation is 480mV ~ 650mV, the requirements such as common-mode voltage range 0.3V ~ 2.1V, therefore be have enough driving forces to drive multichannel loading to the requirement of driver, want the change bearing load on the physical bus caused by single-plate hot-plug simultaneously.
Summary of the invention
The purpose of this utility model is to overcome the deficiencies in the prior art, a kind of MLVDS driver with constant differential output voltage is provided, this driver can be sampled to the low and high level of differential voltage exported and be obtained differential output voltage after doing to differ from, rear adjustment output current is compared by differential output voltage and reference voltage, and then stable difference output voltage.
The purpose of this utility model is achieved through the following technical solutions: a kind of MLVDS driver with constant differential output voltage, it comprises output-stage circuit, high level sample circuit, low level sample circuit, differential output voltage sample circuit and error amplifying circuit, the output of output stage is connected to height, low level sample circuit, high, the output of low level sample circuit is connected to differential output voltage sample circuit, the output of differential output voltage sample circuit is connected with error amplifier, the output of error amplifier is connected with output-stage circuit, described output-stage circuit exports the contrary differential signal of phase place, the low level of described low level sampling circuit samples differential signal, the high level of described high level sampling circuit samples differential signal, described difference output sample circuit is made difference to the high and low level sampled and is obtained differential output voltage.
The negative output terminal of described output-stage circuit is also connected with switching tube MP1, the positive output end of output-stage circuit is also connected with switching tube MP2, be connected with resistance R2 by the resistance R1 of series connection between the positive-negative output end of output stage, described error amplifier is also connected with a reference voltage.
Described output-stage circuit comprises driving tube MP3, MP4, MN1 and MN2, wherein the grid of MP3, MN1 and the grid of MP4, MN2 receive differential signal INN and INP from prime respectively, export Low Voltage Differential Signal OUTP, OUTN that phase place is contrary, MP0 pipe input stage voltage is the output voltage VEA of error amplifier, the drive current of adjustment output-stage circuit, output contact resistance R3 and R4 of MP0 pipe, for the Low Voltage Differential Signal exported provides stable common mode electrical level.
Low Voltage Differential Signal OUTN, OUTP that the driver connected output stage of MP5, MP6 input in described low level sample circuit exports, the positive input terminal of error amplifier EA1 is connected with MP5, MP6, negative input end is connected with voltage VDD through resistance R5, be connected with voltage VDD by R6 between MP5, MP6, the output of error amplifier EA1 is connected output low level signal VL simultaneously with MP7 pipe, MP7 pipe one end is connected with R5, one end and MP5, MP6 common ground.
Low-voltage differential signal OUTN, OUTP of the driver connected output stage output of input of MN3, MN4 in described high level sample circuit, the positive input terminal of error amplifier EA2 is connected with MN3, MN4, negative input end is through R7 ground connection, through resistance R8 ground connection between MN3, MN4, the output of error amplifier EA2 is connected with MN0, output high level voltage VH simultaneously, one end of MN0 pipe is connected with R7, and the other end and MN3, MN4 are connected voltage VDD jointly.
The positive input terminal of the OMP1 in described difference output sample circuit connects the high level VH of high level sample circuit output, the positive input terminal of OMP2 connects the low level VL of low level sample circuit output, the output of OMP1 is connected with MP7 and MP8 respectively, the negative input end of OMP1 is connected with one end of MP7, MP7 with MP8 is connected voltage VDD jointly, the output of OMP2 is connected with MN5, the negative input end of OMP2 is connected with one end of MN5, the other end ground connection of MN5, be connected with resistance R10 between MN5 and MP7, the other end of MP8 is through resistance R9 output difference component voltage VOD.
The beneficial effects of the utility model are: the utility model provides a kind of MLVDS driver with constant differential output voltage, this driver can be sampled to the low and high level of differential voltage exported and be obtained differential output voltage after doing to differ from, rear adjustment output current is compared by differential output voltage and reference voltage, and then stable difference output voltage.
Accompanying drawing explanation
Fig. 1 is the concrete module frame chart of MLVDS drive circuit with constant differential output voltage;
Fig. 2 is driver output stage structure chart;
Fig. 3 is low level sample circuit figure;
Fig. 4 is high level sample circuit figure;
Fig. 5 is differential output voltage sample circuit figure.
Embodiment
Below in conjunction with accompanying drawing, the technical solution of the utility model is described in further detail, but protection range of the present utility model is not limited to the following stated.
As shown in Figure 1, a kind of MLVDS driver with constant differential output voltage, it comprises output-stage circuit, high level sample circuit, low level sample circuit, differential output voltage sample circuit and error amplifying circuit, the output of output stage is connected to high and low level sampling circuit, the output of high and low level sampling circuit is connected to differential output voltage sample circuit, the output of differential output voltage sample circuit is connected with error amplifier, the output of error amplifier is connected with output-stage circuit, and described output-stage circuit exports the contrary differential signal of phase place; The low level of described low level sampling circuit samples differential signal, the high level of described high level sampling circuit samples differential signal, described difference output sample circuit is made difference to the high and low level sampled and is obtained differential output voltage.
The negative output terminal of described output-stage circuit is also connected with switching tube MP1, the positive output end of output-stage circuit is also connected with switching tube MP2, be connected with resistance R2 by the resistance R1 of series connection between the positive-negative output end of output stage, described error amplifier is also connected with a reference voltage.
The driver output stage circuit of Fig. 1 is utilized to export the contrary Low Voltage Differential Signal of phase place, then the high and low level of Low Voltage Differential Signal is obtained by high level sample circuit and low level sample circuit, differential output voltage and VOD is obtained after difference is done to low and high level, differential output voltage compares with reference voltage in error amplifier, when differential output voltage is greater than reference voltage, the output of error amplifier makes the drive current of output stage reduce, and then reduces VOD; When differential output voltage is less than reference voltage, the drive current of output stage increases, and VOD increases.Wherein, MP1, MP2 are as switching tube, and when enable signal EN is low, output OUTN and OUTP receives in bus, and driver normally works; When EN is high, driver does not export and is connected to bus.
As shown in Figure 2, described output-stage circuit comprises driving tube MP3, MP4, MN1 and MN2, wherein MP3, the grid of MN1 and MP4, the grid of MN2 receives differential signal INN and INP from prime respectively, export the Low Voltage Differential Signal OUTP that phase place is contrary, OUTN, MP0 pipe input stage voltage is the output voltage VEA of error amplifier, the drive current of adjustment output-stage circuit, change differential output voltage VOD, and then change the low and high level of output difference sub-signal, output contact resistance R3 and R4 of MP0 pipe, for the Low Voltage Differential Signal exported provides stable common mode electrical level.
As shown in Figure 3, Low Voltage Differential Signal OUTN, OUTP that the driver connected output stage of MP5, MP6 input in described low level sample circuit exports, the positive input terminal of error amplifier EA1 is connected with MP5, MP6, negative input end is connected with voltage VDD through resistance R5, be connected with voltage VDD by R6 between MP5, MP6, the output of error amplifier EA1 is connected output low level signal VL simultaneously with MP7 pipe, MP7 pipe one end is connected with R5, one end and MP5, MP6 common ground.Work as OUTN=VH, during OUTP=VL, MP5 pipe turns off, and MP6 pipe is opened; Work as OUTN=VL, during OUTP=VH, MP6 pipe turns off, and MP5 pipe is opened, and opens when namely MP5, MP6 pipe is different.In figure 3, the size of MP5, MP6, MP7 tri-pipes is equal, resistance R5=R6, and error amplifier EA1 makes its positive-negative input end voltage equal, and therefore the input terminal voltage of MP7 equals the input terminal voltage of MP6, i.e. low level voltage VL.
As shown in Figure 4, low-voltage differential signal OUTN, OUTP of the driver connected output stage output of input of MN3, MN4 in described high level sample circuit, the positive input terminal of error amplifier EA2 is connected with MN3, MN4, negative input end is through R7 ground connection, through resistance R8 ground connection between MN3, MN4, the output of error amplifier EA2 is connected with MN0, simultaneously output high level voltage VH, one end of MN0 pipe is connected with R7, and the other end and MN3, MN4 are connected voltage VDD jointly.Work as OUTN=VH, OUTP=VL, now MN3 pipe turns off, and MN4 pipe is opened; Work as OUTN=VL, OUTP=VH, now MN4 pipe turns off, and MN3 pipe is opened, and opens when namely MN3, MN4 pipe is different.In the diagram, the size of MN3, MN4, MN0 tri-pipes is equal, resistance R7=R8, and error amplifier EA2 makes its generating positive and negative voltage equal, and therefore the input terminal voltage of MN0 equals the input terminal voltage of MN4, i.e. high level voltage VH.
As shown in Figure 5, the positive input terminal of the OMP1 in described difference output sample circuit connects the high level VH of high level sample circuit output, the positive input terminal of OMP2 connects the low level VL of low level sample circuit output, the output of OMP1 is connected with MP7 and MP8 respectively, the negative input end of OMP1 is connected with one end of MP7, MP7 with MP8 is connected voltage VDD jointly, the output of OMP2 is connected with MN5, the negative input end of OMP2 is connected with one end of MN5, the other end ground connection of MN5, resistance R10 is connected with between MN5 and MP7, the other end of MP8 is through resistance R9 output difference component voltage VOD.OMP1, OMP2 are operational amplifier, wherein, OMP1 makes A point voltage equal high level voltage VH, and OMP2 makes B point voltage equal low level voltage VL, VH-VL=R10*I, in design, MP7 and MP8 size is equal, and resistance R10 equals R11 simultaneously, and the electric current therefore flowing through R10 equals the electric current flowing through R11, therefore output voltage VO D=I*R11, therefore VOD=VH-VL.
Claims (6)
1. one kind has the MLVDS driver of constant differential output voltage, it is characterized in that: it comprises output-stage circuit, high level sample circuit, low level sample circuit, differential output voltage sample circuit and error amplifying circuit, the output of output stage is connected to high and low level sampling circuit, the output of high and low level sampling circuit is connected to differential output voltage sample circuit, the output of differential output voltage sample circuit is connected with error amplifier, the output of error amplifier is connected with output-stage circuit, and described output-stage circuit exports the contrary differential signal of phase place; The low level of described low level sampling circuit samples differential signal, the high level of described high level sampling circuit samples differential signal, described difference output sample circuit is made difference to the high and low level sampled and is obtained differential output voltage.
2. a kind of MLVDS driver with constant differential output voltage according to claim 1, it is characterized in that: the negative output terminal of described output-stage circuit is also connected with switching tube MP1, the positive output end of output-stage circuit is also connected with switching tube MP2, be connected with resistance R2 by the resistance R1 of series connection between the positive-negative output end of output stage, described error amplifier is also connected with a reference voltage.
3. a kind of MLVDS driver with constant differential output voltage according to claim 1, it is characterized in that: described output-stage circuit comprises driving tube MP3, MP4, MN1 and MN2, wherein MP3, the grid of MN1 and MP4, the grid of MN2 receives differential signal INN and INP from prime respectively, export the Low Voltage Differential Signal OUTP that phase place is contrary, OUTN, MP0 pipe input stage voltage is the output voltage VEA of error amplifier, the drive current of adjustment output-stage circuit, output contact resistance R3 and R4 of MP0 pipe, for the Low Voltage Differential Signal exported provides stable common mode electrical level.
4. a kind of MLVDS driver with constant differential output voltage according to claim 1, it is characterized in that: the MP5 in described low level sample circuit, the Low Voltage Differential Signal OUTN that the driver connected output stage of MP6 input exports, OUTP, the positive input terminal of error amplifier EA1 and MP5, MP6 connects, negative input end is connected with voltage VDD through resistance R5, MP5, be connected with voltage VDD by R6 between MP6, the output of error amplifier EA1 is connected output low level signal VL simultaneously with MP7 pipe, MP7 pipe one end is connected with R5, one end and MP5, MP6 common ground.
5. a kind of MLVDS driver with constant differential output voltage according to claim 1, it is characterized in that: the MN3 in described high level sample circuit, the low-voltage differential signal OUTN of the driver connected output stage output of input of MN4, OUTP, the positive input terminal of error amplifier EA2 and MN3, MN4 connects, negative input end is through R7 ground connection, MN3, through resistance R8 ground connection between MN4, the output of error amplifier EA2 is connected with MN0, output high level voltage VH simultaneously, one end of MN0 pipe is connected with R7, the other end and MN3, MN4 connects voltage VDD jointly.
6. a kind of MLVDS driver with constant differential output voltage according to claim 1, it is characterized in that: the positive input terminal of the OMP1 in described difference output sample circuit connects the high level VH of high level sample circuit output, the positive input terminal of OMP2 connects the low level VL of low level sample circuit output, the output of OMP1 is connected with MP7 and MP8 respectively, the negative input end of OMP1 is connected with one end of MP7, MP7 with MP8 is connected voltage VDD jointly, the output of OMP2 is connected with MN5, the negative input end of OMP2 is connected with one end of MN5, the other end ground connection of MN5, resistance R10 is connected with between MN5 and MP7, the other end of MP8 is through resistance R9 output difference component voltage VOD.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420717838.8U CN204206141U (en) | 2014-11-26 | 2014-11-26 | A kind of MLVDS driver with constant differential output voltage |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420717838.8U CN204206141U (en) | 2014-11-26 | 2014-11-26 | A kind of MLVDS driver with constant differential output voltage |
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| CN204206141U true CN204206141U (en) | 2015-03-11 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105703751A (en) * | 2014-11-26 | 2016-06-22 | 成都振芯科技股份有限公司 | MLVDS driver enabling constant differential output voltage |
| CN105991123A (en) * | 2015-06-17 | 2016-10-05 | 龙迅半导体（合肥）股份有限公司 | Output signal swing calibration circuit |
-
2014
- 2014-11-26 CN CN201420717838.8U patent/CN204206141U/en not_active Expired - Fee Related
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105703751A (en) * | 2014-11-26 | 2016-06-22 | 成都振芯科技股份有限公司 | MLVDS driver enabling constant differential output voltage |
| CN105991123A (en) * | 2015-06-17 | 2016-10-05 | 龙迅半导体（合肥）股份有限公司 | Output signal swing calibration circuit |
| CN105991123B (en) * | 2015-06-17 | 2019-02-12 | 龙迅半导体（合肥）股份有限公司 | A kind of output signal amplitude of oscillation calibration circuit |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150311 Termination date: 20191126 |
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| CF01 | Termination of patent right due to non-payment of annual fee |