CN204117331U - A kind of intelligent household security system host signal treatment circuit - Google Patents
A kind of intelligent household security system host signal treatment circuit Download PDFInfo
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- CN204117331U CN204117331U CN201420642857.9U CN201420642857U CN204117331U CN 204117331 U CN204117331 U CN 204117331U CN 201420642857 U CN201420642857 U CN 201420642857U CN 204117331 U CN204117331 U CN 204117331U
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Abstract
The utility model discloses a kind of intelligent household security system host signal treatment circuit, comprise double-audible frequency circuit, single-chip microcomputer signal processing circuit, number memory circuit, polarity transformation circuits and warning circuit, double-audible frequency circuit comprises tone decoder IC1, resistance R25 and resistance R26, single-chip microcomputer signal processing circuit comprises single-chip microcomputer IC2, electric capacity C13 and electric capacity C14, number memory circuit comprises storage chip IC3, polarity transformation circuits comprises rectifier bridge Q and triode V1, and warning circuit comprises hummer B1 and hummer B2.The utility model circuit safety is stable, structure is simple, cheap, is particularly suitable for home security environment, has broad application prospects.
Description
Technical field
The utility model relates to a kind of signal processing circuit, specifically a kind of intelligent household security system host signal treatment circuit.
Background technology
Along with Chinese society expanding economy, the awareness of safety of people improves constantly, safety alarm system has become the important component part of intelligent residential district home intelligence system, safety alarm system must have the features such as stable, reliable, easy to operate, and can ensure that realization has police to report, do not report this two main targets without alert, but existing intelligent household security system circuit structure is complicated, manufacturing cost is very high, is difficult to promote the popularization use.
Utility model content
The purpose of this utility model is to provide a kind of safe and reliable, intelligent household security system host signal treatment circuit that circuit structure is simple and cheap, to solve the problem proposed in above-mentioned background technology.
For achieving the above object, the utility model provides following technical scheme:
A kind of intelligent household security system host signal treatment circuit, comprise double-audible frequency circuit, single-chip microcomputer signal processing circuit, number memory circuit, polarity transformation circuits and warning circuit, described double-audible frequency circuit comprises tone decoder IC1, resistance R25 and resistance R26, described single-chip microcomputer signal processing circuit comprises single-chip microcomputer IC2, electric capacity C13 and electric capacity C14, described number memory circuit comprises storage chip IC3, described polarity transformation circuits comprises rectifier bridge Q and triode V1, and described warning circuit comprises hummer B1 and hummer B2.
Described tone decoder IC1 pin IN+ is contact resistance R2 and resistance R4 respectively, the resistance R2 other end connects electric capacity C2, the electric capacity C2 other end connects input signal L1 respectively, input signal L4 and rectifier bridge Q pin 1, described tone decoder IC1 pin IN-is contact resistance R3 and resistance R5 respectively, the resistance R3 other end is contact resistance R1 and tone decoder IC1 pin GS respectively, the resistance R1 other end connects electric capacity C1, the electric capacity C1 other end connects input signal L2 respectively, input signal L3 and rectifier bridge Q pin 3, the described resistance R4 other end is the contact resistance R5 other end and tone decoder IC1 pin YREF respectively, described tone decoder IC1 pin RT/GT is contact resistance R6 and electric capacity C3 respectively, the resistance R6 other end connects tone decoder IC1 pin EST, tone decoder IC1 pin Vss connects electric capacity C3 and ground connection, tone decoder IC1 pin Vdd connects 5V positive source and resistance R31 respectively, resistance R31 other end connecting triode V4 collector, triode V4 base stage connects stake resistance R32 respectively, direct earth capacitance C12 and resistance R30, the resistance R30 other end connects tone decoder IC1 pin TOE and tone decoder IC1 pin Pin NC respectively, described triode V4 grounded emitter, described rectifier bridge Q pin 4 is contact resistance R8 respectively, electric capacity C4 and resistance R34, the resistance R34 other end is contact resistance R33 and triode V5 base stage respectively, triode V5 collector is contact resistance R35 and triode V6 base stage respectively, the resistance R35 other end connects 5V positive source, described triode V5 emitter and the equal ground connection of triode V6 collector, triode V6 emitter connects single-chip microcomputer IC2 pin RC5, the described resistance R33 other end connects rectifier bridge Q pin 2 respectively, resistance R9 and triode V2 emitter, triode V2 collector is connecting triode V1 collector and resistance R11 respectively, triode V1 emitter is the contact resistance R8 other end and resistance R7 respectively, the resistance R7 other end connects the electric capacity C4 other end, described triode V1 base stage is contact resistance R12 respectively, resistance R14, resistance R15 and direct earth capacitance C6, the resistance R14 other end connects electric capacity C5, the electric capacity C5 other end connects stake resistance R13, the described resistance R15 other end connects direct earth capacitance C7 and electric capacity C8 respectively, the electric capacity C8 other end connects direct earth capacitance C10 and resistance R16 respectively, the resistance R16 other end is contact resistance R17 and resistance R29 respectively, the resistance R29 other end connects tone decoder pin Q4 and single-chip microcomputer IC2 pin RA3 respectively, described triode V2 base stage is the contact resistance R9 other end and resistance R10 respectively, resistance R10 other end connecting triode V3 collector, triode V3 grounded emitter, triode V3 base stage contact resistance R42, the resistance R42 other end connects single-chip microcomputer IC2 pin RC2, the described resistance R17 other end is contact resistance R18 and resistance R28 respectively, the resistance R28 other end connects tone decoder IC1 pin Q3 and single-chip microcomputer IC2 pin RA2 respectively, the described resistance R18 other end is contact resistance R19 and resistance R27 respectively, the resistance R27 other end connects tone decoder IC1 pin Q2 and single-chip microcomputer IC1 pin RA1 respectively, the described resistance R19 other end is contact resistance R20 and resistance R26 respectively, the resistance R26 other end connects tone decoder IC1 pin Q1 and single-chip microcomputer IC1 pin RA0 respectively, the described resistance R20 other end is contact resistance R21 and resistance R25 respectively, the resistance R25 other end connects single-chip microcomputer IC2 pin RC1, the described resistance R21 other end connects stake resistance R22 and resistance R24 respectively, the resistance R24 other end connects single-chip microcomputer IC2 pin RC4, described tone decoder IC1 pin INH connects electric capacity C11, the electric capacity C11 other end connects electric capacity C13 respectively, crystal oscillator Y and single-chip microcomputer IC2 pin OSC2, single-chip microcomputer IC2 pin OSC1 connects the crystal oscillator Y other end and electric capacity C14 respectively, the electric capacity C14 other end connects the electric capacity C13 other end and ground connection, described single-chip microcomputer IC2 pin Vdd connects 5V positive source and resistance R36 respectively, the resistance R36 other end connects single-chip microcomputer IC2 pin VPP and direct earth capacitance C15 respectively, described single-chip microcomputer IC2 pin RB4 contact resistance R23, the resistance R23 other end connects ground connection light emitting transistor D5 positive pole, described single-chip microcomputer IC2 pin RC3 connects stake resistance R38 and resistance R37 respectively, resistance R37 other end connecting triode V7 base stage, triode V7 grounded emitter, triode V7 collector connects hummer B1, the hummer B1 other end connects 5V positive source, described single-chip microcomputer IC2 pin RB7 is contact resistance R39 and resistance R40 respectively, the resistance R40 other end connects ground connection light emitting transistor D6 positive pole, the described resistance R39 other end connects stake resistance R41 and triode V8 base stage respectively, triode V8 grounded emitter, triode V8 collector connects hummer B2, the hummer B2 other end connects 9V positive source, described single-chip microcomputer IC2 pin RB6 connects storage chip IC3 pin SCL, single-chip microcomputer IC2 pin RB0 connects storage chip IC3 pin SDA, single-chip microcomputer IC2 pin N/C and the equal ground connection of single-chip microcomputer IC2 pin Vss, described storage chip IC3 pin Vcc connects 5V positive source, storage chip IC3 pin A0 ~ A4 and the equal ground connection of storage chip IC3 pin Vss.
As further program of the utility model: described tone decoder IC1 model is MT8870, described single-chip microcomputer IC2 model is PIC16C57, and described storage chip IC3 model is 24C02.
As the utility model further scheme: described single-chip microcomputer IC2 on-chip memory insufficient space, external storage chip IC3 is in order to preserve all kinds of parameters such as telephone number.
Compared with prior art, the beneficial effects of the utility model are: the utility model core adopts single-chip microcomputer PIC16C57, this single-chip microcomputer adopts the single-chip data line of risc architecture to be separated with order line, i.e. so-called " Harvard structure ", execution efficiency is high, speed is fast, simultaneously, this MCU Instruction mostly is byte, adopt reduced instruction set computer, have that power saving, carrying load ability are strong, lower-price characteristic, the utility model circuit safety is stable, structure is simple, cheap, is particularly suitable for home security environment, has broad application prospects.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of intelligent household security system host signal treatment circuit.
Embodiment
Below in conjunction with the accompanying drawing in the utility model embodiment, be clearly and completely described the technical scheme in the utility model embodiment, obviously, described embodiment is only the utility model part embodiment, instead of whole embodiments.Based on the embodiment in the utility model, those of ordinary skill in the art are not making the every other embodiment obtained under creative work prerequisite, all belong to the scope of the utility model protection.
Refer to Fig. 1, in the utility model embodiment, a kind of intelligent household security system host signal treatment circuit, comprise double-audible frequency circuit, single-chip microcomputer signal processing circuit, number memory circuit, polarity transformation circuits and warning circuit, double-audible frequency circuit comprises tone decoder IC1, resistance R25 and resistance R26, single-chip microcomputer signal processing circuit comprises single-chip microcomputer IC2, electric capacity C13 and electric capacity C14, number memory circuit comprises storage chip IC3, polarity transformation circuits comprises rectifier bridge Q and triode V1, and warning circuit comprises hummer B1 and hummer B2.
Tone decoder IC1 pin IN+ is contact resistance R2 and resistance R4 respectively, the resistance R2 other end connects electric capacity C2, the electric capacity C2 other end connects input signal L1 respectively, input signal L4 and rectifier bridge Q pin 1, tone decoder IC1 pin IN-is contact resistance R3 and resistance R5 respectively, the resistance R3 other end is contact resistance R1 and tone decoder IC1 pin GS respectively, the resistance R1 other end connects electric capacity C1, the electric capacity C1 other end connects input signal L2 respectively, input signal L3 and rectifier bridge Q pin 3, the resistance R4 other end is the contact resistance R5 other end and tone decoder IC1 pin YREF respectively, tone decoder IC1 pin RT/GT is contact resistance R6 and electric capacity C3 respectively, the resistance R6 other end connects tone decoder IC1 pin EST, tone decoder IC1 pin Vss connects electric capacity C3 and ground connection, tone decoder IC1 pin Vdd connects 5V positive source and resistance R31 respectively, resistance R31 other end connecting triode V4 collector, triode V4 base stage connects stake resistance R32 respectively, direct earth capacitance C12 and resistance R30, the resistance R30 other end connects tone decoder IC1 pin TOE and tone decoder IC1 pin Pin NC respectively, triode V4 grounded emitter, rectifier bridge Q pin 4 is contact resistance R8 respectively, electric capacity C4 and resistance R34, the resistance R34 other end is contact resistance R33 and triode V5 base stage respectively, triode V5 collector is contact resistance R35 and triode V6 base stage respectively, the resistance R35 other end connects 5V positive source, triode V5 emitter and the equal ground connection of triode V6 collector, triode V6 emitter connects single-chip microcomputer IC2 pin RC5, the resistance R33 other end connects rectifier bridge Q pin 2 respectively, resistance R9 and triode V2 emitter, triode V2 collector is connecting triode V1 collector and resistance R11 respectively, triode V1 emitter is the contact resistance R8 other end and resistance R7 respectively, the resistance R7 other end connects the electric capacity C4 other end, triode V1 base stage is contact resistance R12 respectively, resistance R14, resistance R15 and direct earth capacitance C6, the resistance R14 other end connects electric capacity C5, the electric capacity C5 other end connects stake resistance R13, the resistance R15 other end connects direct earth capacitance C7 and electric capacity C8 respectively, the electric capacity C8 other end connects direct earth capacitance C10 and resistance R16 respectively, the resistance R16 other end is contact resistance R17 and resistance R29 respectively, the resistance R29 other end connects tone decoder pin Q4 and single-chip microcomputer IC2 pin RA3 respectively, triode V2 base stage is the contact resistance R9 other end and resistance R10 respectively, resistance R10 other end connecting triode V3 collector, triode V3 grounded emitter, triode V3 base stage contact resistance R42, the resistance R42 other end connects single-chip microcomputer IC2 pin RC2, the resistance R17 other end is contact resistance R18 and resistance R28 respectively, the resistance R28 other end connects tone decoder IC1 pin Q3 and single-chip microcomputer IC2 pin RA2 respectively, the resistance R18 other end is contact resistance R19 and resistance R27 respectively, the resistance R27 other end connects tone decoder IC1 pin Q2 and single-chip microcomputer IC1 pin RA1 respectively, the resistance R19 other end is contact resistance R20 and resistance R26 respectively, the resistance R26 other end connects tone decoder IC1 pin Q1 and single-chip microcomputer IC1 pin RA0 respectively, the resistance R20 other end is contact resistance R21 and resistance R25 respectively, the resistance R25 other end connects single-chip microcomputer IC2 pin RC1, the resistance R21 other end connects stake resistance R22 and resistance R24 respectively, the resistance R24 other end connects single-chip microcomputer IC2 pin RC4, tone decoder IC1 pin INH connects electric capacity C11, the electric capacity C11 other end connects electric capacity C13 respectively, crystal oscillator Y and single-chip microcomputer IC2 pin OSC2, single-chip microcomputer IC2 pin OSC1 connects the crystal oscillator Y other end and electric capacity C14 respectively, the electric capacity C14 other end connects the electric capacity C13 other end and ground connection, single-chip microcomputer IC2 pin Vdd connects 5V positive source and resistance R36 respectively, the resistance R36 other end connects single-chip microcomputer IC2 pin VPP and direct earth capacitance C15 respectively, single-chip microcomputer IC2 pin RB4 contact resistance R23, the resistance R23 other end connects ground connection light emitting transistor D5 positive pole, single-chip microcomputer IC2 pin RC3 connects stake resistance R38 and resistance R37 respectively, resistance R37 other end connecting triode V7 base stage, triode V7 grounded emitter, triode V7 collector connects hummer B1, the hummer B1 other end connects 5V positive source, single-chip microcomputer IC2 pin RB7 is contact resistance R39 and resistance R40 respectively, the resistance R40 other end connects ground connection light emitting transistor D6 positive pole, the resistance R39 other end connects stake resistance R41 and triode V8 base stage respectively, triode V8 grounded emitter, triode V8 collector connects hummer B2, the hummer B2 other end connects 9V positive source, single-chip microcomputer IC2 pin RB6 connects storage chip IC3 pin SCL, single-chip microcomputer IC2 pin RB0 connects storage chip IC3 pin SDA, single-chip microcomputer IC2 pin N/C and the equal ground connection of single-chip microcomputer IC2 pin Vss, storage chip IC3 pin Vcc connects 5V positive source, storage chip IC3 pin A0 ~ A4 and the equal ground connection of storage chip IC3 pin Vss.
Tone decoder IC1 model is MT8870, and single-chip microcomputer IC2 model is PIC16C57, and storage chip IC3 model is 24C02.
Single-chip microcomputer IC2 on-chip memory insufficient space, external storage chip IC3 is in order to preserve all kinds of parameters such as telephone number.
Principle of work of the present utility model is: if main frame has recorded alarm voice information and telephone number before use, then when there is alert, except there is the alert sound of high loudness this locality, also after slightly doing time delay, can start the telephone number dialing user's setting in turn.This part function is controlled by pin RC2, RC5 and RC7 in single-chip microcomputer IC2, single-chip microcomputer IC2 pin RB0, RB6 connect with external storage chip IC3, wherein storage chip IC3 pin RB0 is clock control end, storage chip IC3 pin RB6 is the end that reads and writes data, and the external resistor network of storage chip IC3 pin RC4, RC1, RA0, RA1, RA2 and RA3 is touch-tone signal network.After user receives phone, first high level is exported by single-chip microcomputer IC2 pin RC2, the telephone number data that user is arranged is transferred out, outside line is exported to through dual-tone multifrequency resistor network, start to dial the phone that user is arranged, if first group of telephone number is obstructed, is receiving feedback the line is busy and after hang-up signal, main frame can dial again second group of telephone number, moves in circles.
The utility model circuit can also be connected with GSM network, carries out wireless human machine communication.
Claims (3)
1. an intelligent household security system host signal treatment circuit, comprise double-audible frequency circuit, single-chip microcomputer signal processing circuit, number memory circuit, polarity transformation circuits and warning circuit, it is characterized in that, described double-audible frequency circuit comprises tone decoder IC1, resistance R25 and resistance R26, described single-chip microcomputer signal processing circuit comprises single-chip microcomputer IC2, electric capacity C13 and electric capacity C14, described number memory circuit comprises storage chip IC3, described polarity transformation circuits comprises rectifier bridge Q and triode V1, and described warning circuit comprises hummer B1 and hummer B2, described tone decoder IC1 pin IN+ is contact resistance R2 and resistance R4 respectively, the resistance R2 other end connects electric capacity C2, the electric capacity C2 other end connects input signal L1 respectively, input signal L4 and rectifier bridge Q pin 1, described tone decoder IC1 pin IN-is contact resistance R3 and resistance R5 respectively, the resistance R3 other end is contact resistance R1 and tone decoder IC1 pin GS respectively, the resistance R1 other end connects electric capacity C1, the electric capacity C1 other end connects input signal L2 respectively, input signal L3 and rectifier bridge Q pin 3, the described resistance R4 other end is the contact resistance R5 other end and tone decoder IC1 pin YREF respectively, described tone decoder IC1 pin RT/GT is contact resistance R6 and electric capacity C3 respectively, the resistance R6 other end connects tone decoder IC1 pin EST, tone decoder IC1 pin Vss connects electric capacity C3 and ground connection, tone decoder IC1 pin Vdd connects 5V positive source and resistance R31 respectively, resistance R31 other end connecting triode V4 collector, triode V4 base stage connects stake resistance R32 respectively, direct earth capacitance C12 and resistance R30, the resistance R30 other end connects tone decoder IC1 pin TOE and tone decoder IC1 pin Pin NC respectively, described triode V4 grounded emitter, described rectifier bridge Q pin 4 is contact resistance R8 respectively, electric capacity C4 and resistance R34, the resistance R34 other end is contact resistance R33 and triode V5 base stage respectively, triode V5 collector is contact resistance R35 and triode V6 base stage respectively, the resistance R35 other end connects 5V positive source, described triode V5 emitter and the equal ground connection of triode V6 collector, triode V6 emitter connects single-chip microcomputer IC2 pin RC5, the described resistance R33 other end connects rectifier bridge Q pin 2 respectively, resistance R9 and triode V2 emitter, triode V2 collector is connecting triode V1 collector and resistance R11 respectively, triode V1 emitter is the contact resistance R8 other end and resistance R7 respectively, the resistance R7 other end connects the electric capacity C4 other end, described triode V1 base stage is contact resistance R12 respectively, resistance R14, resistance R15 and direct earth capacitance C6, the resistance R14 other end connects electric capacity C5, the electric capacity C5 other end connects stake resistance R13, the described resistance R15 other end connects direct earth capacitance C7 and electric capacity C8 respectively, the electric capacity C8 other end connects direct earth capacitance C10 and resistance R16 respectively, the resistance R16 other end is contact resistance R17 and resistance R29 respectively, the resistance R29 other end connects tone decoder pin Q4 and single-chip microcomputer IC2 pin RA3 respectively, described triode V2 base stage is the contact resistance R9 other end and resistance R10 respectively, resistance R10 other end connecting triode V3 collector, triode V3 grounded emitter, triode V3 base stage contact resistance R42, the resistance R42 other end connects single-chip microcomputer IC2 pin RC2, the described resistance R17 other end is contact resistance R18 and resistance R28 respectively, the resistance R28 other end connects tone decoder IC1 pin Q3 and single-chip microcomputer IC2 pin RA2 respectively, the described resistance R18 other end is contact resistance R19 and resistance R27 respectively, the resistance R27 other end connects tone decoder IC1 pin Q2 and single-chip microcomputer IC1 pin RA1 respectively, the described resistance R19 other end is contact resistance R20 and resistance R26 respectively, the resistance R26 other end connects tone decoder IC1 pin Q1 and single-chip microcomputer IC1 pin RA0 respectively, the described resistance R20 other end is contact resistance R21 and resistance R25 respectively, the resistance R25 other end connects single-chip microcomputer IC2 pin RC1, the described resistance R21 other end connects stake resistance R22 and resistance R24 respectively, the resistance R24 other end connects single-chip microcomputer IC2 pin RC4, described tone decoder IC1 pin INH connects electric capacity C11, the electric capacity C11 other end connects electric capacity C13 respectively, crystal oscillator Y and single-chip microcomputer IC2 pin OSC2, single-chip microcomputer IC2 pin OSC1 connects the crystal oscillator Y other end and electric capacity C14 respectively, the electric capacity C14 other end connects the electric capacity C13 other end and ground connection, described single-chip microcomputer IC2 pin Vdd connects 5V positive source and resistance R36 respectively, the resistance R36 other end connects single-chip microcomputer IC2 pin VPP and direct earth capacitance C15 respectively, described single-chip microcomputer IC2 pin RB4 contact resistance R23, the resistance R23 other end connects ground connection light emitting transistor D5 positive pole, described single-chip microcomputer IC2 pin RC3 connects stake resistance R38 and resistance R37 respectively, resistance R37 other end connecting triode V7 base stage, triode V7 grounded emitter, triode V7 collector connects hummer B1, the hummer B1 other end connects 5V positive source, described single-chip microcomputer IC2 pin RB7 is contact resistance R39 and resistance R40 respectively, the resistance R40 other end connects ground connection light emitting transistor D6 positive pole, the described resistance R39 other end connects stake resistance R41 and triode V8 base stage respectively, triode V8 grounded emitter, triode V8 collector connects hummer B2, the hummer B2 other end connects 9V positive source, described single-chip microcomputer IC2 pin RB6 connects storage chip IC3 pin SCL, single-chip microcomputer IC2 pin RBO connects storage chip IC3 pin SDA, single-chip microcomputer IC2 pin N/C and the equal ground connection of single-chip microcomputer IC2 pin Vss, described storage chip IC3 pin Vcc connects 5V positive source, storage chip IC3 pin A0 ~ A4 and the equal ground connection of storage chip IC3 pin Vss.
2. intelligent household security system host signal treatment circuit according to claim 1, is characterized in that, described tone decoder IC1 model is MT8870, and described single-chip microcomputer IC2 model is PIC16C57, and described storage chip IC3 model is 24C02.
3. intelligent household security system host signal treatment circuit according to claim 1, is characterized in that, described single-chip microcomputer IC2 on-chip memory insufficient space, external storage chip IC3 is in order to preserve all kinds of parameters such as telephone number.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420642857.9U CN204117331U (en) | 2014-10-27 | 2014-10-27 | A kind of intelligent household security system host signal treatment circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420642857.9U CN204117331U (en) | 2014-10-27 | 2014-10-27 | A kind of intelligent household security system host signal treatment circuit |
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| Publication Number | Publication Date |
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| CN204117331U true CN204117331U (en) | 2015-01-21 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201420642857.9U Expired - Fee Related CN204117331U (en) | 2014-10-27 | 2014-10-27 | A kind of intelligent household security system host signal treatment circuit |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106780778A (en) * | 2016-12-05 | 2017-05-31 | 中兴智能视觉大数据技术（湖北）有限公司 | A kind of railway safety check security-protection management system |
-
2014
- 2014-10-27 CN CN201420642857.9U patent/CN204117331U/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106780778A (en) * | 2016-12-05 | 2017-05-31 | 中兴智能视觉大数据技术（湖北）有限公司 | A kind of railway safety check security-protection management system |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20150121 Termination date: 20151027 |
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| EXPY | Termination of patent right or utility model |