CN204103949U - A kind of OOK demodulator circuit - Google Patents
A kind of OOK demodulator circuit Download PDFInfo
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- CN204103949U CN204103949U CN201420547751.0U CN201420547751U CN204103949U CN 204103949 U CN204103949 U CN 204103949U CN 201420547751 U CN201420547751 U CN 201420547751U CN 204103949 U CN204103949 U CN 204103949U
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Abstract
The utility model discloses a kind of OOK demodulator circuit, comprise the transistor amplifier, diode peak envelope detection circuit and the comparator circuit that connect successively; The signal received is amplified by transistor circuit unit by the utility model, then by diode peak envelope detection unit, finally uses integrated transporting discharging to compare device, do level conversion, realize restituted signal and export; Have circuit simple, debugging is convenient, has popularizing value.
Description
Technical field
The utility model relates to a kind of demodulator circuit for the communications field, and concrete is a kind of OOK demodulator circuit.
Background technology
Split type microwave is made up of indoor unit (IDU) and outdoor unit (ODU), and IDU needs to communicate with ODU, is convenient to carry out condition monitoring and optimum configurations to ODU.
OOK(On-Off Keying) be the simplest a kind of ASK modulation, signal source, when sending " 0 ", does not send carrier wave, and when sending " 1 ", send carrier wave, this modulation system realizes simple, and cost is lower.Current IDU and ODU generally adopts asynchronous serial port (UART) to communicate, and modulation system is OOK modulation, and communication construction as shown in Figure 1.OOK demodulation adopts special logarithmic detector chip, has higher dynamic range and receiving sensitivity.Because IDU and ODU is by wire communication, the OOK signal attenuation received depends primarily on IF cable length, and therefore OOK level dynamic range is less.Use logarithmic detector to cause waste, increase system cost.
Utility model content
The purpose of this utility model is to provide a kind of OOK demodulator circuit, replaces logarithmic detector chip, reduces system cost.
The utility model is achieved through the following technical solutions above-mentioned purpose:
A kind of OOK demodulator circuit, comprises the transistor amplifier, diode peak envelope detection circuit and the comparator circuit that connect successively.
Described transistor amplifier comprises: the first triode and the second triode, the first inductance, and the first resistance is to the 7th resistance, and the first electric capacity is to the 6th electric capacity, the base stage of the first described triode respectively with the second end of the first resistance, second end of the 4th electric capacity connects, the first end of the 4th electric capacity is connected with the OOK signal of input, the collector electrode of the first described triode respectively with the first end of the first resistance, the first end of the second electric capacity, the first end of the 3rd electric capacity, the first end of the 6th electric capacity, second end of the 6th resistance, second end of the first inductance connects, second end ground connection of the second described electric capacity, second end ground connection of the 3rd electric capacity, second end ground connection of the 6th electric capacity, the first end of the first inductance is connected with the first end of the first electric capacity, and link+5V voltage, second end ground connection of the first electric capacity, the emitter-base bandgap grading of the first described triode respectively with the first end of the second resistance, the first end of the 5th electric capacity connects, second end ground connection of the second resistance, the base stage of the second described triode respectively with the second end of the 3rd resistance, second end of the 4th resistance, the first end of the 5th resistance connects, the first end of the 3rd resistance is connected with the second end of the 5th electric capacity, second end ground connection of the 5th resistance, the emitter-base bandgap grading of the second triode is connected with the first end of the 7th resistance, second end ground connection of the 7th resistance, the collector electrode of the second triode respectively with the first end of the 6th resistance, the first end of the 4th resistance connects, OOK signal after amplification exports from the collector electrode of the second triode.
Described diode peak envelope detection circuit comprises the 7th electric capacity and the 8th electric capacity, diode, the second inductance, and the 8th resistance is to the tenth resistance; The first end of the 7th described electric capacity connects the collector electrode of above-mentioned transistor amplifier second triode, the first end of described diode is connected with the second end of the second end of the 7th electric capacity, the 8th resistance, the first end of the 9th resistance, the first end of the 8th resistance is connected with the first end of the second inductance, second termination 3.3V of inductance, second end ground connection of the 9th resistance, 3rd end of diode is connected with the first end of the 8th electric capacity, the first end of the tenth resistance respectively, second end ground connection of the 8th electric capacity, the second end ground connection of the tenth resistance; The signal of diode peak envelope detection is from the three-polar output of diode.
Described comparator circuit comprises: integrated transporting discharging, the 9th electric capacity are to the tenth electric capacity, and the 11 resistance is to the 13 resistance, 3rd end of integrated transporting discharging respectively with the second end of the 11 resistance, second end of the 12 resistance connects, the first end ground connection of the 11 resistance, the first end of the 12 resistance respectively with the 8th end of integrated transporting discharging, the first end of the 9th electric capacity, the first end of the tenth electric capacity, and the first end of above-mentioned diode peak envelope detection circuit second inductance is connected, the three-terminal link of the second end of integrated transporting discharging and the diode of above-mentioned diode peak envelope detection circuit, 4th end ground connection of integrated transporting discharging, the first end of the 13 resistance described in first termination of integrated transporting discharging, signal after second termination demodulation of the 13 resistance exports.
As preferably, the first described triode and the second triode adopt MMBT3904LT1G model triode.
As preferably, described diode adopts the diode of BAV99 model.
As preferably, described integrated transporting discharging adopts the integrated transporting discharging of LM258AD model.
The beneficial effects of the utility model are: a kind of OOK demodulator circuit, by transistor circuit unit, the signal received is amplified, then by diode peak envelope detection unit, finally use integrated transporting discharging to compare device, do level conversion, realize restituted signal and export; Have circuit simple, debugging is convenient, has popularizing value.
Accompanying drawing explanation
Fig. 1 is the configuration diagram that IDU and ODU OOK communicates;
Fig. 2 is OOK signal receiving block diagram;
Fig. 3 is OOK demodulator circuit figure.
Embodiment
Below in conjunction with accompanying drawing, the utility model is described in further detail:
As shown in Figure 2, the utility model is a kind of OOK demodulator circuit, comprising: the transistor amplifier connected successively, diode peak envelope detection circuit and comparator circuit.
Described transistor amplifier comprises: the first triode Q1 and the second triode Q2, and the first inductance L 1, first resistance R1 is to the 7th resistance R7, and the first electric capacity C1 is to the 6th electric capacity C6.The base stage of the first triode Q1 respectively with second end of the first resistance R1, second end of the 4th electric capacity C4 connects, the first end of the 4th electric capacity C4 is connected with the OOK signal of input, the collector electrode of the first triode Q1 respectively with the first end of the first resistance R1, the first end of the second electric capacity C2, the first end of the 3rd electric capacity C3, the first end of the 6th electric capacity C6, second end of the 6th resistance R6, second end of the first inductance L 1 connects, the second end ground connection of the second electric capacity C2, the second end ground connection of the 3rd electric capacity C3, the second end ground connection of the 6th electric capacity C6, the first end of the first inductance L 1 is connected with the first end of the first electric capacity C1, and link+5V voltage, the second end ground connection of the first electric capacity C1, the emitter-base bandgap grading of the first triode Q1 respectively with the first end of the second resistance R2, the first end of the 5th electric capacity C5 connects, the second end ground connection of the second resistance R2, the base stage of the second triode Q2 respectively with second end of the 3rd resistance R3, second end of the 4th resistance R4, the first end of the 5th resistance R5 connects, the first end of the 3rd resistance R3 is connected with second end of the 5th electric capacity C5, the second end ground connection of the 5th resistance R5, the emitter-base bandgap grading of the second triode Q2 is connected with the first end of the 7th resistance R7, the second end ground connection of the 7th resistance R7, the collector electrode of the second triode Q2 respectively with the first end of the 6th resistance R6, the first end of the 4th resistance R4 connects.OOK signal after amplification exports from the collector electrode of the second triode Q2.
Described diode peak envelope detection circuit comprises: the 7th electric capacity C7 is to the 8th electric capacity C8, diode D1, and the second inductance L the 2, eight resistance R8 is to the tenth resistance R10.The first end of the 7th electric capacity C7 connects the collector electrode of above-mentioned transistor amplifier second triode Q2, the first end (anode) of diode D1 and second end of the 7th electric capacity C7, second end of the 8th resistance R8, the first end of the 9th resistance R9 connects, the first end of the 8th resistance R8 is connected with the first end of the second inductance L 2, second termination 3.3V of inductance L 2, the second end ground connection of the 9th resistance R9, 3rd end (negative electrode) of diode D1 respectively with the first end of the 8th electric capacity C8, the first end of the tenth resistance R10 connects, the second end ground connection of the 8th electric capacity C8, the second end ground connection of the tenth resistance R10.The signal of diode peak envelope detection exports from the 3rd end (negative electrode) of diode D1.
Described comparator circuit comprises: integrated transporting discharging U1, and the 9th electric capacity C9 is to the tenth electric capacity C10, and the 11 resistance R11 is to the 13 resistance R13.3rd end (positive terminal) of integrated transporting discharging U1 respectively with second end of the 11 resistance R11, second end of the 12 resistance R12 connects, the first end ground connection of the 11 resistance R11, the first end of the 12 resistance R12 respectively with the 8th end (VCC) of integrated transporting discharging U1, the first end of the 9th electric capacity C9, the first end of the tenth electric capacity C10, and the first end of above-mentioned diode peak envelope detection circuit second inductance L 2 is connected, 2nd end (negative phase end) of integrated transporting discharging U1 is connected with the 3rd end (negative electrode) of the diode D1 of above-mentioned diode peak envelope detection circuit, the 4th end ground connection of integrated transporting discharging U1, the first end of the 13 resistance R13 described in first termination of integrated transporting discharging U1, signal after the second termination demodulation of the 13 resistance R13 exports.
The first described triode and the second triode adopt MMBT3904LT1G model triode.
Described diode adopts the diode of BAV99 model.
Described integrated transporting discharging adopts the integrated transporting discharging of LM258AD model.
As shown in Figure 3, a kind of OOK demodulator circuit, comprises the first triode, the second triode, the first inductance, the second inductance, the first resistance to the 13 resistance, the first electric capacity to the tenth electric capacity, fast diode, integrated transporting discharging.The base stage of described first triode respectively with the second end of described first resistance, second end of described 4th electric capacity connects, the first end of the 4th electric capacity is connected with the OOK signal of input, the collector electrode of described first triode respectively with the first end of described first resistance, the first end of described second electric capacity, the first end of described 3rd electric capacity, the first end of described 6th electric capacity, second end of described 6th resistance, second end of described first inductance connects, second end ground connection of described second electric capacity, second end ground connection of described 3rd electric capacity, second end ground connection of described 6th electric capacity, the first end of described first inductance is connected with the first end of described first electric capacity and links+5V voltage, second end ground connection of described first electric capacity, described first triode emitter-base bandgap grading respectively with the first end of described second resistance, the first end of described 5th electric capacity connects, second end ground connection of described second resistance, the base stage of described second triode respectively with the second end of described 3rd resistance, second end of described 4th resistance, the first end of described 5th resistance connects, the first end of described 3rd resistance is connected with the second end of described 5th electric capacity, second end ground connection of described 5th resistance, the collector electrode of described second triode respectively with the first end of described 6th resistance, the first end of described 4th resistance, the first end of described 7th electric capacity connects, the emitter-base bandgap grading of described second triode is connected with the first end of described 7th resistance, second end ground connection of described 7th resistance, the first end (anode) of described diode and the second end of described 7th electric capacity, second end of described 8th resistance, the first end of described 9th resistance connects, second end ground connection of described 9th resistance, 3rd end (negative electrode) of described diode respectively with the 2nd end (negative phase end) of described integrated transporting discharging, the first end of described 8th electric capacity, the first end of described tenth resistance connects, second end ground connection of described 8th electric capacity, second end ground connection of described tenth resistance, 3rd end (positive terminal) of described integrated transporting discharging respectively with the second end of described 11 resistance, second end of described 12 resistance connects, the first end ground connection of described 11 resistance, 8th end of described integrated transporting discharging respectively with the first end of described 8th resistance, the first end of described 12 resistance, the first end of described 9th electric capacity, the first end of described tenth electric capacity, the first end of described second inductance connects, second end ground connection of described 9th electric capacity, second end ground connection of described tenth electric capacity, second termination+3.3V of described second inductance, 4th end ground connection of described integrated transporting discharging, the first end of the 13 resistance described in first termination of described integrated transporting discharging, after second termination demodulation of described 13 resistance, signal is exported.
The operation principle of a kind of OOK of the utility model demodulator circuit is as follows:
The OOK signal received, through the triode emitter follower be made up of Q1, then amplifies signal through the common collector amplifying circuit be made up of Q2, and multiplication factor, by adjustment R6, R7, improves receiving sensitivity; Through capacitance, by R8, R9 dividing potential drop, provide direct current biasing, offset the conducting voltage of diode D1, when making signal less, also detectable; Again through diode peak envelope detection, obtain baseband signal, diode peak envelope detection circuit is made up of D1, C8, R10; The signal amplitude exported due to envelope detection is less, then through the comparator that integrated transporting discharging is formed, does level conversion, exports restituted signal, can be regulated the reference voltage of comparator, to adapt to different input signals by R11 and R12.
Above-mentioned example is the utility model preferably execution mode; but execution mode of the present utility model is not restricted to the described embodiments; the change done under other any does not run counter to Spirit Essence of the present invention and principle, modification, substitute, combine, simplify the substitute mode that all should be equivalence, be included within protection range of the present utility model.
Claims (7)
1. an OOK demodulator circuit, is characterized in that: comprise the transistor amplifier, diode peak envelope detection circuit and the comparator circuit that connect successively.
2. a kind of OOK demodulator circuit according to claim 1, it is characterized in that, described transistor amplifier comprises: the first triode (Q1) and the second triode (Q2), first inductance (L1), first resistance (R1) is to the 7th resistance (R7), and the first electric capacity (C1) is to the 6th electric capacity (C6), the base stage of described the first triode (Q1) respectively with the second end of the first resistance (R1), second end of the 4th electric capacity (C4) connects, the first end of the 4th electric capacity (C4) is connected with the OOK signal of input, the collector electrode of described the first triode (Q1) respectively with the first end of the first resistance (R1), the first end of the second electric capacity (C2), the first end of the 3rd electric capacity (C3), the first end of the 6th electric capacity (C6), second end of the 6th resistance (R6), second end of the first inductance (L1) connects, second end ground connection of described the second electric capacity (C2), second end ground connection of the 3rd electric capacity (C3), second end ground connection of the 6th electric capacity (C6), the first end of the first inductance (L1) is connected with the first end of the first electric capacity (C1), and link+5V voltage, second end ground connection of the first electric capacity (C1), the emitter-base bandgap grading of described the first triode (Q1) respectively with the first end of the second resistance (R2), the first end of the 5th electric capacity (C5) connects, second end ground connection of the second resistance (R2), the base stage of described the second triode (Q2) respectively with the second end of the 3rd resistance (R3), second end of the 4th resistance (R4), the first end of the 5th resistance (R5) connects, the first end of the 3rd resistance (R3) is connected with the second end of the 5th electric capacity (C5), second end ground connection of the 5th resistance (R5), the emitter-base bandgap grading of the second triode (Q2) is connected with the first end of the 7th resistance (R7), second end ground connection of the 7th resistance (R7), the collector electrode of the second triode (Q2) respectively with the first end of the 6th resistance (R6), the first end of the 4th resistance (R4) connects, OOK signal after amplification exports from the collector electrode of the second triode (Q2).
3. a kind of OOK demodulator circuit according to claim 2, it is characterized in that, described diode peak envelope detection circuit comprises the 7th electric capacity (C7) and the 8th electric capacity (C8), diode (D1), second inductance (L2), the 8th resistance (R8) is to the tenth resistance (R10), the first end of the 7th described electric capacity (C7) connects the collector electrode of above-mentioned transistor amplifier second triode (Q2), the first end of described diode (D1) and the second end of the 7th electric capacity (C7), second end of the 8th resistance (R8), the first end of the 9th resistance (R9) connects, the first end of the 8th resistance (R8) is connected with the first end of the second inductance (L2), second termination 3.3V of inductance (L2), second end ground connection of the 9th resistance (R9), 3rd end of diode (D1) respectively with the first end of the 8th electric capacity (C8), the first end of the tenth resistance (R10) connects, second end ground connection of the 8th electric capacity (C8), second end ground connection of the tenth resistance (R10), the signal of diode peak envelope detection is from the three-polar output of diode (D1).
4. a kind of OOK demodulator circuit according to claim 3, it is characterized in that, described comparator circuit comprises: integrated transporting discharging (U1), the 9th electric capacity (C9) are to the tenth electric capacity (C10), and the 11 resistance (R11) is to the 13 resistance (R13), 3rd end of integrated transporting discharging (U1) respectively with the second end of the 11 resistance (R11), second end of the 12 resistance (R12) connects, the first end ground connection of the 11 resistance (R11), the first end of the 12 resistance (R12) respectively with the 8th end (VCC) of integrated transporting discharging (U1), the first end of the 9th electric capacity (C9), the first end of the tenth electric capacity (C10), and the first end of above-mentioned diode peak envelope detection circuit second inductance (L2) is connected, the three-terminal link of the second end of integrated transporting discharging (U1) and the diode (D1) of above-mentioned diode peak envelope detection circuit, 4th end ground connection of integrated transporting discharging (U1), the first end of the 13 resistance (R13) described in first termination of integrated transporting discharging (U1), signal after second termination demodulation of the 13 resistance (R13) exports.
5. a kind of OOK demodulator circuit according to Claims 2 or 3 or 4, is characterized in that, described the first triode (Q1) and the second triode (Q2) adopt MMBT3904LT1G model triode.
6. a kind of OOK demodulator circuit according to claim 3 or 4, is characterized in that, described diode (D1) adopts the diode of BAV99 model.
7. a kind of OOK demodulator circuit according to claim 4, is characterized in that, described integrated transporting discharging (U1) adopts the integrated transporting discharging of LM258AD model.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420547751.0U CN204103949U (en) | 2014-09-23 | 2014-09-23 | A kind of OOK demodulator circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420547751.0U CN204103949U (en) | 2014-09-23 | 2014-09-23 | A kind of OOK demodulator circuit |
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| Publication Number | Publication Date |
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| CN204103949U true CN204103949U (en) | 2015-01-14 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420547751.0U Active CN204103949U (en) | 2014-09-23 | 2014-09-23 | A kind of OOK demodulator circuit |
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| CN (1) | CN204103949U (en) |
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- 2014-09-23 CN CN201420547751.0U patent/CN204103949U/en active Active
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| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
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| CP03 | Change of name, title or address |
Address after: 430205 Hubei city of Wuhan province Jiangxia Hidden Dragon Island Tan lake two Road No. 1 Patentee after: CITIC Mobile Communication Technology Co., Ltd Address before: 430073 Hubei province Wuhan Dongxin East Lake high tech Development Zone, Road No. 5 Patentee before: Wuhan Hongxin Telecommunication Technologies Co.,Ltd. |
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| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 430205 No.1 tanhu 2nd Road, Canglong Island, Jiangxia District, Wuhan City, Hubei Province Patentee after: CITIC Mobile Communication Technology Co.,Ltd. Address before: 430205 No.1 tanhu 2nd Road, Canglong Island, Jiangxia District, Wuhan City, Hubei Province Patentee before: CITIC Mobile Communication Technology Co., Ltd |