CN203104510U - Mixed modulation and demodulation circuit based on OFDM - Google Patents
Mixed modulation and demodulation circuit based on OFDM Download PDFInfo
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- CN203104510U CN203104510U CN 201320041129 CN201320041129U CN203104510U CN 203104510 U CN203104510 U CN 203104510U CN 201320041129 CN201320041129 CN 201320041129 CN 201320041129 U CN201320041129 U CN 201320041129U CN 203104510 U CN203104510 U CN 203104510U
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Abstract
The utility model puts forward a mixed modulation and demodulation circuit based on OFDM. The mixed modulation and demodulation circuit based on OFDM comprises a serial port, an input and output interface, a synchronous serial interface, a microprocessor, a flash memory module, a storage device, a digital-to-analog conversion module, a low pass filtering circuit, a power amplification circuit, a coupling device, an analog-to-digital conversion circuit, an amplifying device and a band pass filtering circuit, wherein the serial port, the input and output interface and the synchronous serial interface are respectively and electrically connected with the microprocessor; modulation output signals of the microprocessor are transmitted to the coupling device orderly through the digital-to-analog conversion module, the low pass filtering circuit and the power amplification circuit; signals which need to be demodulated and are output by the coupling device are transmitted to the microprocessor orderly through the band pass filtering circuit, the amplifying device, and the digital-to-analog conversion module; and the microprocessor is electrically connected with the flash memory module and the storage device. The utility model provides the mixed modulation and demodulation circuit based on OFDM, wherein the mixed modulation and demodulation circuit based on OFDM is characterized by high speed and stability.
Description
Technical field
The utility model relates to electronic applications, refers in particular to a kind of based on OFDM hybrid modulation demodulator circuit.
Background technology
Power carrier communication is to utilize power line to carry out a kind of specific communication mode of transfer of data as information transmitting medium, and is along with the continuous development of power line carrier technology, also increasing to the demand of power line carrier, PLC.And in evolution, orthogonal frequency division multiplexer (OFDM) modulation is the modal mode of a kind of solution power line communication.OFDM changes into into the parallel signal of multichannel with the serial signal of low speed, and is carried in the sub-band of a plurality of quadratures and transmits, and greatly reduces the interference and the power line decay of signal, thereby has improved the reliability of communication.
The problem that existing technology exists is the problem of high peak-to-average force ratio of OFDM and speed.Maximum effect that high peak-to-average force ratio brings is on the power amplifier of transmitting terminal and receiving terminal.General power amplifier is not linear, and its dynamic range is limited, therefore in ofdm system, when the signal that this variation is bigger passes through non-linear components, signal can produce nonlinear distortion, produce harmonic wave, cause significantly spread spectrum interference and inband signaling distortion door to cause whole system system to descend.And carrier communication speed is slow more, and then signal attenuation is many more, the easy more distortion of signal.
The utility model content
The utility model provides a kind of high speed and stable based on OFDM hybrid modulation demodulator circuit.
A kind of based on OFDM hybrid modulation demodulator circuit, comprising: serial ports, input/output interface, synchronous serial interface, microprocessor, flash memory module, memory, D/A converter module, low-pass filter circuit, power amplification circuit, coupling device, analog to digital conversion circuit, amplifier, bandwidth-limited circuit; Wherein serial ports, input/output interface, synchronous serial interface electrically connect with microprocessor respectively; The modulated output signal of microprocessor passes through D/A converter module, low-pass filter circuit, power amplification circuit successively to coupling device; The need restituted signal of coupling device output passes through bandwidth-limited circuit, amplifier, analog to digital conversion circuit successively to microprocessor; Microprocessor also electrically connects flash memory module and memory.
Preferably, coupling device, bandwidth-limited circuit, amplifier are formed frequency-selecting and are received amplifying circuit, comprise coupling circuit, the one-level parallel resonance frequency selection circuit, bandwidth-limited circuit and the secondary frequency-selecting gain amplifying circuit that electrically connect successively.
Preferably, coupling circuit comprises inductance L 1, diode D1, diode D2, capacitor C 5, resistance R 3, resistance R 2, capacitor C 4, resistance R 4, capacitor C 12, resistance R 22 and capacitor C 25; Wherein inductance L 1, diode D1, diode D2 and resistance R 3 parallel with one another and end ground connection, the other end and one-level parallel resonance frequency selection circuit; Series capacitance C5 between diode D2 and the resistance R 3; Series resistance R2 between resistance R 3 and the capacitor C 4, and capacitor C 4 is connected power supply, the other end ground connection of capacitor C 4 with the node that resistance R 2 links to each other; Capacitor C 25 1 end ground connection, an end is connected on capacitor C 4 and resistance R 2 and the node that power supply links to each other by R22.
Preferably, one-level parallel resonance frequency selection circuit, bandwidth-limited circuit and secondary frequency-selecting gain amplifying circuit comprise triode N1, resistance R 4, capacitor C 12, capacitor C 6, inductor L2, resistance R 5, capacitor C 8, triode N2, capacitor C 13, resistance R 6, capacitor C 9, inductor L3, capacitor C 10 and resistance R 7; Wherein the base stage of triode N1 is connected with coupling circuit, and emitter passes through resistance R 4 ground connection, the last shunt capacitance C12 of R4, and collector electrode is connected on 1 pin of inductor L2; Be connected between 1 pin of inductor L2 and 3 pin that capacitor C 6,7 pin are connected with 8 pin and ground connection, 2 pin connect power supply, and 4 pin are connected with the base stage of triode N2, and 6 pin pass through capacitor C 8 ground connection, and 6 pin also pass through resistance R 5 and are connected with external circuit; The emitter of triode N2 passes through resistance R 6 ground connection, shunt capacitance C13 on the resistance R 6, and collector electrode is connected with 1 pin of inductor L3; Be connected capacitor C 9,2 pin between 1 pin of inductor L3 and 3 pin and connect power supply, 7 pin are connected and ground connection with 8 pin, and 6 pin are by capacitor C 10 ground connection, and 6 pin are also by resistance R 7 external circuitry.
The utility model thinks that microprocessor is the control core, carries out the algorithm of OFDM, the transmission of control data, and amplify by two-stage frequency-selecting gain, and therefore every grade of Signal Spacing can provide at a high speed and stable based on OFDM hybrid modulation demodulator circuit.
Description of drawings
In order to be illustrated more clearly in the utility model embodiment or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is embodiment more of the present utility model, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is a kind of electronic circuit block diagram based on OFDM hybrid modulation demodulator circuit of the utility model;
Fig. 2 is the circuit diagram of frequency-selecting and reception amplifying circuit.
Embodiment
Below in conjunction with the accompanying drawing among the utility model embodiment, the technical scheme among the utility model embodiment is clearly and completely described, obviously, described embodiment only is the utility model part embodiment, rather than whole embodiment.Based on the embodiment in the utility model, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the utility model protection.
Please participate in Fig. 1, a kind of based on OFDM hybrid modulation demodulator circuit, comprising: serial ports, input/output interface, synchronous serial interface, microprocessor, flash memory module, memory, D/A converter module, low-pass filter circuit, power amplification circuit, coupling device, analog to digital conversion circuit, amplifier, bandwidth-limited circuit; Wherein serial ports, input/output interface, synchronous serial interface electrically connect with microprocessor respectively; The modulated output signal of microprocessor passes through D/A converter module, low-pass filter circuit, power amplification circuit successively to coupling device; The need restituted signal of coupling device output passes through bandwidth-limited circuit, amplifier, analog to digital conversion circuit successively to microprocessor; Microprocessor also electrically connects flash memory module and memory.
Be about on the utility model the data that need to send by the serial ports collection after through little processing encode, data interlacing, modulation and Fourier transform, and deliver to D/A converter module after adding circulation prefix processing, exporting by low-pass filter circuit then, amplify by power amplifier again, power amplifier adopts class D amplifier, sending into power line through coupling device then, coupling device adopts the amorphous magnet ring.When descending, coupling device received signal from the power line, the signal that the signal that receives carries out 120db again through too high 8 rank bandwidth-limited circuit filtering amplifies, sending into microprocessor by analog to digital conversion circuit then handles, the main process of microprocessor processes comprises signal Synchronization, channel estimating is removed Cyclic Prefix, Fourier transform deinterleaving and decoding.
The up radiating circuit of the utility model adopts class D amplifier, and emitter-base bandgap grading transformer output load capacity is strong, and line impedance changes little, and circuit conversion efficient has guaranteed limited transmitted power than higher.
Preferably, see also Fig. 2, coupling device, bandwidth-limited circuit, amplifier are formed frequency-selecting and are received amplifying circuit, comprise coupling circuit, the one-level parallel resonance frequency selection circuit, bandwidth-limited circuit and the secondary frequency-selecting gain amplifying circuit that electrically connect successively.
Preferably, coupling circuit comprises inductance L 1, diode D1, diode D2, capacitor C 5, resistance R 3, resistance R 2, capacitor C 4, resistance R 4, capacitor C 12, resistance R 22 and capacitor C 25; Wherein inductance L 1, diode D1, diode D2 and resistance R 3 parallel with one another and end ground connection, the other end and one-level parallel resonance frequency selection circuit; Series capacitance C5 between diode D2 and the resistance R 3; Series resistance R2 between resistance R 3 and the capacitor C 4, and capacitor C 4 is connected power supply, the other end ground connection of capacitor C 4 with the node that resistance R 2 links to each other; Capacitor C 25 1 end ground connection, an end is connected on capacitor C 4 and resistance R 2 and the node that power supply links to each other by R22.
Preferably, one-level parallel resonance frequency selection circuit, bandwidth-limited circuit and secondary frequency-selecting gain amplifying circuit comprise triode N1, resistance R 4, capacitor C 12, capacitor C 6, inductor L2, resistance R 5, capacitor C 8, triode N2, capacitor C 13, resistance R 6, capacitor C 9, inductor L3, capacitor C 10 and resistance R 7; Wherein the base stage of triode N1 is connected with coupling circuit, and emitter passes through resistance R 4 ground connection, the last shunt capacitance C12 of R4, and collector electrode is connected on 1 pin of inductor L2; Be connected between 1 pin of inductor L2 and 3 pin that capacitor C 6,7 pin are connected with 8 pin and ground connection, 2 pin connect power supply, and 4 pin are connected with the base stage of triode N2, and 6 pin pass through capacitor C 8 ground connection, and 6 pin also pass through resistance R 5 and are connected with external circuit; The emitter of triode N2 passes through resistance R 6 ground connection, shunt capacitance C13 on the resistance R 6, and collector electrode is connected with 1 pin of inductor L3; Be connected capacitor C 9,2 pin between 1 pin of inductor L3 and 3 pin and connect power supply, 7 pin are connected and ground connection with 8 pin, and 6 pin are by capacitor C 10 ground connection, and 6 pin are also by resistance R 7 external circuitry.
The utility model adopts one-level parallel resonance frequency selection circuit, and the frequency-selecting gain can be arrived 60db, adopts two-stage frequency-selecting gain to amplify, and amplifies the frequency-selecting gain and can arrive 80db, every grade of Signal Spacing.
The utility model thinks that microprocessor is the control core, carries out the algorithm of OFDM, the transmission of control data, and amplify by two-stage frequency-selecting gain, and therefore every grade of Signal Spacing can provide at a high speed and stable based on OFDM hybrid modulation demodulator circuit.
The above only is preferred embodiment of the present utility model; not in order to restriction the utility model; all within spirit of the present utility model and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within the protection range of the present utility model.
Claims (4)
1. one kind based on OFDM hybrid modulation demodulator circuit, it is characterized in that, comprising: serial ports, input/output interface, synchronous serial interface, microprocessor, flash memory module, memory, D/A converter module, low-pass filter circuit, power amplification circuit, coupling device, analog to digital conversion circuit, amplifier, bandwidth-limited circuit; Wherein serial ports, input/output interface, synchronous serial interface electrically connect with microprocessor respectively; The modulated output signal of microprocessor passes through D/A converter module, low-pass filter circuit, power amplification circuit successively to coupling device; The need restituted signal of coupling device output passes through bandwidth-limited circuit, amplifier, analog to digital conversion circuit successively to microprocessor; Microprocessor also electrically connects flash memory module and memory.
2. as claimed in claim 1 a kind of based on OFDM hybrid modulation demodulator circuit, it is characterized in that: coupling device, bandwidth-limited circuit, amplifier are formed frequency-selecting and are received amplifying circuit, comprise coupling circuit, the one-level parallel resonance frequency selection circuit, bandwidth-limited circuit and the secondary frequency-selecting gain amplifying circuit that electrically connect successively.
3. as claimed in claim 2 a kind of based on OFDM hybrid modulation demodulator circuit, it is characterized in that: coupling circuit comprises inductance L 1, diode D1, diode D2, capacitor C 5, resistance R 3, resistance R 2, capacitor C 4, resistance R 4, capacitor C 12, resistance R 22 and capacitor C 25; Wherein inductance L 1, diode D1, diode D2 and resistance R 3 parallel with one another and end ground connection, the other end and one-level parallel resonance frequency selection circuit; Series capacitance C5 between diode D2 and the resistance R 3; Series resistance R2 between resistance R 3 and the capacitor C 4, and capacitor C 4 is connected power supply, the other end ground connection of capacitor C 4 with the node that resistance R 2 links to each other; Capacitor C 25 1 end ground connection, an end is connected on capacitor C 4 and resistance R 2 and the node that power supply links to each other by R22.
4. as claimed in claim 2 a kind of based on OFDM hybrid modulation demodulator circuit, it is characterized in that: one-level parallel resonance frequency selection circuit, bandwidth-limited circuit and secondary frequency-selecting gain amplifying circuit comprise triode N1, resistance R 4, capacitor C 12, capacitor C 6, inductor L2, resistance R 5, capacitor C 8, triode N2, capacitor C 13, resistance R 6, capacitor C 9, inductor L3, capacitor C 10 and resistance R 7; Wherein the base stage of triode N1 is connected with coupling circuit, and emitter passes through resistance R 4 ground connection, the last shunt capacitance C12 of R4, and collector electrode is connected on 1 pin of inductor L2; Be connected between 1 pin of inductor L2 and 3 pin that capacitor C 6,7 pin are connected with 8 pin and ground connection, 2 pin connect power supply, and 4 pin are connected with the base stage of triode N2, and 6 pin pass through capacitor C 8 ground connection, and 6 pin also pass through resistance R 5 and are connected with external circuit; The emitter of triode N2 passes through resistance R 6 ground connection, shunt capacitance C13 on the resistance R 6, and collector electrode is connected with 1 pin of inductor L3; Be connected capacitor C 9,2 pin between 1 pin of inductor L3 and 3 pin and connect power supply, 7 pin are connected and ground connection with 8 pin, and 6 pin are by capacitor C 10 ground connection, and 6 pin are also by resistance R 7 external circuitry.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320041129 CN203104510U (en) | 2013-01-24 | 2013-01-24 | Mixed modulation and demodulation circuit based on OFDM |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201320041129 CN203104510U (en) | 2013-01-24 | 2013-01-24 | Mixed modulation and demodulation circuit based on OFDM |
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| CN203104510U true CN203104510U (en) | 2013-07-31 |
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| CN 201320041129 Expired - Fee Related CN203104510U (en) | 2013-01-24 | 2013-01-24 | Mixed modulation and demodulation circuit based on OFDM |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103427790A (en) * | 2013-08-09 | 2013-12-04 | 华南理工大学 | Frequency-selecting amplification circuit for measurement of weak signal |
| CN110336579A (en) * | 2019-07-16 | 2019-10-15 | 武汉磐索地勘科技有限公司 | The untethered feeler lever communication means of tandem type and circuit |
-
2013
- 2013-01-24 CN CN 201320041129 patent/CN203104510U/en not_active Expired - Fee Related
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103427790A (en) * | 2013-08-09 | 2013-12-04 | 华南理工大学 | Frequency-selecting amplification circuit for measurement of weak signal |
| CN103427790B (en) * | 2013-08-09 | 2016-10-05 | 华南理工大学 | A kind of selective frequency amplifier circuit of Weak absorption |
| CN110336579A (en) * | 2019-07-16 | 2019-10-15 | 武汉磐索地勘科技有限公司 | The untethered feeler lever communication means of tandem type and circuit |
| CN110336579B (en) * | 2019-07-16 | 2024-06-07 | 武汉磐索地勘科技有限公司 | Cascade type cable-free probe rod communication method and circuit |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20130731 Termination date: 20200124 |
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| CF01 | Termination of patent right due to non-payment of annual fee |