CN204064959U - Based on the high speed web inspection system of Camera Link interface - Google Patents
Based on the high speed web inspection system of Camera Link interface Download PDFInfo
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- CN204064959U CN204064959U CN201420012937.6U CN201420012937U CN204064959U CN 204064959 U CN204064959 U CN 204064959U CN 201420012937 U CN201420012937 U CN 201420012937U CN 204064959 U CN204064959 U CN 204064959U
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Abstract
The utility model relates to a kind of web inspection system, and particularly based on the high speed web inspection system of Camera Link interface, it comprises: image capture module: be responsible for gathering picture number from paper machine; Image processing module: come by FPGA+DSP, is responsible for by process such as Iamge Segmentation by paper defect testing out; Display module: for real time inspection paper image go forward side by side line parameter arrange, be responsible for the display carrying out paper image at host computer; Wherein adopt Camera Link interface to communicate between image capture module and image processing module, image capture module is made up of CCD linear array.This invention has data and transmits fast feature.
Description
(1) technical field
The present invention relates to a kind of web inspection system, particularly based on the high speed web inspection system of Camera Link interface.
(2) background technology
The surface imperfection of paper is the key factor affecting paper quality, and surperficial paper defect testing has very important effect for raising quality of finished paper.Along with the raising of modern paper technology, paper machine speed also improves constantly, and paper is faced with the risk of the more defects of appearance, and it is unrealistic that artificial naked eyes detect paper defect, therefore occurred web inspection system.
Web inspection system, WIS(Web Inspection System) be one of current widely accepted paper-making process detection system, it can provide comprehensively supervision to the production run of paper and cardboard and measure.The ULMA product of ABB company is online paper web detection system the earliest.At the initial stage seventies, its adopts photo transistor sensor, infrared light light source and additional output alarm signal and driving color marker and printer.The primary limitation of this system is that it can not detect trimming (trimming breach) and can not detect that continuous print paper defects is as pleat and scratch etc.Only can detect simple paper defects, as eye, spot etc.
First domestic web inspection system is the SYWIS3000 paper defect testing separation system that double base company of Zhejiang University releases in 2004 annual proper motion exploitations, and the said firm is proposed again SYWIS3200 web inspection system subsequently.Current domestic field of papermaking is all use these two kinds of web inspection systems substantially, and for SYWIS3000, gamma camera CCD linear array is lined by line scan to paper web, generates real-time detection of dynamic image by data processing.The length of the scanning area of every platform gamma camera is approximately 800 millimeters, and the striped of record comprises 2,000 images.Reading speed 20,000 time/second, the large I of the longitudinal paper defect testing of paper machine reaches 0.3-2.0 millimeter (depending on paper motor speed and camera number).But along with the requirement that the raising of modern paper technology and the modern life, production are growing to paper quality, need the paper surface defect kind detected to get more and more also to become increasingly complex, this just means that paper defect testing algorithm becomes increasingly complex, namely the data volume transmitted is increasing, and it is more and more slower that this also causes existing web inspection system data to be transmitted.
(3) summary of the invention
The present invention, in order to make up the defect of prior art, provides the high speed paper defect testing based on Camera Link interface that a kind of transmission speed is fast.
The present invention is achieved through the following technical solutions:
Based on the high speed web inspection system of Camera Link interface, comprising:
Image capture module: be responsible for gathering picture number from paper machine;
Image processing module: come by FPGA+DSP, is responsible for by process such as Iamge Segmentation by paper defect testing out;
Display module; For real time inspection paper image go forward side by side line parameter arrange, be responsible for the display carrying out paper image at host computer;
Camera Link interface is wherein adopted to communicate between image capture module and image processing module, image processing module is connected by netting twine with display module, it is characterized in that, described image capture module is made up of the highly sensitive black and white line array camera of DALSA Spyder 3 CL, and described Camera Link interface adopts a Camera Link chip and a cable.
Described camera connects image pick-up card by MDR26.
Described image capture module adopts DS90LV047 as image pick-up card, is used for sending outer synchronous triggering signal and conversion command to camera; Described image processing module adopts DS90LV048 chip as image processing system receiver, is used for receiving the acknowledge character string that camera sends to image processing system; DS90LV048 chip is selected to be converted to the driver of cmos signal as four-way LVDS differential signal.
The signal of described Camera Link comprises video, camera control, serial communication three parts; For 5 pairs of differential output signals of video section, select DS90CR288 as receiving chip; Camera controlling part selects differential driving chip DS90LV07A to be used for driving 4 pairs of differential signals; Serial communication part is selected to be had the 1 pair of difference and to send and the chip DS90LV019 of 1 pair of differential received converts differential pair signal to LVTTL signal, then through RS-232 level transferring chip MAX232 directly and microcomputer communication.
The invention has the beneficial effects as follows:
(1) Camera Link interface is used for quick paper defect testing by the present invention.To be that 655MBits/s, Channel Link interface is the highest also can only reach 1.8GBits/s to traditional LVDS interface peak transfer rate.The Camera Link interface that the present invention uses is under Full Camera Link configuration mode, and its peak transfer rate can reach 4.8Gbits/s, far above conventional transmission modes such as Channel Link and LVDS.Nowadays it not only can meet the large-scale data transmission in quick web inspection system, and have certain extendability.In fact, this Interface Expanding Channel Link technology, provides the closed specification of vision application.
(2) require that occasion is different according to application, Camera Link provides (Base), middle-grade (Medium), all (Full) etc. substantially and supports form, can according to the unrestricted choice such as resolution, speed.
(4) accompanying drawing explanation
Below in conjunction with accompanying drawing, the present invention is further illustrated.
Fig. 1 is basic structure schematic diagram of the present invention;
Fig. 2 is standard 3M company SDR attachment unit interface schematic diagram;
Fig. 3 is standard 3M company SDR connector pinout schematic diagram;
Fig. 4 is the signal wiring block diagram of Camera Link;
Fig. 5 is Base Camera Link pattern diagram.
(5) embodiment
Accompanying drawing is specific embodiments of the invention.This kind, based on the high speed web inspection system of Camera Link interface, comprising:
Image capture module: be made up of CCD line-scan digital camera, is responsible for gathering picture number from paper machine;
Image processing module: come by FPGA+DSP, is responsible for by process such as Iamge Segmentation by paper defect testing out;
Display module; For real time inspection paper image go forward side by side line parameter arrange, be responsible for the display carrying out paper image at host computer;
Camera Link interface is wherein adopted to communicate between image capture module and image processing module.
Basic structure of the present invention as shown in Figure 1, the CCD line-scan digital camera be contained in above paper machine carries out quick shooting, collecting to paper, view data by Camera Link interface be sent to fast FPGA carry out pre-service after a road be sent to VGA display, another road is sent to DSP and is done process further and detect paper defects, and result is presented on PC by netting twine.
The course of work of the present invention is as follows: in paper machine production paper process, the CCD line-scan digital camera be contained in above paper machine carries out quick shooting, collecting to paper, view data by Camera Link interface be sent to fast FPGA carry out pre-service after a road be sent to VGA display, another road is sent to DSP and is done further process and detect paper defects.
Wherein: image acquisition modality: CCD line-scan digital camera adopts DALSA Spyder 3 CL highly sensitive black and white line array camera S3-20-02K40-00-R, Spyder 3 CL Series Industrial camera, for Spyder 2, has the speed of responsiveness higher than 3 times and 2 times.It has employed double line scanning technology, reaches the transmission speed of high-responsivity and 80M pixel per second.Except its high-performance and high performance-price ratio, Spyder 3 CL also has some advanced features such as flat field correction and CDS (correlated-double-sampling) etc., because Spyder series is based on identical optical design, so upgrading is convenient.Due to Spyder 3 CL characteristic it be widely used in various industrial detection occasion.
Image processing module: this module is primarily of FPGA and dsp chip composition, FPGA process chip selects the EP3C40F484C8 of Altera, the design of compatible EP3C16F484C8, supports the data input and output of Camera Link, mainly for the treatment of high-definition image input signal, carry out intellectual analysis.DSP process chip selects the TMS320C6455 of TI as master chip, can be used for high-speed data, video signal detection, the application such as analysis.
Image display: namely the image of host computer accepts display client.After FPGA receives Camera Link video flowing, point two kinds of mode process, one, transmission process, is sent to DSP by pixel, analyzes and process for DSP.Its two, Graphics Processing, after SDRAM buffer memory, uses VGA output display.After DSP analyzing and processing, data show at host computer by netting twine, and in addition, this module can also arrange video parameter and video data is saved as file.
Camera Link interface adopts the SDR connector of 3M company, signal definition with reference to definition standard, as shown in Figure 2, pin as shown in Figure 3:
The signal wiring block diagram of Camera Link as shown in Figure 4.In view of current paper sheet speed is not also very fast, this system selects Base Camera Link pattern here, as shown in Figure 5.Hardware circuit comprises 3 parts: camera connects image pick-up card by MDR26; The LVDS signal of CameraLink interface and cmos signal change-over circuit; FPGA receives camera data and sends control section.
In order to carry out the control of external trigger mode to camera and send order to camera, be converted to the chip of LVDS differential signal with four-way cmos signal.DS90LV047, as image pick-up card, sends outer synchronous triggering signal and conversion command to camera.Because DS-21-02M30 camera only uses CC1, the image pick-up card that FPGA is formed, is realized by CC1 and SerTC signal the control of camera.In order to receive the acknowledge character string that camera sends to image processing system, select DS90LV048 chip as image processing system receiver.DS90LV048 chip is the driver that four-way LVDS differential signal is converted to cmos signal.The signal of Camera Link comprises video, camera control, serial communication three parts.Video section is the core of Camera Link, mainly comprises 5 pairs of differential signals, i.e. X0-~ X0+, X1-~ X1+, X2-~ X2+, X3-~ X3+, Xclk-~ Xclk+; Camera control comprises 4 pairs of differential signals, i.e. CC1-~ CC1+, CC2-~ CC2+, CC3-~ CC3+, CC4-~ CC4+; Serial communication part comprises 2 pairs of differential signals, i.e. SerTC-~ SerTC+ and SerTFG-~ SerTFG+.Video section transmitting terminal, by the data-signal of 28 and 1 clock signal, converts data to 5 pairs of differential signals in the ratio of 7:1, and 5 pairs of differential signals are then converted to data-signal and 1 clock signal of 28 by receiving end.For 5 pairs of differential output signals of video section, Channel Link is selected to turn the chip DS90CR288 of TTL/CMOS as receiving chip, receive 4 pairs of differential data signals and 1 pair of differential clock signal, export 28 bit data and 1 tunnel clock signal, and this chip by maximum clock frequency can reach 85MHz.
Camera controlling part comprises 4 pairs of differential signals, and camera production firm can carry out different definition according to different cameras to these four signals.Here select differential driving chip DS90LV07A, this chip just can drive 4 pairs of differential signals.
Serial communication part comprises 2 pairs of differential signals, and serial communication is defined as asynchronous communication model, can be arranged by serial communication to the various parameters of camera.Select and there is the 1 pair of difference to send and the chip DS90LV019 of 1 pair of differential received just can convert differential pair signal to LVTTL signal, convert RS-232 level to through RS-232 level transferring chip MAX232 more afterwards, like this can directly and microcomputer communication.
Because single Camera Link chip only has 28 bit data to use, some camera, in order to improve the efficiency of transmission data, needs several Camera Link chip.Different by request for utilization, be divided into three kinds of configurations: basic configuration is a Camera Link chip, a cable; Middle-gradely be configured to two Camera Link chips, a cable; All be configured to two Camera Link chips, two cables.
Because the camera selected belongs to basic configuration, therefore mainly introduce the detailed description of 28 bit data under this configuration here.28 bit data signals comprise three FPDP: A mouth (8), B mouth (8), C mouth (8), with four video control signal FVAL (frame is effective), DVAL (data are effective), LVAL (row effectively), SPARE (empty, temporarily not use).Clock signal after the conversion of Camera Link chip is the synchronized signal of whole camera, all data and video control signal all with this clock signal synchronization.
Except technical characteristic described in instructions, all the other technical characteristics are those skilled in the art's known technology.
Claims (4)
1., based on the high speed web inspection system of Camera Link interface, comprising:
Image capture module: be responsible for gathering picture number from paper machine;
Image processing module: come by FPGA+DSP, is responsible for by process such as Iamge Segmentation by paper defect testing out;
Display module; For real time inspection paper image go forward side by side line parameter arrange, be responsible for the display carrying out paper image at host computer;
Camera Link interface is wherein adopted to communicate between image capture module and image processing module, image processing module is connected by netting twine with display module, it is characterized in that, described image capture module is made up of the highly sensitive black and white line array camera of DALSA Spyder 3 CL, and described Camera Link interface adopts a Camera Link chip and a cable.
2. the high speed web inspection system based on Camera Link interface according to claim 1, it is characterized in that, described camera connects image pick-up card by MDR26.
3. the high speed web inspection system based on Camera Link interface according to claim 2, is characterized in that, described image capture module adopts DS90LV047 as image pick-up card, is used for sending outer synchronous triggering signal and conversion command to camera; Described image processing module adopts DS90LV048 chip as image processing system receiver, is used for receiving the acknowledge character string that camera sends to image processing system; DS90LV048 chip is selected to be converted to the driver of cmos signal as four-way LVDS differential signal.
4. the high speed web inspection system based on Camera Link interface according to claim 3, is characterized in that, the signal of Camera Link comprises video, camera control, serial communication three parts; For 5 pairs of differential output signals of video section, select DS90CR288 as receiving chip; Camera controlling part selects differential driving chip DS90LV07A to be used for driving 4 pairs of differential signals; Serial communication part is selected to be had the 1 pair of difference and to send and the chip DS90LV019 of 1 pair of differential received converts differential pair signal to LVTTL signal, then through RS-232 level transferring chip MAX232 directly and microcomputer communication.
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CN201420012937.6U CN204064959U (en) | 2013-10-18 | 2014-01-09 | Based on the high speed web inspection system of Camera Link interface |
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CN201310489524.7 | 2013-10-18 | ||
CN201310489524.7A CN103499587A (en) | 2013-10-18 | 2013-10-18 | High-speed paper defect detecting system based on Camera Link interface |
CN201420012937.6U CN204064959U (en) | 2013-10-18 | 2014-01-09 | Based on the high speed web inspection system of Camera Link interface |
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CN103763549B (en) * | 2014-01-13 | 2016-02-24 | 昆明理工大学 | A kind of Camera Link interface experiment based on FPGA and development system |
CN106018409B (en) * | 2016-06-29 | 2019-04-16 | 哈尔滨工程大学 | A kind of identifying system and its detection recognition method of airfield runway foreign matter and crackle |
CN113504241A (en) * | 2021-07-13 | 2021-10-15 | 陕西科技大学 | Design method of paper defect detection system |
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