CN204028271U - A kind of loop on off test instrument - Google Patents
A kind of loop on off test instrument Download PDFInfo
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- CN204028271U CN204028271U CN201420353304.1U CN201420353304U CN204028271U CN 204028271 U CN204028271 U CN 204028271U CN 201420353304 U CN201420353304 U CN 201420353304U CN 204028271 U CN204028271 U CN 204028271U
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Abstract
The utility model discloses a kind of loop on off test instrument, and it comprises processing unit, some detecting units, data transmission unit, alarm unit, display unit.This processing unit comprises controlling alarm end and some detection control ends, these some detection control ends connect respectively the controlled end of these some detecting units, a part of output terminal in these some detecting units connects this data transmission unit, all the other output terminals in these some detecting units connect this display unit, and this controlling alarm end connects this alarm unit.It is bad greatly that the utility model can solve break-make, mispairing, short circuit in whole loops etc. three, some detecting units utilize respectively display unit to indicate, connecting after product display unit by frock does not show and sends caution sound by alarm unit and represent to test OK, product is qualified, otherwise, can not send caution sound, and display unit show represent corresponding loop have bad phenomenon, therefore the utility model uses very easy.
Description
Technical field
The utility model relates to a kind of testing tool, relates in particular to a kind of loop on off test instrument.
Background technology
That medium and small wire harness processing enterprise testing apparatus drops into is high, particularly carrying out after lean production as solving the problems such as equipment investment is large, and the break-make, mispairing, short circuit etc. three that generally need to test whole loops are bad greatly.Developing a kind of easy loop on off test instrument is those skilled in the art's research emphasis.
Utility model content
In view of this, the utility model provides a kind of easy loop on off test instrument.
The utility model is achieved in that a kind of loop on off test instrument, and it comprises processing unit, some detecting units, data transmission unit, alarm unit, display unit; Wherein, this processing unit comprises controlling alarm end and some detection control ends, these some detection control ends connect respectively the controlled end of these some detecting units, a part of output terminal in these some detecting units connects this data transmission unit, all the other output terminals in these some detecting units connect this display unit, and this controlling alarm end connects this alarm unit.
As the further improvement of such scheme, this processing unit comprises eight AVR microprocessor U0; This detecting unit comprises five eight SI PO shift register U1～U5; This data transmission unit comprises resistance R 1～R20, the I/O chip U6 of 20; This display unit comprises resistance R 22～R41, LED lamp D1～D20; This alarm unit comprises resistance R 21, triode Q1A, loudspeaker P; AVR microprocessor U0 comprises 40 pin: PB0～PB7, reset, VCC, GND, XTAL2, XTAL1, PD0～PD7, PC0～PC7, AVCC, two GND, AREF, PA0～PA7; Each shift register comprises 14 pin: DSA, DSB, Q0～Q7, CLK, CLR, VDD, VSS; Pin PB0～PB1 connects respectively pin CLK, pin DSA, the pin DSB of shift register U1, pin PB2～PB3 connects respectively pin CLK, pin DSA, the pin DSB of shift register U2, pin PB4～PB5 connects respectively pin CLK, pin DSA, the pin DSB of shift register U3, pin PB6～PB7 connects respectively pin CLK, pin DSA, the pin DSB of shift register U4, and pin PD0～PD1 connects respectively pin CLK, pin DSA, the pin DSB of shift register U5; Pin reset, pin XTAL2, pin XTAL1, pin PD3, pin AREF, pin AVCC are sky pin; The pin VDD of pin VCC and each shift register all connects working power; The equal ground connection of pin VSS of pin GND and each shift register; Pin PD2 is via the base stage of resistance R 21 connecting triode Q1A, the grounded emitter of triode Q1A, and the collector of triode Q1A connects one end of loudspeaker P, and the other end of loudspeaker P connects this working power; Pin PA0～PA7, pin PC7～PC0, pin PD7～PD4 connect respectively 20 output pins of I/O chip U6, and 20 output pins of I/O chip U6 connect this working power via resistance R 1～R20 respectively; Pin Q0～Q3 of two groups of pin Q0～Q7, the shift register U3 of shift register U1～U2 connects respectively 20 input pins of I/O chip U6, pin Q7～Q4 of two groups of pin Q0～Q7, the shift register U3 of shift register U2～U1 is connected to respectively the negative electrode of LED lamp D1～D20 via resistance R 22～R41, the anode of LED lamp D1～D20 all connects this working power.
As the further improvement of such scheme, AVR microprocessor U0 is single chip computer AT MEGA16L.
As the further improvement of such scheme, shift register U1～U5 is shift LD chip 74HC164.
Loop of the present utility model on off test instrument, can solve 20 loops and following product (the stackable equipment of multiloop), can test break-make, mispairing, short circuit in whole loops etc. three bad greatly, 20 loops utilize respectively 20 corresponding LED lamps to indicate on panel, connecting after product all lamps by frock extinguishes and sends caution sound and represent to test OK, product is qualified, otherwise, can not send caution sound, and the lamp of lighting represents that there is bad phenomenon in corresponding loop, and therefore the utility model uses very easy.
Brief description of the drawings
The electrical block diagram of the loop on off test instrument that Fig. 1 provides for the utility model embodiment.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Refer to Fig. 1, the utility model discloses a kind of loop on off test instrument, this loop on off test instrument comprises processing unit, some detecting units, data transmission unit, alarm unit, display unit.This processing unit comprises controlling alarm end and some detection control ends, these some detection control ends connect respectively the controlled end of these some detecting units, a part of output terminal in these some detecting units connects this data transmission unit, all the other output terminals in these some detecting units connect this display unit, and this controlling alarm end connects this alarm unit.
This processing unit comprises eight AVR microprocessor U0; This detecting unit comprises five eight SI PO shift register U1～U5; This data transmission unit comprises resistance R 1～R20, the I/O chip U6 of 20; This display unit comprises resistance R 22～R41, LED lamp D1～D20; This alarm unit comprises resistance R 21, triode Q1A, loudspeaker P.
AVR microprocessor U0 can select single chip computer AT MEGA16L, and AVR microprocessor U0 comprises 40 pin: PB0～PB7, reset, VCC, GND, XTAL2, XTAL1, PD0～PD7, PC0～PC7, AVCC, two GND, AREF, PA0～PA7.
Each shift register comprises 14 pin: DSA, DSB, Q0～Q7, CLK, CLR, VDD, VSS, and shift register U1～U5 can select shift LD chip 74HC164.
Total institute is known, in order to make Fig. 1 clean and tidy, can adopt a large amount of network labels in drawing course, adopts identical network label to illustrate that both link together by pin.In the present embodiment, pin reset, pin XTAL2, pin XTAL1, pin PD3, pin AREF, pin AVCC are sky pin, and with network label, NC represents.
The network label of pin PB0～PB1 is respectively SCK1, SDA1, connect respectively the pin CLK of shift register U1, pin DSA, pin DSB, the network label of pin PB2～PB3 is respectively SCK2, SDA2, connect respectively the pin CLK of shift register U2, pin DSA, pin DSB, the network label of pin PB4～PB5 is respectively SCK3, SDA3, connect respectively the pin CLK of shift register U3, pin DSA, pin DSB, the network label of pin PB6～PB7 is respectively SCK4, SDA4, connect respectively the pin CLK of shift register U4, pin DSA, pin DSB, the network label of pin PD0～PD1 is respectively SCK5, SDA5, connect respectively the pin CLK of shift register U5, pin DSA, pin DSB.
The network label of pin VCC is VCC, and the pin VDD of pin VCC and each shift register all connects working power; The network label of pin GND is the equal ground connection of pin VSS of GND and each shift register.The network label of pin PD2 is SPEAK, and it is via the base stage of resistance R 21 connecting triode Q1A, the grounded emitter of triode Q1A, and the collector of triode Q1A connects one end of loudspeaker P, and the other end of loudspeaker P connects this working power.
The network label of pin PA0～PA7, pin PC7～PC0, pin PD7～PD4 is respectively B ... 01～B ... 20, connect respectively 20 output pins of I/O chip U6,20 output pins of I/O chip U6 connect this working power via resistance R 1～R20 respectively.
The network label of pin Q0～Q3 of two groups of pin Q0～Q7, the shift register U3 of shift register U1～U2 is respectively A ... 01～A ... 20, connect respectively 20 input pins of I/O chip U6.The network label of pin Q7～Q4 of two groups of pin Q0～Q7, the shift register U3 of shift register U2～U1 is respectively C ... 01～C ... 20, be connected to respectively the negative electrode of LED lamp D1～D20 via resistance R 22～R41, the anode of LED lamp D1～D20 all connects this working power.
Loop of the present utility model on off test instrument, utilize existing chip, be combined into test loop and complete test function, can solve 20 loops and following product (the stackable equipment of multiloop), can test the break-make in whole loops, mispairing, short circuits etc. three are bad greatly, 20 loops utilize respectively 20 corresponding LED lamp D1～D20 to indicate on panel, connecting after product all lamps by frock extinguishes and sends caution sound and represent to test OK, product is qualified, otherwise, can not send caution sound, and the lamp of lighting represents that there is bad phenomenon in corresponding loop, therefore the utility model uses very easy.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all any amendments of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection domain of the present utility model.
Claims (4)
1. a loop on off test instrument, is characterized in that: it comprises processing unit, some detecting units, data transmission unit, alarm unit, display unit; Wherein, this processing unit comprises controlling alarm end and some detection control ends, these some detection control ends connect respectively the controlled end of these some detecting units, a part of output terminal in these some detecting units connects this data transmission unit, all the other output terminals in these some detecting units connect this display unit, and this controlling alarm end connects this alarm unit.
2. loop as claimed in claim 1 on off test instrument, is characterized in that: this processing unit comprises eight AVR microprocessor U0; This detecting unit comprises five eight SI PO shift register U1～U5; This data transmission unit comprises resistance R 1～R20, the I/O chip U6 of 20; This display unit comprises resistance R 22～R41, LED lamp D1～D20; This alarm unit comprises resistance R 21, triode Q1A, loudspeaker P; AVR microprocessor U0 comprises 40 pin: PB0～PB7, reset, VCC, GND, XTAL2, XTAL1, PD0～PD7, PC0～PC7, AVCC, two GND, AREF, PA0～PA7; Each shift register comprises 14 pin: DSA, DSB, Q0～Q7, CLK, CLR, VDD, VSS; Pin PB0～PB1 connects respectively pin CLK, pin DSA, the pin DSB of shift register U1, pin PB2～PB3 connects respectively pin CLK, pin DSA, the pin DSB of shift register U2, pin PB4～PB5 connects respectively pin CLK, pin DSA, the pin DSB of shift register U3, pin PB6～PB7 connects respectively pin CLK, pin DSA, the pin DSB of shift register U4, and pin PD0～PD1 connects respectively pin CLK, pin DSA, the pin DSB of shift register U5; Pin reset, pin XTAL2, pin XTAL1, pin PD3, pin AREF, pin AVCC are sky pin; The pin VDD of pin VCC and each shift register all connects working power; The equal ground connection of pin VSS of pin GND and each shift register; Pin PD2 is via the base stage of resistance R 21 connecting triode Q1A, the grounded emitter of triode Q1A, and the collector of triode Q1A connects one end of loudspeaker P, and the other end of loudspeaker P connects this working power; Pin PA0～PA7, pin PC7～PC0, pin PD7～PD4 connect respectively 20 output pins of I/O chip U6, and 20 output pins of I/O chip U6 connect this working power via resistance R 1～R20 respectively; Pin Q0～Q3 of two groups of pin Q0～Q7, the shift register U3 of shift register U1～U2 connects respectively 20 input pins of I/O chip U6, pin Q7～Q4 of two groups of pin Q0～Q7, the shift register U3 of shift register U2～U1 is connected to respectively the negative electrode of LED lamp D1～D20 via resistance R 22～R41, the anode of LED lamp D1～D20 all connects this working power.
3. loop as claimed in claim 2 on off test instrument, is characterized in that: AVR microprocessor U0 is single chip computer AT MEGA16L.
4. loop as claimed in claim 2 on off test instrument, is characterized in that: shift register U1～U5 is shift LD chip 74HC164.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420353304.1U CN204028271U (en) | 2014-06-27 | 2014-06-27 | A kind of loop on off test instrument |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420353304.1U CN204028271U (en) | 2014-06-27 | 2014-06-27 | A kind of loop on off test instrument |
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| Publication Number | Publication Date |
|---|---|
| CN204028271U true CN204028271U (en) | 2014-12-17 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420353304.1U Expired - Fee Related CN204028271U (en) | 2014-06-27 | 2014-06-27 | A kind of loop on off test instrument |
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| Country | Link |
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| CN (1) | CN204028271U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105004361A (en) * | 2015-08-05 | 2015-10-28 | 四川永贵科技有限公司 | Multifunctional general wiring harness detection platform |
| CN108519538A (en) * | 2018-03-26 | 2018-09-11 | 长春理工大学 | A kind of Beam Detector based on branch detection |
-
2014
- 2014-06-27 CN CN201420353304.1U patent/CN204028271U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105004361A (en) * | 2015-08-05 | 2015-10-28 | 四川永贵科技有限公司 | Multifunctional general wiring harness detection platform |
| CN108519538A (en) * | 2018-03-26 | 2018-09-11 | 长春理工大学 | A kind of Beam Detector based on branch detection |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141217 Termination date: 20190627 |
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| CF01 | Termination of patent right due to non-payment of annual fee |