CN203984416U - Ultrashort wave digitlization frequency hopping radio set - Google Patents
Ultrashort wave digitlization frequency hopping radio set Download PDFInfo
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- CN203984416U CN203984416U CN201420424452.8U CN201420424452U CN203984416U CN 203984416 U CN203984416 U CN 203984416U CN 201420424452 U CN201420424452 U CN 201420424452U CN 203984416 U CN203984416 U CN 203984416U
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Abstract
The utility model relates to ultrashort wave digitlization frequency hopping radio set, comprises AFE (analog front end) and if digitization unit.AFE (analog front end) comprises receiving unit and radiating portion; If digitization unit comprises the FPGA being connected with AFE (analog front end) part, and the DSP being connected with FPGA; FPGA is also connected with DAC, DDS, D/A and A/D; The tuning voltage that FPGA produces is input to DAC, carries out the data that D/A is converted to be sent to bounce frequency filter through DAC.DSP is connected with reseting module, clock module, UART module, external control module, AMBE encoding and decoding speech module, memory module, CVSD speech coding module and speech analog-to-digital conversion module.The utility model meets people's air defense standard; Realize if digitization; Can in prescribed bandwidth, realize full frequency band frequency hopping or segmentation frequency hopping, antijamming capability is strong; Compatible analog communication system; Bounce frequency filter and frequency hopping signal generator independent development, reduced cost.
Description
Technical field
The utility model relates to a kind of frequency hopping radio set, relates in particular to a kind of ultrashort wave digitlization frequency hopping radio set.
Background technology
At present, because people's air defense series standard is put into effect more late, special ultrashort wave wireless communication networks and alert control that people's air defense in all parts of the country is generally used are analog radio, simulation FM and FSK modulation are only in limited several frequencies (as four) upper fixed work or slow scanning frequently, that its meaning against the enemy is disturbed is poor, do not possess secret ability, and in the time running into carrier wave or follow the tracks of interference, system cannot normally be worked, and Content of Communication is grasped completely by enemy, still can use peacetime, be very easily subject to enemy attack wartime.Meanwhile, along with the deterioration increasingly of electromagnetic environment, it is unable to do what one wishes that analogue system also seems.Adopting anti-interference, secure radio communication technology is directions of Developing as cummunication for people's airdefence and alarm control communication means.
Utility model content
The technical problems to be solved in the utility model is to provide a kind of and meets that people's air defense standard, digitlization, antijamming capability are strong, the ultrashort wave digitlization frequency hopping radio set of strong security, the problem existing to solve prior art.
For solving the problems of the technologies described above, the technical solution of the utility model is ultrashort wave digitlization frequency hopping radio set, comprises AFE (analog front end) and if digitization unit, and AFE (analog front end) comprises:
1. receiving unit: antenna reception VHF radiofrequency signal, be input to the first frequency mixer through low-pass filtering, transmit-receive switch, the first bounce frequency filter, low noise amplifier, the second bounce frequency filter, obtain 163KMHz mono-intermediate-freuqncy signal with the first local oscillation signal mixing output, after an intermediate frequency amplification, an intermediate frequency filtering, amplification, be input to the second frequency mixer again, with the second local oscillation signal mixing output 450KHz bis-intermediate-freuqncy signals, amplify and obtain 450kHz/-8.5dBm bis-intermediate-freuqncy signals through filtering, AGC again, be input to if digitization unit;
2. radiating portion: modulated 450kHz/0dBm bis-intermediate-freuqncy signals and second local oscillation signal of the output of if digitization unit, obtain 163MHz mono-intermediate-freuqncy signal by the second frequency mixer mixing, after an intermediate frequency filtering, obtain VHF radiofrequency signal with the first local oscillation signal by the first frequency mixer mixing again, after the 3rd bounce frequency filter, amplify again, filtering, drive amplification, by power amplifier module, low-pass filtering output 25W power to antenna;
If digitization unit comprises the FPGA being connected with AFE (analog front end) part, and the DSP being connected with FPGA; Described FPGA is also connected with DAC chip, DDS chip, D/A chip and A/D chip;
The tuning voltage that described FPGA produces is input to DAC chip, carries out the data that D/A is converted to be sent to bounce frequency filter through DAC chip.
DSP is connected with reseting module, clock module, UART module, external control module, AMBE encoding and decoding speech module, memory module, CVSD speech coding module and speech analog-to-digital conversion module.
The reference signal of 19.2MHz produces the DDS clock signal chip of 480MHz through PLL, the output signal of DDS chip is through the forth jump filter, frequency tripling, the fifth jump filter, amplification, low pass, matched attenuator frequently frequently, the first local oscillation signal of output 8dBm.
The output signal of described power amplifier module is taken out forward signal through directional coupler and is carried out detection, the DC level after detection with arrange level by comparator the output signal after relatively send into power amplifier module.
The beneficial effects of the utility model: 1, the utility model, according to instruction and the people's air defense standard " people's air defence warning control system General Requirement " of national people's air defense office, meets people's air defense standard; 2, realized if digitization by DSP and FPGA; 3, the utility model can be realized full frequency band frequency hopping or segmentation frequency hopping in prescribed bandwidth, makes complete machine antijamming capability strong; 4, Installation and Debugging and maintenance management are convenient; 5, compatible analog communication system; 6, bounce frequency filter and frequency hopping signal generator (the first local oscillator signal source) independent development, makes complete machine cost.
Brief description of the drawings
Fig. 1 is the theory diagram of the channel unit of the utility model AFE (analog front end).
Fig. 2 is the structured flowchart of the utility model if digitization unit.
Fig. 3 is the circuit theory diagrams of the utility model bounce frequency filter.
Fig. 4 is network structure of the present utility model.
Embodiment
Below in conjunction with the drawings and specific embodiments, the utility model is described in further detail.
The technical solution of the utility model is a kind of ultrashort wave digitlization frequency hopping radio set, and it comprises AFE (analog front end) and if digitization unit.
One, AFE (analog front end), as shown in Figure 1, comprises receiving unit and radiating portion:
1. receiving unit: antenna reception VHF radiofrequency signal (20MHz bandwidth), through low-pass filtering, transmit-receive switch, the first bounce frequency filter, low noise amplifier, the second bounce frequency filter is input to the first frequency mixer, obtain 163kMHz mono-intermediate-freuqncy signal with the first local oscillation signal mixing output, amplify through an intermediate frequency again, one intermediate frequency filtering, after amplification, be input to the second frequency mixer, export 450kHz bis-intermediate-freuqncy signals again through filtering with the second local oscillation signal mixing, AGC amplification obtains 450kHz/-8.5dBm bis-intermediate-freuqncy signals, be input to if digitization unit and carry out digitized processing.
The reference signal of 19.2MHz produces the DDS(Direct Digital Frequency Synthesizers of 480MHz through PLL) clock signal chip, the output of DDS chip is through the forth jump filter, frequency tripling, the fifth jump filter, amplification, low pass, matched attenuator frequently frequently, the first local oscillation signal of output 8dBm;
2. radiating portion: modulated 450kHz/0dBm bis-intermediate-freuqncy signals and second local oscillation signal of the output of if digitization unit, obtain 163MHz mono-intermediate-freuqncy signal by the second frequency mixer mixing, after an intermediate frequency filtering, obtain VHF radiofrequency signal with the first local oscillation signal by the first frequency mixer mixing again, after the 3rd bounce frequency filter, amplify again, filtering, drive amplification, by power amplifier module, low-pass filtering output 25W power to antenna; Wherein the output signal of power amplifier module is carried out detection through directional coupler taking-up forward signal, DC level after detection with level be set compare, the output signal of comparator is sent into power amplifier module APC end, to realize automated power control, ensure to export radio-frequency power and change be less than ± 1dB within the scope of whole rf frequency.Level is set can realizes the adjustment of radio frequency power output by software change.
Described bounce frequency filter adopts eight sections of tracking tuning.In order to improve filtering performance, available bandwidth is divided into 8 sections, be 2.5MHz bandwidth for every section, receiver front end filter.As shown in Figure 3, tuning voltage TU1 ~ TU3 is by DAC(digital to analog converter) chip generates, the corresponding TU data value of each frequency range, totally 24 data, use network analyzer to debug after by 24 data accumulatings.When frequency hopping is normally worked, give TU1 ~ TU3 by working frequency points place frequency range data and complete this section of filtering.
Two, if digitization unit
As shown in Figure 2, if digitization unit comprises the FPGA being connected with AFE (analog front end) part, and the DSP being connected with FPGA; Described FPGA and DAC chip, DDS(Direct Digital Frequency Synthesizers) chip, D/A chip and A/D chip be connected; Described FPGA produces tuning voltage and outputs to DAC chip, is input to bounce frequency filter after digital-to-analogue conversion.
FPGA adopts EP2C35F484 chip, and DDS chip adopts AD9951 chip, and DAC chip adopts DAC84C085 chip, and D/A chip adopts AD9744ARU chip, and A/D chip adopts AD9235 chip.
DSP is connected with reseting module, clock module, UART module, external control module, AMBE encoding and decoding speech module, memory module, CVSD speech coding module and speech analog-to-digital conversion module.
DSP adopts TMS320C6713B chip, reseting module adopts MAX706SESA chip, clock module adopts MAX706SESA chip, AMBE encoding and decoding speech module adopts AMBE2000 chip, speech analog-to-digital conversion module adopts TLC320AIC10 chip, and CVSD speech coding module adopts CMX639D4 chip, and memory module adopts 39VF800A Flash chip, UART module adopts ST16C2550IO48 chip, and external control module comprises the button and the display screen that are connected with DSP.
As shown in Figure 4, after the interior all frequency hopping radio sets starts of net, all in waiting for scanning mode, in the time that transmit-receive switch is pressed in main page station, in net, liaison is set up in Yu Zhu page station, other radio station.
Claims (4)
1. ultrashort wave digitlization frequency hopping radio set, comprises AFE (analog front end) and if digitization unit, it is characterized in that: AFE (analog front end) comprises:
1. receiving unit: antenna reception VHF radiofrequency signal, be input to the first frequency mixer through low-pass filtering, transmit-receive switch, the first bounce frequency filter, low noise amplifier, the second bounce frequency filter, obtain 163kMHz mono-intermediate-freuqncy signal with the first local oscillation signal mixing output, after an intermediate frequency amplification, an intermediate frequency filtering, amplification, be input to the second frequency mixer again, with the second local oscillation signal mixing output 450kHz bis-intermediate-freuqncy signals, amplify and obtain 450kHz/-8.5dBm bis-intermediate-freuqncy signals through filtering, AGC again, be input to if digitization unit;
2. radiating portion: modulated 450kHz/0dBm bis-intermediate-freuqncy signals and second local oscillation signal of the output of if digitization unit, obtain 163MHz mono-intermediate-freuqncy signal by the second frequency mixer mixing, after an intermediate frequency filtering, obtain VHF radiofrequency signal with the first local oscillation signal by the first frequency mixer mixing again, after the 3rd bounce frequency filter, amplify again, filtering, drive amplification, by power amplifier module, low-pass filtering output 25W power to antenna;
If digitization unit comprises the FPGA being connected with AFE (analog front end) part, and the DSP being connected with FPGA; Described FPGA is also connected with DAC chip, DDS chip, D/A chip and A/D chip;
The tuning voltage that described FPGA produces is input to DAC chip, carries out the data that D/A is converted to be sent to bounce frequency filter through DAC chip.
2. ultrashort wave digitlization frequency hopping radio set according to claim 1, is characterized in that: DSP is connected with reseting module, clock module, UART module, external control module, AMBE encoding and decoding speech module, memory module, CVSD speech coding module and speech analog-to-digital conversion module.
3. ultrashort wave digitlization frequency hopping radio set according to claim 1, it is characterized in that: the reference signal of 19.2MHz produces the DDS clock signal chip of 480MHz through PLL, the output signal of DDS chip is through the forth jump filter, frequency tripling, the fifth jump filter, amplification, low pass, matched attenuator frequently frequently, the first local oscillation signal of output 8dBm.
?
4. ultrashort wave digitlization frequency hopping radio set according to claim 1, it is characterized in that: the output signal of described power amplifier module is taken out forward signal through directional coupler and carried out detection, the DC level after detection with arrange level by comparator the output signal after relatively send into power amplifier module.
?
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420424452.8U CN203984416U (en) | 2014-07-30 | 2014-07-30 | Ultrashort wave digitlization frequency hopping radio set |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201420424452.8U CN203984416U (en) | 2014-07-30 | 2014-07-30 | Ultrashort wave digitlization frequency hopping radio set |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105680961A (en) * | 2016-01-14 | 2016-06-15 | 中兵通信科技有限公司 | Received signal processing circuit of ultra-short wave radio set |
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2014
- 2014-07-30 CN CN201420424452.8U patent/CN203984416U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105680961A (en) * | 2016-01-14 | 2016-06-15 | 中兵通信科技有限公司 | Received signal processing circuit of ultra-short wave radio set |
| CN105680961B (en) * | 2016-01-14 | 2018-01-23 | 中兵通信科技股份有限公司 | A kind of ultrashort wave radio set reception signal process circuit |
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