CN203981833U

CN203981833U - A kind of signal Combined Processing circuit

Info

Publication number: CN203981833U
Application number: CN201420033476.0U
Authority: CN
Inventors: 王厚国
Original assignee: Xiamen Causes Open Network Science And Technology Ltd
Current assignee: Xiamen through automation technology Co., Ltd.
Priority date: 2014-01-20
Filing date: 2014-01-20
Publication date: 2014-12-03
Anticipated expiration: 2024-01-20

Abstract

The utility model discloses a kind of signal Combined Processing circuit, comprise test point interface A to be detected and test point interface B, channel switching circuit, simulation loading circuit, simulation is biased power supply, single-ended signal combined-voltage Acquisition Circuit, difference signal Acquisition Circuit, input end of analog signal, signal generator interface, signals collecting I/O module interface, the beneficial effect of technique scheme of the present utility model is as follows: reduce point danger that interface circuit redesigns, improve the versatility of testing apparatus, reduce the testing cost of PCBA, simplify product line, there is the effect economizing on resources.

Description

A kind of signal Combined Processing circuit

Technical field

The utility model relates to signal processing technology field, refers to especially a kind of signal Combined Processing circuit.

background technology

In recent years, now in technology, in the time that PCBA tests, the function difference of corresponding each test point, the interface circuit of testing apparatus is also different, different PCBA plates, must revise redesign interface circuit, so that the testing cost of PCBA increases, product line is changed the problem such as trouble and waste resource.

utility model content

The technical problems to be solved in the utility model is to provide a kind of signal Combined Processing circuit, and in the time that PCBA tests, a test communications has collection and fan-out capability etc., meets the power of test of single test port.

For solving the problems of the technologies described above, embodiment of the present utility model provides a kind of signal Combined Processing circuit, comprises test point interface A to be detected and test point interface B, also comprises:

Channel switching circuit, switches for the passage of test point interface A and test point interface B, and increases test port output;

Simulation loading circuit, for switching the test point offered load obtaining to channel switching circuit;

Simulation is biased power supply, for switching electric current and the voltage that the test point obtaining adds certain value to channel switching circuit;

Single-ended signal combined-voltage Acquisition Circuit, switches for channel switching circuit the test point obtaining and carries out dividing potential drop;

Differential signal Acquisition Circuit, switches the differential signal of the test point obtaining for acquisition channel commutation circuit;

Input end of analog signal, is used to channel switching circuit to switch the test point input signal obtaining;

Signal generator interface, provides signal for input end of analog signal;

Signals collecting I/O module interface, for gathering the dividing potential drop data of single-ended signal combined-voltage Acquisition Circuit, and the differential signal data that collect of differential signal Acquisition Circuit.

As preferably, also comprise the second switch cut-offfing for controlling differential signal Acquisition Circuit and the first switch cut-offfing for control signal G-interface.

As preferably, described signals collecting I/O module interface, also switches for the passage of channel switching circuit; The loading of control simulation loaded circuit; Control simulation is biased cut-offfing of power supply.

As preferably, described the first switch and second switch are dpdt relay.

The beneficial effect of technique scheme of the present utility model is as follows: reduce the risk that interface circuit redesigns, improve the versatility of testing apparatus, reduced the testing cost of PCBA, simplify product line, have the effect economizing on resources.

brief description of the drawings

Fig. 1 is the theory diagram of a kind of signal Combined Processing circuit embodiments of the present utility model.

Embodiment

For making the technical problems to be solved in the utility model, technical scheme and advantage clearer, be described in detail below in conjunction with the accompanying drawings and the specific embodiments.

The utility model provides a kind of signal Combined Processing circuit for existing deficiency, as shown in Figure 1, be included in upper channel switching circuit, the simulation loading circuit increasing of test interface A and test point interface B, simulation is biased power supply, single-ended signal alternating current-direct current Acquisition Circuit, differential signal Acquisition Circuit, simulation signal generator input end and for signal Combined Processing signals collecting I/O module interface

Channel switching circuit, switches for the passage of test point interface A and test point interface B, and increases test port output, and it is made up of a dpdt double-pole double-throw (DPDT) relay road and a transistor control circuit, switches by gathering its passage of I/O module controls;

Simulation loading circuit, for switch the test point offered load obtaining to channel switching circuit, it is by the load of a triode control simulation and in test point loop over the ground, by gathering its whether loading of I/O module controls;

Simulation is biased power supply, add certain value and obtain electric current and voltage for switching the test point obtaining to channel switching circuit, it is connected on controlled power supply by a PNP triode E utmost point, the triode C utmost point is biased voltage by current-limiting resistance to test point, decides the whether conducting of PNP triode by gathering I/O module controls NPN triode;

Signal generator interface, provides signal for input end of analog signal, wherein signal generator interface output audio signal;

Also comprise the first switch cut-offfing and cut-offfing for control signal G-interface for controlling differential signal Acquisition Circuit.

Described signals collecting I/O module interface, also switches for the passage of channel switching circuit; The loading of control simulation loaded circuit; Control simulation is biased cut-offfing of power supply.

Described the first switch and second switch are dpdt double-pole double-throw (DPDT) relay road.

The above is preferred implementation of the present utility model; should be understood that; for those skilled in the art; do not departing under the prerequisite of principle described in the utility model; can also make some improvements and modifications, these improvements and modifications also should be considered as protection domain of the present utility model.

Claims

1. a signal Combined Processing circuit, comprises test point interface A to be detected and test point interface B, it is characterized in that, also comprises:

Signal generator interface, provides signal for input end of analog signal;

2. a kind of signal Combined Processing circuit according to claim 1, is characterized in that, also comprises the second switch cut-offfing for controlling differential signal Acquisition Circuit and the first switch cut-offfing for control signal G-interface.

3. a kind of signal Combined Processing circuit according to claim 1 and 2, is characterized in that, described signals collecting I/O module interface also switches for the passage of channel switching circuit; The loading of control simulation loaded circuit; Control simulation is biased cut-offfing of power supply.

4. a kind of signal Combined Processing circuit according to claim 2, is characterized in that, described the first switch and second switch are dpdt relay.