CN203968387U - A kind of Underground Mine 3G wireless network group-network construction - Google Patents

A kind of Underground Mine 3G wireless network group-network construction Download PDF

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Publication number
CN203968387U
CN203968387U CN201420275879.6U CN201420275879U CN203968387U CN 203968387 U CN203968387 U CN 203968387U CN 201420275879 U CN201420275879 U CN 201420275879U CN 203968387 U CN203968387 U CN 203968387U
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China
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pin
down conversion
conversion chip
current node
base station
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CN201420275879.6U
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Chinese (zh)
Inventor
贾建军
刘世亮
兰玉
姚艳萍
刘清亮
王铁铮
秦卫锋
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SHANDONG HUADUN TECHNOLOGY Co Ltd
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SHANDONG HUADUN TECHNOLOGY Co Ltd
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Abstract

The utility model relates to Underground Mine communication apparatus technical field, a kind of Underground Mine 3G wireless network group-network construction is provided, Underground Mine 3G wireless network networking framework comprises base station controller and several base stations of the networking framework that forms in chain type mode with base station, overcome the defect that star-like networking model is brought, reduce the difficulty of laying wireless communication networks under mine, reduced cost; Base station controller is managed as a whole base station radio channel, and foundation and the deletion of implementing calling and communication link are controlled, complete the supervision of 3G wireless network and effectively control, base station completes radiation and the reception of wireless signal, base station controller and base station complete covering and the communication to Underground Mine 3G wireless network jointly, reduce the project cost of mine, also greatly reduce difficulty of construction simultaneously.

Description

A kind of Underground Mine 3G wireless network group-network construction
Technical field
The utility model belongs to Underground Mine communication apparatus technical field, relates in particular to a kind of Underground Mine 3G wireless network group-network construction.
Background technology
At present, colliery mainly contains two kinds of mining types, underground mining and strip mining transformation, for burying darker coal resources, China generally adopts the mode of underground mining, and wherein, well depth is generally just more than 400 meters, its geological conditions and environmental condition more complicated, such as mine gas, water, fire, mine dust and toxic gas etc.
In all kinds of mine down-hole wireless telecommunication systems, the networking mode of base station is star-like networking, in the time that the quantity of base station is more, will cause circuit to repeat to lay, and increases difficulty of construction, improves construction cost.
Utility model content
The purpose of this utility model is to provide a kind of Underground Mine 3G wireless network group-network construction, and the networking mode that is intended to solve base station in prior art is star-like networking, easily causes circuit to repeat to lay, and increases difficulty of construction, improves the problem of construction cost.
The utility model is achieved in that a kind of Underground Mine 3G wireless network group-network construction, and described Underground Mine 3G wireless network group-network construction specifically comprises:
A flame-proof mine base station controller being arranged under mine;
Several Mine-used I. S base stations that are connected with described base station controller communication, wherein, described in several, base station is connected with described base station controller in the mode of chain type networking;
Wherein, described base station controller is provided with flame-proof type explosion-proof housing, in described explosion-proof casing, be provided with the first master control borad, described the first master control borad is provided with 1 the first optical module interface and 7 the second optical module interfaces, described the first master control borad is provided with the first main control chip being electrically connected with described the first optical module interface and described the second optical module interface, wherein, described the first optical module interface connects baseband processing unit by optical fiber, the corresponding described base station connecting in downstream position of described the second optical module interface;
Described base station comprises shell and the second master control borad of enclosure is set, described the second master control borad is provided with up optical module interface and descending optical module interface, described up optical module interface is connected with described base station controller or the base station optical fiber of upstream, described descending optical module interface is connected with base station, downstream, on described the second master control borad, be also provided with the second main control chip being electrically connected with up optical module interface and descending optical module interface, at least one radio receiving transmitting module of described the second main control chip electrical connection, described the second master control borad is provided with the antenna jack being electrically connected with described radio receiving transmitting module, the corresponding grafting wireless signal of described antenna jack dual-mode antenna.
As a kind of improved plan, the described descending optical module interface of the base station in chain type networking end is connected with described base station controller, forms annular networking.
As a kind of improved plan, on described second master control borad of described base station, be also provided with power circuit, described power circuit comprises first order power circuit, second level power circuit and third level power circuit.
As a kind of improved plan, described first order power circuit comprises rectification circuit, described rectification circuit connects pin 1 and the pin 2 of integrated chip J10, be connected in parallel the 4th pin GND of the first step-down conversion chip U1 of the pin 3 of described integrated chip J10 and pin 4 and described rectification circuit, between the 4th pin GND of described the first step-down conversion chip U1 and described rectification circuit, form successively the first current node, the second current node and the 3rd current node, the described first current node other end is electrically connected with the 2nd pin IN of described the first step-down conversion chip U1 by the 4th current node, described the 4th current node other end is electrically connected the 7th pin EN of described the first step-down conversion chip U1 by the 5th current node, described the 5th current node is electrically connected with the 4th pin GND of described the first step-down conversion chip U1 by described the 3rd current node, the other end of described the second current node extends ground connection, the 3rd pin SW ground connection of described the first step-down conversion chip U1, the 1st pin BS electrical connection 9V voltage output end VCC_9.0V of described the first step-down conversion chip U1, the output of the 5th pin FB of described the first step-down conversion chip U1 forms the 6th current node between the 1st pin BS of described the first step-down conversion chip U1 and described 9V voltage output end VCC_9.0V, between the 1st pin BS of described the 6th current node and described the first step-down conversion chip U1, be electrically connected with successively capacitor C 2 and inductance L 1, the 6th pin COMP of described the first step-down conversion chip U1 is electrically connected with the 8th pin SS of the first step-down conversion chip U1 by capacitor C 4 and capacitor C 6.
As a kind of improved plan, described second level power circuit comprises the second step-down conversion chip U21, the 2nd pin IN of described the second step-down conversion chip U21 is electrically connected with the 9V voltage output end VCC_9.0V of described first order power circuit, between the 7th pin EN of the 2nd pin IN of described the second step-down conversion chip U21 and described the second step-down conversion chip U21, form the 8th current node and the 9th current node, described the 8th current node is by capacitor C 150 ground connection, described the 9th current node is electrically connected with the 4th pin GND of described the second step-down conversion chip U21 by capacitor C 151, the 1st pin BS electrical connection 5V voltage output end VCC_5.0V of described the second step-down conversion chip U21, between the 1st pin BS of described the second step-down conversion chip U21 and 5V voltage output end VCC_5.0V, form the tenth current node, the 11 current node, the 12 current node and the 13 current node, wherein, described the tenth current node, shunt capacitance C153 and capacitor C 154 between the 11 current node, between described the 12 current node and the 13 current node, be provided with the first filter circuit, the 6th pin COMP of described the second step-down conversion chip U21 is electrically connected with the 8th pin SS of described the second step-down conversion chip U21 by capacitor C 155 and capacitor C 156.
As a kind of improved plan, described third level power circuit comprises the 3rd step-down conversion chip U20, the 7th pin VCC of described the 3rd step-down conversion chip U20, the 5th pin VINDCDC3, the 36th pin VINDCDC3, the 6th pin VINDCDC3, the 14th pin VSYSIN, the 11st pin HOT_RESET, the 19th pin VINLDO, the 12nd pin DEFLDO1, the 22nd pin LEO_EN, the 23rd pin DCDC3_EN, the 24th pin DCDC2_EN and the 25th pin DCDC1_EN are electrically connected respectively the described 5V voltage output end VCC_5.0V of described second level power circuit, the 0th pin GND of described the 3rd step-down conversion chip U20, the 15th pin VBACKUP, the 16th pin VRTC, the 26th pin TRESPWEON, the 13rd pin DEFLDO2, the 3rd pin PGND3, the 34th pin PGND2, the 10th pin DEFDCDC1, the 8th pin PGND1, the 40th pin AGND1 and the 17th pin AGND2 be ground connection respectively, the 28th pin INT of described the 3rd step-down conversion chip U20, pin VDCDC2 and the 35th pin L2 are electrically connected respectively 3.3V voltage output end VCC_3.3V, the 2nd pin VDCDC3 of described the 3rd step-down conversion chip U20, the 4th pin L3, the 27th pin RESPWRON, the 38th pin PWRFAIL_SNS, the 31st pin PWRFAIL and the 21st pin LOWBAT electrical connection 2.5V voltage output end VCC_2.5V, the 39th pin LOWBAT_SNS connects voltage output end VCC_2.5V by resistance R 17100, the 20th pin VLDO1 electrical connection LDO_2.8V end, the 18th pin VLDO2 of described the 3rd step-down conversion chip U20 and the 17th pin AGEND2 electrical connection LDO_3.3V end, between the 17th pin AGND2 of described the 3rd step-down conversion chip U20 and described LDO_3.3V end, be provided with the second filter circuit, between described the second filter circuit and described LDO_2.8V end, be provided with the 3rd filter circuit.
Because Underground Mine 3G wireless network group-network construction comprises base station controller and several base stations of the group-network construction that forms in chain type mode with base station, overcome the defect that in prior art, star-like networking model is brought, reduce the difficulty of laying wireless communication networks under mine, reduce cost, meanwhile, reduced failure rate;
Simultaneously, the first master control borad of base station controller is provided with the first optical module interface, the second optical module interface and the first main control chip, base station controller receives the control signal of baseband processing unit by the first optical module interface, receive or send corresponding communication signal by the second optical module interface, the first main control chip is managed as a whole base station radio channel, and foundation and the deletion of implementing calling and communication link are controlled, complete the supervision of 3G wireless network and effectively control, and base station comprises up optical module interface, descending optical module interface, the second main control chip and radio receiving transmitting module, up optical module interface and descending optical module Interface realization the transmission of fiber-optic signal, the the second main control chip signal transmitting and receiving process to this base station and the conversion of signal mode is controlled, radio receiving transmitting module is for receiving the radio signal of handheld terminal transmission or radio signal radiation being sent, base station controller and base station complete covering and the communication to Underground Mine 3G wireless network jointly, layout one stylobate station control and some the base stations that are connected with base station controller by optical fiber, the batch layout with the base station of simple signal transmitting and receiving function reduces the project cost of mine greatly, also greatly reduce difficulty of construction simultaneously.
Because the described descending optical module interface of the base station in chain type networking end is connected with described base station controller, form annular networking, in the time that in annular networking, any one node breaks down, automatically switch to fast two groups of chain type networkings, still can keep the normal operation of framework, improve the reliability of framework.
Brief description of the drawings
Fig. 1 is the structural representation of the Underground Mine 3G wireless network group-network construction that provides of the utility model embodiment mono-;
Fig. 2 is the structural representation of the base station controller that provides of the utility model;
Fig. 3 is the structural representation of the base station that provides of the utility model;
Fig. 4 is the structural representation of the Underground Mine 3G wireless network group-network construction that provides of the utility model embodiment bis-;
Fig. 5 is the circuit diagram of the first order power circuit that provides of the utility model;
Fig. 6 is the circuit diagram of the second level power circuit that provides of the utility model;
Fig. 7 is the circuit diagram of the third level power circuit that provides of the utility model;
Wherein, 1-base station controller, 11-explosion-proof casing, 12-the first master control borad, 121-the first optical module interface, 122-the second optical module interface, 123-the first main control chip, 13-the first power panel, 2-base station, 21-shell, 22-the second master control borad, the up optical module interface of 221-, the descending optical module interface of 222-, 223-the second main control chip, 224-radio receiving transmitting module, 225-antenna jack, 226-power circuit, 23-second source plate, 3-the first current node, 4-the second current node, 5-the 3rd current node, 6-the 4th current node, 7-the 5th current node, 8-the 6th current node, 9-the 7th current node, 10-the 8th current node, 11-the 9th current node, 12-the tenth current node, 13-the 11 current node, 14-the 12 current node, 15-the 13 current node.
Embodiment
In order to make the purpose of this utility model, technical scheme and advantage clearer, below in conjunction with drawings and Examples, the utility model is further elaborated.Should be appreciated that specific embodiment described herein is only in order to explain the utility model, and be not used in restriction the utility model.
Fig. 1 to Fig. 7 shows the relevant indicators that the utility model embodiment provides, and for convenience of explanation, has only provided the content relevant to the utility model in figure, but not in order to limit the utility model.
Consult Fig. 1, Fig. 2 and Fig. 3, Underground Mine 3G wireless network group-network construction specifically comprises:
A flame-proof mine base station controller 1 being arranged under mine;
Several Mine-used I. S base stations 2 that are connected with described base station controller 1 communication, wherein, described in several, base station 2 is connected with described base station controller 1 in the mode of chain type networking;
Wherein, described base station controller 1 is provided with flame-proof type explosion-proof housing 11, described explosion-proof casing 11 is provided with lid and the enclosure body (not shown) that can fasten, described lid and described enclosure body are bolted, described enclosure body is provided with several the first through wires hole (not shown)s, in described explosion-proof casing 11, be provided with the first master control borad 12, described the first master control borad 12 is provided with 121 and 7 the second optical module interfaces 122 of 1 the first optical module interface, described the first optical module interface 121 is corresponding with described the first through wires hole with the second optical module interface 122, described the first master control borad 12 is provided with the first main control chip 123 being electrically connected with described the first optical module interface 121 and described the second optical module interface 122, wherein, described the first optical module interface 121 passes described the first through wires hole by optical fiber and connects baseband processing unit, described the second optical module interface 122 described base stations 2 of corresponding connection,
Described base station 2 layouts are in underworkings, described base station 2 comprises shell 21 and the second master control borad 22 of shell 21 inside is set, described the second master control borad 22 is provided with up optical module interface 221 and descending optical module interface 222, described up optical module interface 221 is connected with base station controller 1 or base station 2 optical fiber of upstream, described descending optical module interface 222 is connected with base station, downstream 2, on described the second master control borad 22, be also provided with the second main control chip 223 being electrically connected with up optical module interface 221 and descending optical module interface 222, described the second main control chip 223 is electrically connected at least one radio receiving transmitting module 224, described the second master control borad 22 is provided with the antenna jack 225 being electrically connected with described radio receiving transmitting module 224, the corresponding grafting wireless signal of described antenna jack 225 dual-mode antenna, described shell 21 is provided with and described up optical module interface 221, the second through wires hole (not shown) that descending optical module interface 222 is corresponding with wireless signal dual-mode antenna.
In the utility model, in the explosion-proof casing 11 of base station controller 1, be also provided with the first power panel 13, described in described the first power panel 13 the first master control borad 12 be electrically connected, described the first power panel 13 is powered for described the first master control borad 12, and, on the first master control borad 12 of base station controller 1, be also provided with RJ45 interface and VGA interface (unmarked in figure).
In the utility model, in the shell 21 of base station 2, be also provided with described the second master control borad 22 and be electrically connected second source plate 23, described second source plate 23 is powered for described the second master control borad 22.
Wherein, in the base station controller 1 shown in Fig. 1, wherein, above-mentioned the first main control chip 123 is selected 32 of the enhancement mode microcontroller based on ARM core;
Be arranged on the first through wires hole in enclosure body and be mainly used in through optical fiber cable, the first optical module interface 121 and the common optical fiber interface of the second optical module interface 122, it is for changing photosignal, wherein:
It is the optical fiber of 2.5Gbps that the first optical module interface 121 adopts speed, for higher level's light mouth, it is connected with baseband processing unit, for realizing the tcp/ip communication of base station controller 1 and baseband processing unit, completes the operational administrative of baseband processing unit to base station controller 1;
Being the optical fiber of 1.25Gbps and the second optical module interface 122 adopts speed, is the Guang Kou of subordinate, for realizing and the communication connection of subordinate base station 2.
As shown in Figure 4, the described descending optical module interface of the base station in chain type networking end is connected with described base station controller, form annular networking, in the time that in annular networking, any one node breaks down, automatically switch to fast two groups of chain type networkings, still can keep the normal operation of framework, improve the reliability of framework.
In the utility model, on described second master control borad 22 of base station 2, be also provided with power circuit 226, described power circuit 226 comprises first order power circuit, second level power circuit and third level power circuit.
Consult Fig. 5, described first order power circuit comprises rectification circuit, described rectification circuit connects pin 1 and the pin 2 of integrated chip J10, be connected in parallel the 4th pin GND of the first step-down conversion chip U1 of the pin 3 of described integrated chip J10 and pin 4 and described rectification circuit, between the 4th pin GND of described the first step-down conversion chip U1 and described rectification circuit, form successively the first current node 3, the second current node 4 and the 3rd current node 5, described first current node 3 other ends are electrically connected with the 2nd pin IN of described the first step-down conversion chip U1 by the 4th current node 6, described the 4th current node 6 other ends are electrically connected the 7th pin EN of described the first step-down conversion chip U1 by the 5th current node 7, described the 5th current node 7 is electrically connected with the 4th pin GND of described the first step-down conversion chip U1 by described the 3rd current node 5, the other end of described the second current node 4 extends ground connection, the 3rd pin SW ground connection of described the first step-down conversion chip U1, the 1st pin BS electrical connection 9V voltage output end VCC_9.0V of described the first step-down conversion chip U1, the output of the 5th pin FB of described the first step-down conversion chip U1 forms the 6th current node 8 between the 1st pin BS of described the first step-down conversion chip U1 and described 9V voltage output end VCC_9.0V, between the 1st pin BS of described the 6th current node 8 and described the first step-down conversion chip U1, be electrically connected with successively capacitor C 2 and inductance L 1, the 6th pin COMP of described the first step-down conversion chip U1 is electrically connected with the 8th pin SS of the first step-down conversion chip U1 by capacitor C 4 and capacitor C 6.
Wherein, rectification circuit comprises diode D1, the positive terminal of described diode D1 connects pin 1 and the pin 2 of integrated chip J10, the positive terminal of the negative pole end electrical connection diode D2 of described diode D1, the negative pole end contact resistance R1 of described diode D2, the positive terminal of the other end electrical connection diode D10 of described resistance R 1, forms the 7th current node 9 between the negative pole end of described diode D10 and described the 4th pin GND.
Simultaneously, in the above-described embodiments, between described the first current node 3 and described the 4th current node 6, be electrically connected a capacitor C 1, between described the 5th current node 7 and described the 3rd current node 5, be electrically connected capacitor C 3, between described the 3rd pin SW and described earth terminal, be electrically connected diode D3, between described capacitor C 4 and C6, be electrically connected resistance R 5.
In first order power circuit:
Diode D1, D2, D3 are SK34,3A;
The capacitance of capacitor C 1 is 2.2uF, and rated voltage is 35V, and the capacitance of capacitor C 2, C3 and C4 is 10nF, and the capacitance of capacitor C 5 is 1uF, and capacitor C 6 is patch capacitor, and its capacitance is 0.1uF;
The resistance value of resistance R 1 is 4.7K ohm, and the resistance value of resistance R 2 is 8.7K ohm, and resistance R 3 and R4 are reserved resistance, and wherein, resistance R 1 and resistance R 2 are Chip-R 0805;
Inductance L 1 adopts the MSS1038_123KL of 4A, 10uH.
Wherein, the first order power circuit input capacitance shown in Fig. 5 and output capacitance and be less than 4.7uF.
Refer to Fig. 6, described second level power circuit comprises the second step-down conversion chip U21, the 2nd pin IN of described the second step-down conversion chip U21 is electrically connected with the 9V voltage output end VCC_9.0V of described first order power circuit, between the 7th pin EN of the 2nd pin IN of described the second step-down conversion chip U21 and described the second step-down conversion chip U21, form the 8th current node 10 and the 9th current node 11, described the 8th current node 10 is by capacitor C 150 ground connection, described the 9th current node 11 is electrically connected with the 4th pin GND of described the second step-down conversion chip U21 by capacitor C 151, the 1st pin BS electrical connection 5V voltage output end VCC_5.0V of described the second step-down conversion chip U21, between the 1st pin BS of described the second step-down conversion chip U21 and 5V voltage output end VCC_5.0V, form the tenth current node 12, the 11 current node 13, the 12 current node the 14 and the 13 current node 15, wherein, described the tenth current node 12, shunt capacitance C153 and capacitor C 154 between the 11 current node 13, the other end of described capacitor C 153 and capacitor C 154 is ground connection respectively, between described the 12 current node the 14 and the 13 current node 15, be provided with the first filter circuit, the 6th pin COMP of described the second step-down conversion chip U21 is electrically connected with the 8th pin SS of described the second step-down conversion chip U21 by capacitor C 155 and capacitor C 156.
Wherein, described the first filter circuit comprises the diode D10 being electrically connected with the 12 current node and the diode D4 being electrically connected with described the 11 current node, ground connection after described diode D10 and diode D4 parallel connection, series resistor R152 between described diode D4 and the 11 current node.
In the power circuit of the second level:
Diode D9 is SK34,3A, diode D10 rated voltage 5.6V, power 5W;
The capacitance of capacitor C 150 is 1uF, and rated voltage is 35V, and the capacitance of capacitor C 151, C152 is 10nF, and the capacitance of capacitor C 153 is 1uF, and capacitor C 156 is patch capacitor, and its capacitance is 0.1uF;
The resistance value of resistance R 167 is 8.7K ohm, the resistance value of resistance R 172 is 2.27K ohm, the resistance value of resistance R 173 is 1K ohm, the resistance value of resistance R 174 is 5.6K ohm, the resistance value of resistance R 152 is 10K ohm, wherein, resistance R 167, resistance R 172, resistance R 173, resistance R 174 are Chip-R 0805;
Inductance L 41 also adopts the MSS1038_123KL of 4A, 10uH.
Wherein, the second level power circuit input capacitance shown in Fig. 6 is no more than the output capacitance of first order power circuit.
Refer to Fig. 7, described third level power circuit comprises the 3rd step-down conversion chip U20, the 7th pin VCC of described the 3rd step-down conversion chip U20, the 5th pin VINDCDC3, the 36th pin VINDCDC3, the 6th pin VINDCDC3, the 14th pin VSYSIN, the 11st pin HOT_RESET, the 19th pin VINLDO, the 12nd pin DEFLDO1, the 22nd pin LEO_EN, the 23rd pin DCDC3_EN, the 24th pin DCDC2_EN and the 25th pin DCDC1_EN are electrically connected respectively the described 5V voltage output end VCC_5.0V of described second level power circuit, the 0th pin GND of described the 3rd step-down conversion chip U20, the 15th pin VBACKUP, the 16th pin VRTC, the 26th pin TRESPWEON, the 13rd pin DEFLDO2, the 3rd pin PGND3, the 34th pin PGND2, the 10th pin DEFDCDC1, the 8th pin PGND1, the 40th pin AGND1 and the 17th pin AGND2 be ground connection respectively, the 28th pin INT of described the 3rd step-down conversion chip U20, pin VDCDC2 and the 35th pin L2 are electrically connected respectively 3.3V voltage output end VCC_3.3V, the 2nd pin VDCDC3 of described the 3rd step-down conversion chip U20, the 4th pin L3, the 27th pin RESPWRON, the 38th pin PWRFAIL_SNS, the 31st pin PWRFAIL and the 21st pin LOWBAT electrical connection 2.5V voltage output end VCC_2.5V, the 39th pin LOWBAT_SNS connects voltage output end VCC_2.5V by resistance R 17100, described the 20th pin VLDO1 electrical connection LDO_2.8V end, the 18th pin VLDO2 of described the 3rd step-down conversion chip U20 and the 17th pin AGEND2 electrical connection LDO_3.3V end, between the 17th pin AGND2 of described the 3rd step-down conversion chip U20 and described LDO_3.3V end, be provided with the second filter circuit, between described the second filter circuit and described LDO_2.8V end, be provided with the 3rd filter circuit.
Described in its concrete circuit connection is achieved as follows:
(1), the 7th pin VCC of the 3rd step-down conversion chip U20 with between be electrically connected resistance R 170, after the 5th pin VINDCDC3, the 36th pin VINDCDC3 of the 3rd step-down conversion chip U20 and the circuit parallel connection of the 6th pin VINDCDC3 with between the described 5V voltage output end VCC_5.0V of described second level power circuit and resistance R 170, be electrically connected, form current node, resistance R 170 forms another current node with the 7th pin VCC of described the 3rd step-down conversion chip U20, the rear ground connection of this current node serial connection capacitor C 149;
(2), the described 5V voltage output end VCC_5.0V of the 14th pin VSYSIN of the 3rd step-down conversion chip U20 and second level power circuit forms current node, and be electrically connected with it by resistance R 165, the other end of this current node is by the rear ground connection of serial connection capacitor C 146;
(3), the 15th pin VBACKUP of the 3rd step-down conversion chip U20 is connected in series the rear ground connection of capacitor C 147, the rear ground connection of the 16th pin VRTC serial connection capacitor C 148 of the 3rd step-down conversion chip U20;
(4), after the 11st pin HOT_RESET series resistor R164 of the 3rd step-down conversion chip U20, be electrically connected with the described 5V voltage output end VCC_5.0V of second level power circuit;
(5), the 38th pin PWRFAIL_SNS of the 3rd step-down conversion chip U20, the 31st pin PWRFAIL and the 21st pin are respectively by being electrically connected with voltage output end VCC_2.5V after resistance R 160, resistance R 159 and resistance R 168 parallel connections;
(6), the 26th pin of the 3rd step-down conversion chip U20 is connected in series the rear ground connection of capacitor C 124, ground connection after the 13rd pin DEFLDO2 series resistor R157;
(7), after the 12nd pin DEFLDO1 series resistor R156 of the 3rd step-down conversion chip U20 with the circuit of described the 19th pin VINLDO voltage output end VCC_5.0V that is connected in parallel, after the 22nd pin LEO_EN series resistor R156, be electrically connected with voltage output end VCC_5.0V;
(8), after the 28th pin INT series resistor R138 of the 3rd step-down conversion chip U20, connect voltage output end VCC_3.3V;
(9), the 29th pin SDAT of the 3rd step-down conversion chip U20 connects the Data Control line of SDA composition, the clock output line of the 30th pin SCLK composition, formation SDA and SCL composition I 2c bus;
(10), the 23rd pin DCDC3_EN, the 24th pin DCDC2_EN of the 3rd step-down conversion chip U20 and the 25th pin DCDC1_EN be respectively after corresponding series resistor R163, resistance R 162, resistance R 161, the described 5V voltage output end VCC_5.0V of the described second level of electrical connection in parallel power circuit;
(11), between the 2nd pin VDCDC3 of the 3rd step-down conversion chip U20 and described 2.5V voltage output end VCC_2.5V, form successively three current node, the 4th filter circuit after in parallel between latter two current node, the 4th filter circuit is made up of capacitor C 157 and C159 parallel connection, its other end ground connection, the other end of last current node is series resistor R175 and resistance R 179 successively, wherein after the 4th pin L3 tandem electric inductance L43, is electrically connected with first of above-mentioned three current node;
(12), between the pin VDCDC2 of the 3rd step-down conversion chip U20 and 3.3V voltage output end VCC_3.3V, form successively three current node, the 5th filter circuit in parallel between latter two current node, the 5th filter circuit is by capacitor C 161 and capacitor C 162 and form, its other end ground connection, is electrically connected first current node in these three current node after the 35th pin L2 tandem electric inductance L43;
(13), the 9th pin VDCDC1 of the 3rd step-down conversion chip U20 is by the 6th filter circuit electrical connection 1.2V voltage output end VCC_1.2V, wherein, the 6th filter circuit is composed in parallel by capacitor C 158 and capacitor C 160, its other end ground connection, is electrically connected with the 6th filter circuit after the 7th pin L1 tandem electric inductance L42;
(14), the 27th pin RESPWRON of the 3rd step-down conversion chip U20 is electrically connected 2.5V voltage output end VCC_2.5V by resistance R 151.
(15), the second filter circuit composes in parallel by capacitor C 61 and capacitor C 15, the 3rd filter circuit is made up of capacitor C 16 and C62.
In third level power circuit:
The capacitance of capacitor C 140, C147 is 1uF, the capacitance of capacitor C 160, C162, C61, C62 is 10nF, and the capacitance of capacitor C 159, C158, C161, C15, C16 is 0.1uF, and capacitor C 124 is 1500pF, the capacitance of capacitor C 148 and capacitor C 149 is 2.2uF;
The resistance value of resistance R 164 is 100K ohm, the resistance value of resistance R 175 is 3.2K ohm, the resistance value of resistance R 179 is 1K ohm, and the resistance value of resistance R 151, R156 and R165 is 10K ohm, and the resistance value of resistance R 138, R160, R159, R161, R162 and R168 is 1K ohm;
Inductance L 42, inductance L 43 and inductance L 44 adopt 2.2uH, and electric current is 2A, ME3220 model.
By the design of base station power circuit, guarantee the fail safe that base station, down-hole is used, improve the explosion-proof performance of base station.
The foregoing is only preferred embodiment of the present utility model; not in order to limit the utility model; all any amendments of doing within spirit of the present utility model and principle, be equal to and replace and improvement etc., within all should being included in protection range of the present utility model.

Claims (6)

1. a Underground Mine 3G wireless network group-network construction, is characterized in that, described Underground Mine 3G wireless network group-network construction specifically comprises:
A flame-proof mine base station controller being arranged under mine;
Several Mine-used I. S base stations that are connected with described base station controller communication, wherein, described in several, base station is connected with described base station controller in the mode of chain type networking;
Wherein, described base station controller is provided with flame-proof type explosion-proof housing, in described explosion-proof casing, be provided with the first master control borad, described the first master control borad is provided with 1 the first optical module interface and 7 the second optical module interfaces, described the first master control borad is provided with the first main control chip being electrically connected with described the first optical module interface and described the second optical module interface, wherein, described the first optical module interface connects baseband processing unit by optical fiber, the corresponding described base station connecting in downstream position of described the second optical module interface;
Described base station comprises shell and the second master control borad of enclosure is set, described the second master control borad is provided with up optical module interface and descending optical module interface, described up optical module interface is connected with described base station controller or the base station optical fiber of upstream, described descending optical module interface is connected with base station, downstream, on described the second master control borad, be also provided with the second main control chip being electrically connected with up optical module interface and descending optical module interface, at least one radio receiving transmitting module of described the second main control chip electrical connection, described the second master control borad is provided with the antenna jack being electrically connected with described radio receiving transmitting module, the corresponding grafting wireless signal of described antenna jack dual-mode antenna.
2. Underground Mine 3G wireless network group-network construction according to claim 1, is characterized in that, the described descending optical module interface of the base station in chain type networking end is connected with described base station controller, forms annular networking.
3. Underground Mine 3G wireless network group-network construction according to claim 1 and 2, it is characterized in that, on described second master control borad of described base station, be also provided with power circuit, described power circuit comprises first order power circuit, second level power circuit and third level power circuit.
4. Underground Mine 3G wireless network group-network construction according to claim 3, it is characterized in that, described first order power circuit comprises rectification circuit, described rectification circuit connects pin 1 and the pin 2 of integrated chip J10, be connected in parallel the 4th pin GND of the first step-down conversion chip U1 of the pin 3 of described integrated chip J10 and pin 4 and described rectification circuit, between the 4th pin GND of described the first step-down conversion chip U1 and described rectification circuit, form successively the first current node, the second current node and the 3rd current node, the described first current node other end is electrically connected with the 2nd pin IN of described the first step-down conversion chip U1 by the 4th current node, described the 4th current node other end is electrically connected the 7th pin EN of described the first step-down conversion chip U1 by the 5th current node, described the 5th current node is electrically connected with the 4th pin GND of described the first step-down conversion chip U1 by described the 3rd current node, the other end of described the second current node extends ground connection, the 3rd pin SW ground connection of described the first step-down conversion chip U1, the 1st pin BS electrical connection 9V voltage output end 9V_VCC of described the first step-down conversion chip U1, the output of the 5th pin FB of described the first step-down conversion chip U1 forms the 6th current node between the 1st pin BS of described the first step-down conversion chip U1 and described 9V voltage output end 9V_VCC, between the 1st pin BS of described the 6th current node and described the first step-down conversion chip U1, be electrically connected with successively capacitor C 2 and inductance L 1, the 6th pin COMP of described the first step-down conversion chip U1 is electrically connected with the 8th pin SS of the first step-down conversion chip U1 by capacitor C 4 and capacitor C 6.
5. Underground Mine 3G wireless network group-network construction according to claim 3, it is characterized in that, described second level power circuit comprises the second step-down conversion chip U21, the 2nd pin IN of described the second step-down conversion chip U21 is electrically connected with the 9V voltage output end 9V_VCC of described first order power circuit, between the 7th pin EN of the 2nd pin IN of described the second step-down conversion chip U21 and described the second step-down conversion chip U21, form the 8th current node and the 9th current node, described the 8th current node is by capacitor C 150 ground connection, described the 9th current node is electrically connected with the 4th pin GND of described the second step-down conversion chip U21 by capacitor C 151, the 1st pin BS electrical connection 5V voltage output end VCC_5.0V of described the second step-down conversion chip U21, between the 1st pin BS of described the second step-down conversion chip U21 and 5V voltage output end VCC_5.0V, form the tenth current node, the 11 current node, the 12 current node and the 13 current node, wherein, described the tenth current node, shunt capacitance C153 and capacitor C 154 between the 11 current node, between described the 12 current node and the 13 current node, be provided with the first filter circuit, the 6th pin COMP of described the second step-down conversion chip U21 is electrically connected with the 8th pin SS of described the second step-down conversion chip U21 by capacitor C 155 and capacitor C 156.
6. Underground Mine 3G wireless network group-network construction according to claim 5, is characterized in that, described third level power circuit comprises the 3rd step-down conversion chip U20, the 7th pin VCC of described the 3rd step-down conversion chip U20, the 5th pin VINDCDC3, the 36th pin VINDCDC3, the 6th pin VINDCDC3, the 14th pin VSYSIN, the 11st pin HOT_RESET, the 19th pin VINLDO, the 12nd pin DEFLDO1, the 22nd pin LEO_EN, the 23rd pin DCDC3_EN, the 24th pin DCDC2_EN and the 25th pin DCDC1_EN are electrically connected respectively the described 5V voltage output end VCC_5.0V of described second level power circuit, the 0th pin GND of described the 3rd step-down conversion chip U20, the 15th pin VBACKUP, the 16th pin VRTC, the 26th pin TRESPWEON, the 13rd pin DEFLDO2, the 3rd pin PGND3, the 34th pin PGND2, the 10th pin DEFDCDC1, the 8th pin PGND1, the 40th pin AGND1 and the 17th pin AGND2 be ground connection respectively, the 28th pin INT of described the 3rd step-down conversion chip U20, pin VDCDC2 and the 35th pin L2 are electrically connected respectively 3.3V voltage output end VCC_3.3V, the 2nd pin VDCDC3 of described the 3rd step-down conversion chip U20, the 4th pin L3, the 27th pin RESPWRON, the 38th pin PWRFAIL_SNS, the 31st pin PWRFAIL and the 21st pin LOWBAT electrical connection 2.5V voltage output end VCC_2.5V, the 39th pin LOWBAT_SNS connects voltage output end VCC_2.5V by resistance R 17100, the 20th pin VLDO1 electrical connection LDO_2.8V end, the 18th pin VLDO2 of described the 3rd step-down conversion chip U20 and the 17th pin AGEND2 electrical connection LDO_3.3V end, between the 17th pin AGND2 of described the 3rd step-down conversion chip U20 and described LDO_3.3V end, be provided with the second filter circuit, between described the second filter circuit and described LDO_2.8V end, be provided with the 3rd filter circuit.
CN201420275879.6U 2014-05-27 2014-05-27 A kind of Underground Mine 3G wireless network group-network construction Expired - Fee Related CN203968387U (en)

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