CN203966123U - A kind of circuit of quick calculating sine and cosine numerical value - Google Patents
A kind of circuit of quick calculating sine and cosine numerical value Download PDFInfo
- Publication number
- CN203966123U CN203966123U CN201420323170.9U CN201420323170U CN203966123U CN 203966123 U CN203966123 U CN 203966123U CN 201420323170 U CN201420323170 U CN 201420323170U CN 203966123 U CN203966123 U CN 203966123U
- Authority
- CN
- China
- Prior art keywords
- input end
- comparer
- sine
- output terminal
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Complex Calculations (AREA)
Abstract
The utility model discloses a kind of circuit of quick calculating sine and cosine numerical value, described circuit comprises separation vessel, totalizer, shift unit, sine and cosine table, two registers, two multipliers and two comparers.The utility model utilizes the mode of feedback search, in the situation that not increasing additional circuit cost, calculate fast the corresponding sine value of arbitrary coordinate and cosine value in first quartile, compare with traditional account form, without using division arithmetic and extracting operation, execution speed is fast, and saving circuit hardware cost, has improved resource utilization and circuit structure is simple.
Description
Technical field
The utility model relates to circuit design field, relates in particular to a kind of quick calculating sine and cosine Digital Circuit.
Background technology
Along with the continuous progress and development of contemporary electronic technology, in graph rendering field, require hardware spending still less, speed is rendering system faster.Especially in two-dimension vector graphics render process, need to calculate the corresponding sine value of each coordinate points and cosine value.Therefore, sine and cosine numerical evaluation circuit directly affects the whole performance of playing up and hardware spending.
In the prior art, the sine value that certain coordinate is corresponding and cosine value counting circuit generally all directly directly calculate according to the computing formula of sine and cosine, but in implementation procedure, need hardware and huge division arithmetic and the extracting operation of time overhead.How under the limited environment of hardware resource, obtain fast sine value and the cosine value that this point coordinate is corresponding, become a problem anxious to be resolved.
Summary of the invention
The purpose of this utility model is to overcome the shortcoming of prior art, and a kind of corresponding sine and cosine value circuit of quick calculating coordinate points of low hardware spending is provided.
For solving above technical matters, the technical solution of the utility model is: a kind of quick calculating sine and cosine Digital Circuit, is characterized in that: described circuit comprises separation vessel, totalizer, shift unit, sine and cosine table, two registers, two multipliers and two comparers; The first input end of wherein said separation vessel is connected with the output terminal of the first comparer and the output terminal of shift unit respectively with the second input end; The first output terminal of described separation vessel is connected with the input end of the second register with the input end of the first register respectively with the second output terminal; When described the first comparer is output as 1, the output of described shift unit is connected to the input end of described the first register; When described the first comparer be output as 0 time, the output of described shift unit is connected to the input end of described the second register; Initial value in described the first register is 90, represents angle value, and its output terminal is connected with the first input end of the second comparer with totalizer; The initial value of described the second register is 0, represents angle value, and the output terminal of described the second register is connected with the second input end of the input end of totalizer and the second comparer; The output terminal of described totalizer is connected with the input end of shift unit; The bit manipulation that moves to right of described shift unit, represent in integer arithmetic except 2 computings; The output terminal output system output signal finish of described the second comparer; Described sine and cosine table is deposited corresponding sine value and the cosine value of 0～89 each angle of degree, and its input end is connected with the output terminal of described shift unit, and its first output terminal Sin connects input end and the system output x/sqrt (x of the first multiplier
2+ y
2), its second output terminal Cos connects input end and the system output y/sqrt (x of the second multiplier
2+ y
2), by the angle value of described sine and cosine table input end input, export sine value corresponding to this angle and cosine value simultaneously.If the first input end numerical value of the first comparer is more than or equal to the input end numerical value of described second input end of described the first comparer, the Output rusults of described comparer is 1; If the second input end numerical value of described the first comparer is greater than the first input end numerical value of described the first comparer, the Output rusults of described the first comparer is 0.
Compared with prior art, the beneficial effects of the utility model are: the angle that is input to sine and cosine table is constantly updated in the utility model utilization, the angle of the first quartile coordinate points of inputting by system compares with the angle that is input to sine and cosine table, utilize feedback result to constantly update the input angle of sine and cosine table, until the angle of first quartile coordinate points equates with the input angle of sine and cosine table, therefore obtain fast the corresponding sine and cosine value of this coordinate points, thereby avoid division and extracting operation in traditional sine and cosine value computation process, saved circuit hardware cost, improved circuit travelling speed.
Accompanying drawing explanation
Fig. 1 is the circuit diagram of the utility model the first embodiment.
Embodiment:
Below by embodiment, by reference to the accompanying drawings the utility model is described in further detail.
Please refer to Fig. 1, in the first embodiment of the present utility model, sine and cosine table 7: formed by nonvolatile memories such as the SRAM of existing initialization data or FLASHMEMORY or EEPROM, its initialization data is sine value and the cosine value of 0～an angle of 90 degrees degree, and the precision of the angle recording can be according to practical application adjustment, if precision is 1 degree, totally 91 records in this table, if precision is 0.5 degree, totally 182 records in this table, by that analogy.
X and y are system input, represent certain point coordinate in first quartile, and its system input value requires non-negative and unequal;
Finish, x/sqrt (x
2+ y
2) and y/sqrt (x
2+ y
2) be system output interface, when finish signal is 1, indication circuit operation is complete, now output interface x/sqrt (x
2+ y
2) and y/sqrt (x
2+ y
2) respectively this input coordinate of indication circuit operation gained put corresponding sine value and cosine value;
Two input ends of separation vessel 1 are connected with the output terminal of shift unit 5 with the output terminal of comparer 10 respectively; The first output terminal of described separation vessel 1 is connected with the input end of register 2, and the second output terminal is connected with the input end of register 3; When comparer 10 is output as 1, the output of shift unit 5 is connected to the input end of register 2, and when comparer 10 is output as 0, the output of shift unit 5 is connected to the input end of register 3;
In register 2, initialization values is 90, represents angle value, and its input end connects the first output terminal of separation vessel 1, and output terminal is connected with the first input end of comparer 6 with the input end of totalizer 4;
In register 3, initialization values is 0, represents angle value, and its input end connects the second output terminal of separation vessel 1, and output terminal is connected with the input end of totalizer 4 and the second input end of comparer 6;
The first input end of totalizer 4 and the second input end are connected respectively the output terminal of register 2 and register 3, and its output terminal is connected with the input end of shift unit 5;
The input end of shift unit 5 is connected with the output terminal of totalizer 4, and the bit manipulation that moves to right represents 2 computings that remove in integer arithmetic;
The first input end of comparer 6 is connected with the output terminal of register 2, and its second input end is connected with the output terminal of register 3, its output terminal representative system output signal finish;
In sine and cosine table 7, be corresponding sine value and the cosine value of 0～89 each angle of degree, its input end connects the output terminal of shift unit 5, and its output terminal Sin connects input end and the system output x/sqrt (x of multiplier 8
2+ y
2), output terminal Cos connects input end and the system output y/sqrt (x of multiplier 9
2+ y
2), by the angle value of input end, export sine value corresponding to this angle and cosine value simultaneously; The sinusoidal output terminal numerical value of sine and cosine table 7 multiplies each other through multiplier 8 with input x; The cosine output terminal numerical value of sine and cosine table 7 multiplies each other through multiplier 9 with input y;
The output terminal of multiplier 8 and multiplier 9 links respectively first input end and second input end of comparer 10;
If the first input end numerical value of comparer 10 is more than or equal to the second input end numerical value of comparer 10, the Output rusults of comparer 10 is 1; If the second input end numerical value of comparer 10 is greater than the first input end numerical value of comparer 10, the Output rusults of comparer 10 is 0;
The angle that is input to sine and cosine table is constantly updated in the utility model utilization, the angle of the first quartile coordinate points of inputting by system compares with the angle that is input to sine and cosine table, utilize feedback result to constantly update the input angle of sine and cosine table, until the angle of first quartile coordinate points equates with the input angle of sine and cosine table, therefore obtain fast the corresponding sine and cosine value of this coordinate points, thereby avoid division and extracting operation in traditional sine and cosine value computation process, save circuit hardware cost, improved circuit travelling speed.
Above content is in conjunction with concrete embodiment further detailed description of the utility model, can not assert that concrete enforcement of the present utility model is confined to these explanations.For the utility model person of an ordinary skill in the technical field, without departing from the concept of the premise utility, can also make some simple deduction or replace, all should be considered as belonging to protection domain of the present utility model.
Claims (2)
1. calculate fast a circuit for sine and cosine numerical value, it is characterized in that: described circuit comprises separation vessel, totalizer, shift unit, sine and cosine table, two registers, two multipliers and two comparers; The first input end of wherein said separation vessel is connected with the output terminal of the first comparer and the output terminal of shift unit respectively with the second input end; The first output terminal of described separation vessel is connected with the input end of the second register with the input end of the first register respectively with the second output terminal; When described the first comparer is output as 1, the output of described shift unit is connected to the input end of described the first register; When described the first comparer be output as 0 time, the output of described shift unit is connected to the input end of described the second register; Initial value in described the first register is 90, represents angle value, and its output terminal is connected with the first input end of the second comparer with totalizer; The initial value of described the second register is 0, represents angle value, and the output terminal of described the second register is connected with the second input end of the input end of totalizer and the second comparer; The output terminal of described totalizer is connected with the input end of described shift unit; The bit manipulation that moves to right of described shift unit, represent in integer arithmetic except 2 computings; The output terminal output system output signal finish of described the second comparer; Described sine and cosine table is deposited corresponding sine value and the cosine value of 0～89 each angle of degree, and its input end is connected with the output terminal of described shift unit, and its first output terminal Sin connects input end and the system output x/sqrt (x of the first multiplier
2+ y
2), its second output terminal Cos connects input end and the system output y/sqrt (x of the second multiplier
2+ y
2), by the angle value of described sine and cosine table input end input, export sine value corresponding to this angle and cosine value simultaneously.
2. quick calculating sine and cosine Digital Circuit according to claim 1, it is characterized in that: if the first input end numerical value of the first comparer is more than or equal to the input end numerical value of described second input end of described the first comparer, the Output rusults of described comparer is 1; If the second input end numerical value of described the first comparer is greater than the first input end numerical value of described the first comparer, the Output rusults of described the first comparer is 0.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420323170.9U CN203966123U (en) | 2014-06-17 | 2014-06-17 | A kind of circuit of quick calculating sine and cosine numerical value |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420323170.9U CN203966123U (en) | 2014-06-17 | 2014-06-17 | A kind of circuit of quick calculating sine and cosine numerical value |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN203966123U true CN203966123U (en) | 2014-11-26 |
Family
ID=51926680
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201420323170.9U Expired - Fee Related CN203966123U (en) | 2014-06-17 | 2014-06-17 | A kind of circuit of quick calculating sine and cosine numerical value |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN203966123U (en) |
-
2014
- 2014-06-17 CN CN201420323170.9U patent/CN203966123U/en not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102981797B (en) | Trigonometric function arithmetic device based on combination of feedback of coordinated rotation digital computer (CORDIC) algorithm and pipeline organization | |
| CN103970720B (en) | Based on extensive coarseness imbedded reconfigurable system and its processing method | |
| CN103677738A (en) | Method and device for achieving low delay basic transcendental function based on mixed model CORDIC algorithmic | |
| CN103530005A (en) | Positioning method of touch display panel | |
| CN103488459A (en) | Complex multiplication unit based on modified high-radix CORDIC algorithm | |
| CN103135960A (en) | Design method of integrated floating point unit based on FPGA (field programmable gate array) | |
| CN104048777A (en) | Temperature value and resistance value conversion method for NTC-type thermistor | |
| Wang et al. | Existence and stability of solutions to nonlinear impulsive differential equations in β-normed spaces | |
| CN104765713A (en) | Method for achieving FPGA digital signal processing based on segmented lookup trigonometric function | |
| CN102253822B (en) | Modular (2<n>-3) multiplier | |
| CN203966123U (en) | A kind of circuit of quick calculating sine and cosine numerical value | |
| CN108958619A (en) | Operation method of user interface, equipment and computer readable storage medium | |
| CN103544729A (en) | Animation data processing method and system | |
| CN103645883A (en) | FPGA (field programmable gate array) based high-radix modular multiplier | |
| CN104238992A (en) | High-performance imprecise floating point adder and application method thereof | |
| CN205281474U (en) | Quick adder of six operands on two -stage assembly line that can dispose | |
| CN101493789B (en) | Method, apparatus and system for acquiring CPU utilization ratio | |
| CN104407705B (en) | The method and electric terminal of picture are operated every empty-handed gesture | |
| CN204990269U (en) | Inverse trigonometrical function realizes device based on FPGA | |
| TWM588288U (en) | Goldbach conjecture computing system | |
| CN103699729A (en) | Modulus multiplier | |
| CN105893334B (en) | Triangulation Algorithm and signal anti-interference process device on the anti-interference matrix of complex signal | |
| CN102929575A (en) | Modular multiplier | |
| CN103164186A (en) | Time-varying reciprocal calculation method of solving division-by-zero situation | |
| Li et al. | The method of fundamental solutions and its combinations for exterior problems |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20141126 Termination date: 20200617 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |