CN203951378U - A kind of low-loss rectification circuit - Google Patents
A kind of low-loss rectification circuit Download PDFInfo
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Abstract
The utility model discloses a kind of low-loss rectification circuit, it comprises first, second, third, fourth diode; In addition it also comprises: in parallel four MOSFETs corresponding to described four diodes; Logic control module, it comprises signal divider, comparison circuit, reverser and triple gate, the conducting of the each MOSFET of described Logic control module control and blocking, so that each MOSFET substitutes the diode of parallel connection corresponding to it as the passage of rectifying conversion signal under the state of conducting.The disclosed low-loss rectification circuit of the utility model, it makes rectification circuit have extremely low rectification pressure drop, thereby can effectively reduce the loss of rectification circuit.
Description
Technical field
The utility model relates to a kind of power component circuit, relates in particular to a kind of rectification circuit.
Background technology
Rectification circuit is as a kind of power component circuit, and it comprises that four diodes form Qiao road, realizes the AC signal of input to the conversion of the direct current signal of output.
Within each work period of rectification circuit, the same time only has two diode operation, by the one-way conduction function of diode, AC signal is converted to unidirectional DC pulse signal.Due to the pressure drop of diode itself, make rectification circuit inevitably can produce certain loss in the process using, especially obtain field at energy conversion, above-mentioned loss will affect the performance of whole circuit.Therefore, the loss of reduction rectification circuit is a focus of energy harvesting area research.
Publication number is CN102468741A, open day is on May 23rd, 2012, the Chinese patent literature that name is called " rectification circuit " discloses a kind of control method of rectification circuit, in the time that load current is less than reference current, rectification circuit is in light condition, control circuit reduces the switching frequency of switching circuit, both can improve the underloading frequency reducing efficiency of power supply unit, can effectively reduce again the ripple voltage component in this Output Voltage in Rectified Circuits.
Publication number is CN102075102A, open day is on May 25th, 2011, the Chinese patent literature that name is called " bridge rectifier " discloses a kind of rectification circuit, it replaces two underarm diodes of rectifier bridge with N-channel MOS FET, and realize the control of MESFET by control circuit, thereby the loss of rectifier bridge is reduced to half.
Publication number is CN101626198, and open day is on January 13rd, 2010, and the Chinese patent literature that name is called " high efficiency active rectifying circuit " discloses a kind of Half bridge rectifier circuit, and it adopts MOSFET to complete half-bridge circuit, realizes lower loss.
For the rectification circuit in energy conversion field, its rectifier loss is more low better, and therefore the disclosed rectification circuit of above-mentioned patent documentation also has improved space.
Utility model content
The purpose of this utility model is to provide a kind of low-loss rectification circuit, and it has extremely low rectification pressure drop, can effectively reduce the loss of rectification circuit.
To achieve these goals, the utility model proposes a kind of low-loss rectification circuit, being used for is direct-flow output signal by ac input signal rectifying conversion, comprise the first diode, the second diode, the 3rd diode and the 4th diode, wherein the negative pole of the first diode is connected with the positive pole of the second diode, the negative pole of the second diode is connected with the negative pole of the 3rd diode, the positive pole of the 3rd diode is connected with the negative pole of the 4th diode, the positive pole of the 4th diode is connected and is connected with the positive pole of the first diode, wherein the negative pole of the first diode is connected ac input end with the negative pole of the 4th diode, the positive pole of the first diode is connected DC output end with the negative pole of the second diode, it also comprises:
The one MOSFET, the 2nd MOSFET, the 3rd MOSFET and the 4th MOSFET, it is corresponding with the first diode, the second diode, the 3rd diode and the 4th diode in parallel respectively;
Logic control module, described Logic control module is according to the AC signal that is received from ac input end, output logic control signal is controlled the conducting of each MOSFET and is blocked, so that each MOSFET substitutes the passage of in parallel diode corresponding to it as rectifying conversion signal under the state of conducting; Described Logic control module comprises:
Signal divider, its input connects described ac input end, and described signal divider is to export for after the voltage of following comparison circuit processing by the alternating voltage dividing potential drop of ac input end input;
Comparison circuit, it is connected with the output of signal divider, and the AC signal that is received from signal divider output is converted to control signal output by described comparison circuit;
Reverser, its input connects the output of comparison circuit;
The first tri-state control gate, the second tri-state control gate, the 3rd tri-state control gate and the 4th tri-state control gate, the input of described each tri-state control gate is also connected with the output of comparison circuit and the output of reverser respectively with control end, the output of described the first tri-state control gate, the second tri-state control gate, the 3rd tri-state control gate and the 4th tri-state control gate respectively with corresponding connection of grid of a described MOSFET, the 2nd MOSFET, the 3rd MOSFET and the 4th MOSFET, export described logic control signal with the conducting of corresponding each MOSFET of control respectively and block.
Low-loss rectification circuit described in the utility model, comprise the conventional rectifier bridge being formed by four diodes, by four MOSFET and described four diodes are distinguished corresponding in parallel, thereby form four brachium pontis of rectifier bridge of the present utility model, in the time of voltage over zero, be responsible for rectification by diode, then control MOSFET according to the conducting sequential conducting of former diode, thereby formed the conducting branch road of a ultra low dropout by MOSFET to replace the passage of former diode as rectifying conversion signal, reduce the power loss of rectification circuit, improve the efficiency of whole rectification circuit.Specifically, when low-loss rectification circuit work described in the utility model, receive ac input signal from ac input end, export direct-flow output signal through rectifying conversion from DC output end; Wherein, when ac input signal is positive half wave, from rectifier bridge operation principle, the second diode and the 4th diode current flow, now, Logic control module control the 2nd MOSFET and the 4th MOSFET conducting, due to its extremely low conduction voltage drop (conducting resistance is milliohm level only), cause the second diode and the cut-off of the 4th diode, now energy loss only produces on the 2nd MOSFET and the 4th MOSFET, and this device energy consumption is low-down compared with diode; In like manner, when ac input signal is negative half-wave, the first diode and the 3rd diode current flow, now, Logic control module control the one MOSFET and the 3rd MOSFET conducting, due to its extremely low conduction voltage drop, cause the first diode and the cut-off of the 3rd diode, now energy loss only produces on a MOSFET and the 3rd MOSFET.Described Logic control module by judge the positive and negative half-wave state of ac input signal provide four MOSFET of corresponding logic control signal control with four conducting of conducting sequential and cut-offs that diode is identical, thereby substitute diode as the passage of rectifying conversion signal; Wherein, comparison circuit receives the ac input signal after signal divider dividing potential drop, the level different according to different half-wave State-outputs, and this level is in conjunction with reverser, generate afterwards the grid of final four MOSFET of logic control signal control through four triple gates, thereby control its conducting and cut-off.
It is to be noted, in above-mentioned " input of described each tri-state control gate is also connected with the output of comparison circuit and the output of reverser respectively with control end ", its connected mode is corresponding connection not, but carry out corresponding connection according to control logic, its target is to make the logic control signal of described each tri-state control gate output meet the control requirement of Logic control module.
In low-loss rectification circuit switching process described in the utility model, replace the passage of the higher diode of loss as rectifying conversion signal by the extremely low MOSFET of loss, thereby reduced the loss of rectification circuit.
Further, in low-loss rectification circuit described in the utility model, described DC output end andlogic control module connects, and thinks Logic control module power supply.Due to DC output end output be direct current, therefore can utilize it is Logic control module power supply.
Further, low-loss rectification circuit described in the utility model also comprises DC power supply, and its andlogic control module connects, and thinks Logic control module power supply.In order to reduce to greatest extent output loss, also can separately get DC power supply is Logic control module power supply.
Further, in low-loss rectification circuit described in the utility model, described signal divider at least comprises the first resistance and the second resistance that are connected in series, after the first resistance and the second resistance are connected in series, be connected in described ac input end, the output of described signal divider is connected between the first resistance and the second resistance.Described signal divider utilizes a point compression functions for resistance series connection to carry out dividing potential drop to ac input signal.
Further, in low-loss rectification circuit described in the utility model, described comparison circuit comprises reverse comparator, and the reverse input end of described reverse comparator connects the output of signal divider, and oppositely the in-phase input end of comparator connects benchmark signal; The output that oppositely output of comparator is described comparison circuit.
Further, in above-mentioned low-loss rectification circuit, described comparison circuit also comprises the 3rd resistance and the 4th resistance; One end of described the 3rd resistance is connected to the in-phase input end of reverse comparator, and the other end of described the 3rd resistance is connected in the output of reverse comparator; One end of described the 4th resistance is connected in the in-phase input end of reverse comparator, the other end ground connection of described the 4th resistance.
Further, in low-loss rectification circuit described in the utility model, between the grid of described MOSFET and source electrode or between grid and drain electrode, be connected with resistance.This resistance plays and draws or the effect of drop-down current potential.
Further, in low-loss rectification circuit described in the utility model, a described MOSFET and the 4th MOSFET are N-channel MOS FET, and described the 2nd MOSFET and the 3rd MOSFET are P channel mosfet; The drain electrode of the one MOSFET and the 2nd MOSFET connects respectively the negative pole of the first diode and the second diode, and the drain electrode of the 3rd MOSFET and the 4th MOSFET connects respectively the positive pole of the 3rd diode and the 4th diode; The source electrode of the one MOSFET and the 2nd MOSFET connects respectively the positive pole of the first diode and the second diode, and the source electrode of the 3rd MOSFET and the 4th MOSFET connects respectively the negative pole of the 3rd diode and the 4th diode.
Further, in above-mentioned low-loss rectification circuit, between the grid of a described MOSFET and the 3rd MOSFET and drain electrode, be connected with respectively resistance, between the grid of the 2nd MOSFET and the 4th MOSFET and source electrode, be connected with respectively resistance.
Further, in above-mentioned low-loss rectification circuit, the input of described each tri-state control gate with control end with the syndeton of the output of comparison circuit and the output of reverser is: the input of the first tri-state control gate and the 3rd tri-state control gate is all connected with the output of reverser, the control end of the first tri-state control gate and the 3rd tri-state control gate is all connected with the output of comparison circuit, the input of the second tri-state control gate and the 4th tri-state control gate is all connected with the output of comparison circuit, the control end of the second tri-state control gate and the 4th tri-state control gate is all connected with the output of reverser.
The disclosed low-loss rectification circuit of the utility model, owing to having adopted above technical scheme, makes rectification circuit have extremely low rectification pressure drop, thereby can effectively reduce the loss of rectification circuit.
Brief description of the drawings
Fig. 1 is the circuit diagram of low-loss rectification circuit described in the utility model under a kind of execution mode.
Fig. 2 is the structural representation of the Logic control module of low-loss rectification circuit described in the utility model under a kind of execution mode.
Embodiment
Below in conjunction with Figure of description and specific embodiment, low-loss rectification circuit described in the utility model is made to further explanation and explanation.
Fig. 1 has illustrated the circuit of low-loss rectification circuit described in the utility model under a kind of execution mode.
As shown in Figure 1, the low-loss rectification circuit of the present embodiment, comprising: four diodes are respectively the first diode D1, the second diode D2, the 3rd diode D3 and the 4th diode D4; Four MOSFET are respectively a MOSFET T1, the 2nd MOSFET T2, the 3rd MOSFET T3 and the 4th MOSFET T4; Four resistance R 1, R2, R3 and R4.As shown in the figure, diode D1, D2, D3 and D4 form conventional rectification circuit to its annexation, IN+ and IN-are ac input signal, and Vcc and GND are direct-flow output signal, the MOSFET T2 of P raceway groove and T3 are in parallel with diode D2 and D3 respectively, and the MOSFET T1 of N raceway groove and T4 are in parallel with diode D1 and D4 respectively, the power supply of Logic control module U is provided by output Vcc and the GND of rectification circuit, four logic control signal output g1, g2, g3 and g4 respectively with MOSFET T1, T2, the grid of T3 and T4 is connected, the grid voltage of MOSFET is respectively Vg1, Vg2, Vg3 and Vg4, source voltage is respectively Vs1, Vs2, Vs3 and Vs4, drain voltage is respectively Vd1, Vd2, Vd3 and Vd4, resistance R 2 and R3 are respectively the pull-up resistor of MOSFET T2 and T3, in the time that grid control level is tri-state, grid voltage is pulled to source voltage, resistance R 1 and R4 are respectively the pull down resistor of MOSFET T1 and T4, in the time that grid control level is tri-state, grid voltage is pulled down to drain voltage, Logic control module U detects ac input signal IN+ and IN-in real time, according to the phase place of ac input signal routinely under rectification circuit diode current flow sequential select different MOSFET conductings, so that each MOSFET substitutes the passage of in parallel diode corresponding to it as rectifying conversion signal under the state of conducting, thereby realize the low-loss rectification to ac input signal IN+ and IN-, output direct-flow output signal Vcc and GND.
Fig. 2 has illustrated the electrical block diagram of the Logic control module of low-loss rectification circuit described in the utility model under a kind of execution mode.
As shown in Figure 2, the Logic control module U of the present embodiment comprises: signal divider, reverse comparison circuit, reverser U2 and four triple gate G1, G2, G3 and G4, wherein signal divider comprises the first resistance R 5 and second resistance R 6 of series connection, and oppositely comparison circuit comprises reverse comparator U1, resistance R 7 and resistance R 8.Connected mode is as figure, and ac input signal IN+ and IN-connect the two ends of R5 and the R6 of series connection, and g1, g2, g3 and g4 are respectively the output of four triple gate G1, G2, G3 and G4.In addition, Vcc and GND are for oppositely comparator, reverser and triple gate provide power supply.Resistance R 5 and R6 form signal divider, voltage between ac input signal IN+ and IN-is divided into the voltage levvl that can process for reverse comparator U1, resistance R 5 one termination IN+, one end is connected with resistance R 6 in addition, be linked into the reverse input end of reverse comparator U1 simultaneously, an other termination IN-of resistance R 6, resistance R 7, R8 and oppositely comparator U1 form reverse comparison circuit, resistance R 8 one termination GND, one end is connected with resistance R 7 in addition, be linked into the in-phase input end of reverse comparator U1 simultaneously, other one end of resistance R 7 is connected with the output of reverse comparator U1.Get R8>>R7, make benchmark be approximately zero, oppositely comparator U1 converts ac input signal IN+ and IN-to pulse output signals, is linked into respectively the input of input, triple gate G2 and G4 and the control end of triple gate G1 and G3 of reverser U2; Reverser U2 is output as the reverse level of its input, and its output is linked into the control end of triple gate G2 and G4 and the input of triple gate G1 and G3; Triple gate has input, output and control end, and in the time that its control end is low level, its output is in illegal state, and in the time that its control end is high level, its output level equals input level.Four output g1, g2, g3 and the g4 of triple gate G1, G2, G3 and G4 are the output of whole Logic control module U.
The specific works process of the present embodiment is incorporated by reference to reference to figure 1 and Fig. 2:
In the time that ac input signal IN+ and IN-are positive half wave, be VIN+> Vcc>GND>VIN-, oppositely the reverse input end signal of comparator U1 is for just, be output as GND, reverser U2 is output as Vcc, because the control end voltage of triple gate G2 and G4 is Vcc, the output g2 of triple gate G2 and G4 and g4 are its input voltage GND, therefore the grid voltage Vg2=Vg4=GND of MOSFET T2 and T4.For MOSFET T1, because the control end of triple gate G1 is GND, its output g1 is tri-state, and Vg1 is pulled down to VIN+, so its not conducting; For MOSFET T2, due to Vg2=GND, Vs2=VIN+, and VIN+>GND, therefore T2 conducting; For MOSFET T3, because the control end of triple gate G3 is GND, its output g3 is tri-state, and therefore Vg3 is pulled to VIN-, so its not conducting; For T4, Vg4=GND, Vd4=VIN-, GND>VIN-, therefore T4 conducting; Now signal path is IN+-T2-Vcc-GND-T4-IN-; During due to MOSFET T2 and T4 conducting, conducting resistance is only milliohm rank, and therefore loss is very little.
When ac input signal IN+ and IN-are during for negative half-wave, be VIN-> Vcc>GND>VIN+, oppositely the reverse input end signal of comparator U1 is for negative, be output as Vcc, reverser U2 is output as GND, because the control end voltage of triple gate G1 and G3 is Vcc, the output g1 of triple gate G1 and G3 and g3 are its input voltage GND, therefore the grid voltage Vg1=Vg3=GND of MOSFET T1 and T3.For MOSFET T1, Vg1=GND, Vd1=VIN+, GND>VIN+, therefore T1 conducting; For MOSFET T2, because the control end of triple gate G2 is GND, it is output as tri-state, and therefore Vg2 is pulled down to VIN+, its not conducting; For MOSFET T3, Vg3=GND, Vd3=VIN-, VIN->GND, therefore T3 conducting; For MOSFET T4, because the control end of triple gate G4 is GND, it is output as tri-state, and therefore Vg4 is pulled to VIN-, therefore its not conducting.Now signal path is IN--T3-Vcc-GND-T1-IN+; During due to MOSFET T3 and T1 conducting, conducting resistance is only milliohm rank, and therefore loss is very little.
As can be seen here, have corresponding MOSFET conducting within the scope of the positive and negative half-wave of ac input signal IN+ and IN-, its minimum conducting resistance makes rectification circuit have extremely low pressure drop and loss.
Be noted that above enumerate only for specific embodiment of the utility model, obviously the utility model is not limited to above embodiment, has many similar variations thereupon.If all distortion that those skilled in the art directly derives or associates from the disclosed content of the utility model, all should belong to protection range of the present utility model.
Claims (10)
1. a low-loss rectification circuit, being used for is direct-flow output signal by ac input signal rectifying conversion, comprise the first diode, the second diode, the 3rd diode and the 4th diode, wherein the negative pole of the first diode is connected with the positive pole of the second diode, the negative pole of the second diode is connected with the negative pole of the 3rd diode, the positive pole of the 3rd diode is connected with the negative pole of the 4th diode, the positive pole of the 4th diode is connected and is connected with the positive pole of the first diode, wherein the negative pole of the first diode is connected ac input end with the negative pole of the 4th diode, the positive pole of the first diode is connected DC output end with the negative pole of the second diode, it is characterized in that, also comprise:
The one MOSFET, the 2nd MOSFET, the 3rd MOSFET and the 4th MOSFET, it is corresponding with the first diode, the second diode, the 3rd diode and the 4th diode in parallel respectively;
Logic control module, described Logic control module is according to the AC signal that is received from ac input end, output logic control signal is controlled the conducting of each MOSFET and is blocked, so that each MOSFET substitutes the passage of in parallel diode corresponding to it as rectifying conversion signal under the state of conducting; Described Logic control module comprises:
Signal divider, its input connects described ac input end, and described signal divider is to export for after the voltage of following comparison circuit processing by the alternating voltage dividing potential drop of ac input end input;
Comparison circuit, it is connected with the output of signal divider, and the AC signal that is received from signal divider output is converted to control signal output by described comparison circuit;
Reverser, its input connects the output of comparison circuit;
The first tri-state control gate, the second tri-state control gate, the 3rd tri-state control gate and the 4th tri-state control gate, the input of described each tri-state control gate is also connected with the output of comparison circuit and the output of reverser respectively with control end, the output of described the first tri-state control gate, the second tri-state control gate, the 3rd tri-state control gate and the 4th tri-state control gate respectively with corresponding connection of grid of a described MOSFET, the 2nd MOSFET, the 3rd MOSFET and the 4th MOSFET, export described logic control signal with the conducting of corresponding each MOSFET of control respectively and block.
2. low-loss rectification circuit as claimed in claim 1, is characterized in that, described DC output end andlogic control module connects, and thinks Logic control module power supply.
3. low-loss rectification circuit as claimed in claim 1, is characterized in that, also comprises DC power supply, and its andlogic control module connects, and thinks Logic control module power supply.
4. low-loss rectification circuit as claimed in claim 1, it is characterized in that, described signal divider at least comprises the first resistance and the second resistance that are connected in series, after the first resistance and the second resistance are connected in series, be connected in described ac input end, the output of described signal divider is connected between the first resistance and the second resistance.
5. low-loss rectification circuit as claimed in claim 1, it is characterized in that, described comparison circuit comprises reverse comparator, and the reverse input end of described reverse comparator connects the output of signal divider, and oppositely the in-phase input end of comparator connects benchmark signal; The output that oppositely output of comparator is described comparison circuit.
6. low-loss rectification circuit as claimed in claim 5, is characterized in that, described comparison circuit also comprises the 3rd resistance and the 4th resistance; One end of described the 3rd resistance is connected to the in-phase input end of reverse comparator, and the other end of described the 3rd resistance is connected in the output of reverse comparator; One end of described the 4th resistance is connected in the in-phase input end of reverse comparator, the other end ground connection of described the 4th resistance.
7. low-loss rectification circuit as claimed in claim 1, is characterized in that, between the grid of described MOSFET and source electrode or between grid and drain electrode, is connected with resistance.
8. low-loss rectification circuit as claimed in claim 1, is characterized in that, a described MOSFET and the 4th MOSFET are N-channel MOS FET, and described the 2nd MOSFET and the 3rd MOSFET are P channel mosfet; The drain electrode of the one MOSFET and the 2nd MOSFET connects respectively the negative pole of the first diode and the second diode, and the drain electrode of the 3rd MOSFET and the 4th MOSFET connects respectively the positive pole of the 3rd diode and the 4th diode; The source electrode of the one MOSFET and the 2nd MOSFET connects respectively the positive pole of the first diode and the second diode, and the source electrode of the 3rd MOSFET and the 4th MOSFET connects respectively the negative pole of the 3rd diode and the 4th diode.
9. low-loss rectification circuit as claimed in claim 8, is characterized in that, between the grid of a described MOSFET and the 3rd MOSFET and drain electrode, is connected with respectively resistance, between the grid of the 2nd MOSFET and the 4th MOSFET and source electrode, is connected with respectively resistance.
10. low-loss rectification circuit as claimed in claim 9, it is characterized in that, the input of described each tri-state control gate with control end with the syndeton of the output of comparison circuit and the output of reverser is: the input of the first tri-state control gate and the 3rd tri-state control gate is all connected with the output of reverser, the control end of the first tri-state control gate and the 3rd tri-state control gate is all connected with the output of comparison circuit, the input of the second tri-state control gate and the 4th tri-state control gate is all connected with the output of comparison circuit, the control end of the second tri-state control gate and the 4th tri-state control gate is all connected with the output of reverser.
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| CN104092389A (en) * | 2014-07-24 | 2014-10-08 | 国家电网公司 | Low-loss rectifying circuit |
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| CN104092389A (en) * | 2014-07-24 | 2014-10-08 | 国家电网公司 | Low-loss rectifying circuit |
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Granted publication date: 20141119 |