CN203933654U - Realization has the chaos analog circuit of single nonlinear exponent item - Google Patents

Realization has the chaos analog circuit of single nonlinear exponent item Download PDF

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CN203933654U
CN203933654U CN201420341242.2U CN201420341242U CN203933654U CN 203933654 U CN203933654 U CN 203933654U CN 201420341242 U CN201420341242 U CN 201420341242U CN 203933654 U CN203933654 U CN 203933654U
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operational amplifier
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王光义
蔡博振
任国瑞
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Hangzhou Dianzi University
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Abstract

本实用新型公开了一种实现具有单个非线性指数项的混沌模拟电路。根据数学上的等效关系电路由乘法器和自然指数电路来实现,利用乘法器U4实现电压运算,并保持电压恒为正;利用U1的比例运算电路实现运算,为比例运算电路的比例系数,为比例运算电路的输入电压;三极管组合电路和集成运算放大器U1组成自然指数电路,实现运算,利用集成运算放大器U1的反相器实现了。该电路运算精确,稳定性好,可产生更为复杂的混沌信号供应用中选择,增加了混沌系统和实现混沌系统的电路类型,且能够和已有的混沌系统组成自动切换混沌系统。

The utility model discloses a chaotic analog circuit for realizing a single nonlinear exponential item. According to the mathematical equivalence , The circuit is realized by a multiplier and a natural exponential circuit, and the voltage is realized by using the multiplier U4 operation, and keep the voltage constant positive; use the proportional operation circuit of U1 to realize operation, is the proportional coefficient of the proportional operation circuit, It is the input voltage of the proportional operation circuit; the triode combination circuit and the integrated operational amplifier U1 form a natural exponential circuit to realize operation, using the inverter of the integrated operational amplifier U1 to realize the . The circuit has precise operation and good stability, can generate more complicated chaotic signals for selection in applications, adds chaotic systems and circuit types for realizing chaotic systems, and can form an automatic switching chaotic system with existing chaotic systems.

Description

实现具有单个非线性指数项的混沌模拟电路Implementing a chaotic analog circuit with a single nonlinear exponential term

技术领域technical field

本实用新型属于电子通信领域,涉及一种能够产生伪随机信号的混沌电路,特别涉及一种实现具有单个非线性指数项的混沌模拟电路。The utility model belongs to the field of electronic communication, relates to a chaotic circuit capable of generating pseudo-random signals, in particular to a chaotic analog circuit realizing a single nonlinear exponential item.

背景技术Background technique

混沌系统可作为随机信号源用于设计伪随机序列发生器,混沌伪随机序列发生器所产生的序列的安全性依赖于混沌系统的复杂性。对混沌系统的基本要求是数学结构简而混沌信号复杂。现有的混沌系统一般都含有两个或两个以上的非线性函数项,其中包括分段线性、乘积(xy、x2、y2)型的非线性项。为了增加复杂性,也出现了利用自然指数ex(或exy、exx等)和乘积型非线性项构成的混沌系统。此类混沌系统含有两个或两个以上自然指数非线性项,或含有一个自然指数和一个乘积项,使得其数学结构比较复杂,且自然指数的底数e是固定的,限制了指数函数的多样性。为此,本实用新型实现了仅含一个非线性指数函数的新型混沌模拟电路,使得混沌系统的数学结构非常简单,且指数函数的底数d可以在一定范围内任意变化,使得混沌信号更加复杂,具有更大的参数和密钥空间,进一步提高了混沌信号的复杂性。The chaotic system can be used as a random signal source to design a pseudo-random sequence generator, and the security of the sequence generated by the chaotic pseudo-random sequence generator depends on the complexity of the chaotic system. The basic requirement of the chaotic system is that the mathematical structure is simple and the chaotic signal is complex. Existing chaotic systems generally contain two or more nonlinear function items, including piecewise linear and product (xy, x 2 , y 2 ) type nonlinear items. In order to increase the complexity, a chaotic system composed of natural exponent ex (or e xy , e xx , etc.) and product nonlinear terms has also appeared. This kind of chaotic system contains two or more natural exponential nonlinear terms, or contains a natural exponent and a product term, which makes its mathematical structure more complicated, and the base e of the natural exponent is fixed, which limits the variety of exponential functions sex. For this reason, the utility model realizes that only contains a non-linear exponential function The new chaotic analog circuit makes the mathematical structure of the chaotic system very simple, and the exponential function The base d of can be changed arbitrarily within a certain range, which makes the chaotic signal more complex, has a larger parameter and key space, and further increases the complexity of the chaotic signal.

发明内容Contents of the invention

针对现有技术的不足,本实用新型提出了一种新型的混沌电路。Aiming at the deficiencies of the prior art, the utility model proposes a novel chaotic circuit.

本实用新型包括集成运算放大器U1、集成运算放大器U2、集成运算放大器U3、乘法器U4、二极管D1、二极管D2,三极管Q1和三极管Q2。The utility model comprises an integrated operational amplifier U1, an integrated operational amplifier U2, an integrated operational amplifier U3, a multiplier U4, a diode D1, a diode D2, a triode Q1 and a triode Q2.

所述集成运算放大器U1的第3引脚、第5引脚、第10引脚、第12引脚接地,第4引脚接+15V电源VCC,第11引脚接负-15V电源VEE;第l引脚通过电阻R2接集成运算放大器U1的第2引脚,乘法器U4第7个引脚通过电阻R1接到集成运算放大器U1的第2个引脚;集成运算放大器U1第1个引脚接到二极管D1和二极管D2之间,二极管D1、二极管D2、三极管Q1和三极管Q2组成电路的输出端接到集成运算放大器U1的第6个引脚,集成运算放大器U1的第7个引脚通过电阻R5接到集成运算放大器U1的第6个引脚;集成运算放大器U1的第7个引脚通过电阻R18接到集成运算放大器U1的第9个引脚,集成运算放大器U1的第8个引脚通过电阻R19接到集成运算放大器U1的第9个引脚;集成运算放大器U1的第8个引脚通过电阻R8接到集成运算放大器U1的第13个引脚,集成运算放大器U3的第1个引脚通过电阻R6接到集成运算放大器U1的第13个引脚,集成运算放大器U1的第14个引脚通过电阻R7接到集成运算放大器U1的第13个引脚。The 3rd pin, the 5th pin, the 10th pin, and the 12th pin of the integrated operational amplifier U1 are grounded, the 4th pin is connected to the +15V power supply VCC, and the 11th pin is connected to the negative -15V power supply VEE; The l pin is connected to the second pin of the integrated operational amplifier U1 through the resistor R2, and the seventh pin of the multiplier U4 is connected to the second pin of the integrated operational amplifier U1 through the resistor R1; the first pin of the integrated operational amplifier U1 Connected between diode D1 and diode D2, the output terminal of the circuit composed of diode D1, diode D2, transistor Q1 and transistor Q2 is connected to the sixth pin of integrated operational amplifier U1, and the seventh pin of integrated operational amplifier U1 passes through Resistor R5 is connected to the 6th pin of the integrated operational amplifier U1; the 7th pin of the integrated operational amplifier U1 is connected to the 9th pin of the integrated operational amplifier U1 through the resistor R18, and the 8th pin of the integrated operational amplifier U1 The pin is connected to the 9th pin of the integrated operational amplifier U1 through the resistor R19; the 8th pin of the integrated operational amplifier U1 is connected to the 13th pin of the integrated operational amplifier U1 through the resistor R8, and the 1st pin of the integrated operational amplifier U3 The first pin is connected to the 13th pin of the integrated operational amplifier U1 through the resistor R6, and the 14th pin of the integrated operational amplifier U1 is connected to the 13th pin of the integrated operational amplifier U1 through the resistor R7.

所述集成运算放大器U2的第3引脚、第5引脚、第10引脚、第12引脚接地,第4引脚接+15V电源VCC,第11引脚接负-15V电源VEE;第l引脚通过电容C3接集成运算放大器U2的第2引脚,集成运算放大器U1的第14个引脚通过电阻R9接集成运算放大器U2的第2个引脚;集成运算放大器U2的第1个引脚通过电阻R10接集成运算放大器U2的第6个引脚,集成运算放大器第7引脚通过电阻R11接集成运算放大器U2的第6引脚;集成运算放大器U2第8引脚通过电阻R14接集成运算放大器U2的第9引脚,集成运算放大器U2的第1个引脚通过电阻R13接集成运算放大器U2的第9个引脚,集成运算放大器U2的第14个引脚通过电阻R12接集成运算放大器U2的第9个引脚;集成运算放大器U2第14引脚通过电容C4接集成运算放大器U2的第13引脚,集成运算放大器U2的第6引脚通过电阻R15接集成运算放大器U2的第13个引脚。The 3rd pin, the 5th pin, the 10th pin, and the 12th pin of the integrated operational amplifier U2 are grounded, the 4th pin is connected to the +15V power supply VCC, and the 11th pin is connected to the negative -15V power supply VEE; The l pin is connected to the second pin of the integrated operational amplifier U2 through the capacitor C3, and the 14th pin of the integrated operational amplifier U1 is connected to the second pin of the integrated operational amplifier U2 through the resistor R9; the first pin of the integrated operational amplifier U2 The pin is connected to the 6th pin of the integrated operational amplifier U2 through the resistor R10, the 7th pin of the integrated operational amplifier is connected to the 6th pin of the integrated operational amplifier U2 through the resistor R11; the 8th pin of the integrated operational amplifier U2 is connected to the 8th pin of the integrated operational amplifier U2 through the resistor R14 The 9th pin of the integrated operational amplifier U2, the 1st pin of the integrated operational amplifier U2 is connected to the 9th pin of the integrated operational amplifier U2 through the resistor R13, and the 14th pin of the integrated operational amplifier U2 is connected to the integrated circuit through the resistor R12 The 9th pin of the operational amplifier U2; the 14th pin of the integrated operational amplifier U2 is connected to the 13th pin of the integrated operational amplifier U2 through the capacitor C4, and the 6th pin of the integrated operational amplifier U2 is connected to the integrated operational amplifier U2 through the resistor R15 13th pin.

所述集成运算放大器U3的第3引脚、第5引脚、第10引脚接地,第4引脚接+15V电源VCC,第11引脚接负-15V电源VEE;第12引脚、第13引脚、第14引脚悬空;集成运算放大器U3第l引脚通过电阻R16接集成运算放大器U3的第2引脚,集成运算放大器U2的第14个引脚通过电阻R9接集成运算放大器U3的第2个引脚;集成运算放大器U3的第7引脚通过电阻R22接集成运算放大器U3的第6引脚,集成运算放大器U3的第14个引脚通过电阻R20接集成运算放大器U3的第6个引脚,集成运算放大器U2的第1个引脚通过电阻R21接集成运算放大器U3的第6个引脚;集成运算放大器U3的第8引脚通过电容C5接集成运算放大器U3的第9引脚,集成运算放大器U3的第7个引脚通过电阻R23接集成运算放大器U3的第9个引脚;集成运算放大器U3的第8个引脚通过电阻R24接集成运算放大器U3的第13个引脚,集成运算放大器U3的第14个引脚通过电阻R25接集成运算放大器U3的第14个引脚。The 3rd pin, the 5th pin, and the 10th pin of the integrated operational amplifier U3 are grounded, the 4th pin is connected to the +15V power supply VCC, and the 11th pin is connected to the negative -15V power supply VEE; the 12th pin, the The 13th pin and the 14th pin are suspended; the 1st pin of the integrated operational amplifier U3 is connected to the 2nd pin of the integrated operational amplifier U3 through the resistor R16, and the 14th pin of the integrated operational amplifier U2 is connected to the integrated operational amplifier U3 through the resistor R9 The 2nd pin of the integrated operational amplifier U3 is connected to the 6th pin of the integrated operational amplifier U3 through the resistor R22, and the 14th pin of the integrated operational amplifier U3 is connected to the 1st pin of the integrated operational amplifier U3 through the resistor R20 6 pins, the first pin of the integrated operational amplifier U2 is connected to the sixth pin of the integrated operational amplifier U3 through the resistor R21; the eighth pin of the integrated operational amplifier U3 is connected to the ninth pin of the integrated operational amplifier U3 through the capacitor C5 Pin, the 7th pin of the integrated operational amplifier U3 is connected to the 9th pin of the integrated operational amplifier U3 through the resistor R23; the 8th pin of the integrated operational amplifier U3 is connected to the 13th pin of the integrated operational amplifier U3 through the resistor R24 pin, the 14th pin of the integrated operational amplifier U3 is connected to the 14th pin of the integrated operational amplifier U3 through the resistor R25.

所述乘法器U4的第2引脚、第4引脚、第6引脚接地,第5引脚接-15V电源VEE,第8引脚接+15V电源VCC;第1引脚和第3引脚接集成运算放大器U3的第14引脚,乘法器U4的第7引脚通过电阻R1接集成运算放大器U1的第2引脚。The 2nd pin, the 4th pin, and the 6th pin of the multiplier U4 are grounded, the 5th pin is connected to the -15V power supply VEE, and the 8th pin is connected to the +15V power supply VCC; the 1st pin and the 3rd pin The pin is connected to the 14th pin of the integrated operational amplifier U3, and the 7th pin of the multiplier U4 is connected to the 2nd pin of the integrated operational amplifier U1 through the resistor R1.

所述二极管D1的负极接集成运算放大器U1的第1个引脚,三极管Q1的发射机接集成运算放大器U1的第6个引脚。The cathode of the diode D1 is connected to the first pin of the integrated operational amplifier U1, and the transmitter of the transistor Q1 is connected to the sixth pin of the integrated operational amplifier U1.

本实用新型构造了仅含一个非线性指数函数的新型混沌模拟电路,使得混沌系统的数学结构非常简单,且指数函数的底数d可以在一定范围内任意变化,使得混沌信号更加复杂,具有更大的参数和密钥空间,进一步提高了混沌信号的复杂性。根据数学上的等效关系电路由乘法器和自然指数电路来实现,利用乘法器U4实现电压z2运算,并保持电压恒为正;利用U1的比例运算电路实现(lnd)z2运算,lnd为比例运算电路的比例系数,z2为比例运算电路的输入电压;三极管组合电路和集成运算放大器U1组成自然指数电路,实现运算,利用集成运算放大器U1的反相器实现了该电路运算精确,稳定性好,可产生更为复杂的混沌信号供应用中选择,增加了混沌系统和实现混沌系统的电路类型,且能够和已有的混沌系统组成自动切换混沌系统。The utility model constructs a non-linear exponential function The new chaotic analog circuit makes the mathematical structure of the chaotic system very simple, and the exponential function The base d of can be changed arbitrarily within a certain range, which makes the chaotic signal more complex, has a larger parameter and key space, and further increases the complexity of the chaotic signal. According to the mathematical equivalence The circuit is realized by a multiplier and a natural exponent circuit, the multiplier U4 is used to realize the voltage z 2 operation, and the voltage is kept positive; the proportional operation circuit of U1 is used to realize the (lnd)z 2 operation, and lnd is the proportional coefficient of the proportional operation circuit , z 2 is the input voltage of the proportional operation circuit; the triode combined circuit and the integrated operational amplifier U1 form a natural exponential circuit, realizing operation, using the inverter of the integrated operational amplifier U1 to realize the The circuit has precise operation and good stability, can generate more complicated chaotic signals for selection in applications, adds chaotic systems and circuit types for realizing chaotic systems, and can form an automatic switching chaotic system with existing chaotic systems.

附图说明Description of drawings

图1是本实用新型的结构图。Fig. 1 is a structural diagram of the utility model.

图2是本实用新型的原理图。Fig. 2 is a schematic diagram of the utility model.

具体实施方式Detailed ways

下面结合附图和优选实例对本实用新型作更进一步的详细说明。Below in conjunction with accompanying drawing and preferred example the utility model is described in further detail.

本实用新型的数学模型是:Mathematical model of the present utility model is:

dxdx dtdt == -- ayay ++ dd (( zz 22 ))

dy dt = cy + x a=9;b=3;c=0.65;d=4.7 dy dt = cy + x a=9; b=3; c=0.65; d=4.7

dzdz dtdt == xx -- bzbz

如图1所示,三极管组合电路和集成运算放大器U1实现了电压的指数运算,其特征在于:根据数学上的等效关系电路由乘法器和自然指数电路来实现,利用乘法器U4实现电压z2运算,并保持电压恒为正;利用U1的比例运算电路实现(lnd)z2运算,lnd为比例运算电路的比例系数,z2为比例运算电路的输入电压;三极管组合电路和集成运算放大器U1组成自然指数电路,实现运算,将(lnd)z2转换为其中三极管组合电路包括二极管D1、D2,三极管Q1、Q2和电容C6、C7,其与U1的集成运放组成具有消除交越失真且具有互补输出功能的指数运算电路,因为三极管的电压发射极电流iE与其UT之间存在指数关系:As shown in Figure 1, the triode combination circuit and the integrated operational amplifier U1 realize the exponential voltage Operation, characterized in that: according to the equivalent relationship in mathematics The circuit is realized by a multiplier and a natural exponent circuit, the multiplier U4 is used to realize the voltage z 2 operation, and the voltage is kept positive; the proportional operation circuit of U1 is used to realize the (lnd)z 2 operation, and lnd is the proportional coefficient of the proportional operation circuit , z 2 is the input voltage of the proportional operation circuit; the triode combined circuit and the integrated operational amplifier U1 form a natural exponential circuit, realizing operation, convert (lnd)z 2 to The triode combination circuit includes diodes D1, D2, triodes Q1, Q2, and capacitors C6, C7, which form an exponential operation circuit with the integrated operational amplifier of U1, which can eliminate crossover distortion and have complementary output functions, because the voltage emitter current of the triode There is an exponential relationship between i E and its U T :

ii RR == ii EE. == II SS ee uu II Uu TT

按指数变化的三极管电流,通过集成运放U1内的转换电路转换为按指数变化的电压,从而实现电压的指数运算:The triode current that changes exponentially is converted into a voltage that changes exponentially through the conversion circuit in the integrated operational amplifier U1, thereby realizing the exponential operation of the voltage:

uu Oo == -- ii RR RR == -- II SS ee uu II Uu TT RR

其中(lnd)z2作为输入uI,经过转化电路得到电压输出然后利用集成运算放大器U1反相器实现得到:Among them (lnd)z 2 is used as the input u I , and the voltage output is obtained through the conversion circuit Then utilize the integrated operational amplifier U1 inverter to realize get:

ee zz 22 lnln dd == dd zz 22

如图2所示,所述一种含有单个非线性指数项的混沌模拟电路,该电路由集成运算放大器U1、集成运算放大器U2、集成运算放大器U3、乘法器U4、二极管D1、二极管D2、三极管Q1、三极管Q2、电容C6和电容C7组成,集成运算放大器U1、集成运算放大器U2、集成运算放大器U3实现信号的加法,反向,积分功能,乘法器U4、二极管D1、二极管D2、三极管Q1、三极管Q2、电容C6和电容C7和集成运算放大器U1实现指数运算功能;乘法器U4、集成运算放大器U1内相关联的比例、加法和反向电路和集成运算放大器U2内相关联的积分和反向电路实现指数混沌系统第一个方程的运算,集成运算放大器U2内的积分、加法以及U3内的反向实现指数混沌系统第二个方程的运算,集成运算放大器U3内相关联的加法、积分和反向实现第三个方程的运算;As shown in Figure 2, the one containing a single nonlinear exponential term The chaotic analog circuit is composed of integrated operational amplifier U1, integrated operational amplifier U2, integrated operational amplifier U3, multiplier U4, diode D1, diode D2, transistor Q1, transistor Q2, capacitor C6 and capacitor C7. The integrated operational amplifier U1 , integrated operational amplifier U2, integrated operational amplifier U3 realize signal addition, inversion, integral function, multiplier U4, diode D1, diode D2, transistor Q1, transistor Q2, capacitor C6 and capacitor C7 and integrated operational amplifier U1 realize exponential operation Function: the multiplier U4, the associated ratio, addition and inversion circuit in the integrated operational amplifier U1, and the associated integral and inverting circuit in the integrated operational amplifier U2 realize the operation of the first equation of the exponential chaotic system, and the integrated operational amplifier U2 The integral, addition and reverse in U3 realize the operation of the second equation of the exponential chaotic system, and the associated addition, integral and reverse in the integrated operational amplifier U3 realize the operation of the third equation;

所述集成运算放大器U1的第3引脚、第5引脚、第10引脚、第12引脚接地,第4引脚接+15V电源VCC,第11引脚接负-15V电源VEE;第l引脚通过电阻R2接集成运算放大器U1的第2引脚,乘法器U4第7个引脚通过R1接到集成运算放大器U1的第2个引脚;集成运算放大器U1第1个引脚接到二极管D1和二极管D2之间,二极管D1、二极管D2、三极管Q1和三极管Q2组成电路的输出端接到集成运算放大器U1的第6个引脚,集成运算放大器U1的第7个引脚通过R5接到集成运算放大器U1的第6个引脚;集成运算放大器U1的第7个引脚通过R18接到集成运算放大器U1的第9个引脚,集成运算放大器U1的第8个引脚通过R19接到集成运算放大器U1的第9个引脚;集成运算放大器U1的第8个引脚通过R8接到集成运算放大器U1的第13个引脚,集成运算放大器U3的第1个引脚通过R6接到集成运算放大器U1的第13个引脚,集成运算放大器U1的第14个引脚通过R7接到集成运算放大器U1的第13个引脚。The 3rd pin, the 5th pin, the 10th pin, and the 12th pin of the integrated operational amplifier U1 are grounded, the 4th pin is connected to the +15V power supply VCC, and the 11th pin is connected to the negative -15V power supply VEE; The l pin is connected to the second pin of the integrated operational amplifier U1 through the resistor R2, the seventh pin of the multiplier U4 is connected to the second pin of the integrated operational amplifier U1 through R1; the first pin of the integrated operational amplifier U1 is connected to Between the diode D1 and the diode D2, the output terminal of the circuit composed of the diode D1, the diode D2, the transistor Q1 and the transistor Q2 is connected to the sixth pin of the integrated operational amplifier U1, and the seventh pin of the integrated operational amplifier U1 passes through R5 Connected to the 6th pin of the integrated operational amplifier U1; the 7th pin of the integrated operational amplifier U1 is connected to the 9th pin of the integrated operational amplifier U1 through R18, and the 8th pin of the integrated operational amplifier U1 is passed through R19 Connected to the 9th pin of the integrated operational amplifier U1; the 8th pin of the integrated operational amplifier U1 is connected to the 13th pin of the integrated operational amplifier U1 through R8, and the first pin of the integrated operational amplifier U3 is passed through R6 Connect to the 13th pin of the integrated operational amplifier U1, and the 14th pin of the integrated operational amplifier U1 is connected to the 13th pin of the integrated operational amplifier U1 through R7.

所述集成运算放大器U2的第3引脚、第5引脚、第10引脚、第12引脚接地,第4引脚接+15V电源VCC,第11引脚接负-15V电源VEE;第l引脚通过电容C3接集成运算放大器U2的第2引脚,集成运算放大器U1的第14个引脚通过电阻R9接集成运算放大器U2的第2个引脚;集成运算放大器U2的第1个引脚通过电阻R10接集成运算放大器U2的第6个引脚,集成运算放大器第7引脚通过电阻R11接集成运算放大器U2的第6引脚;集成运算放大器U2第8引脚通过电阻R14接集成运算放大器U2的第9引脚,集成运算放大器U2的第1个引脚通过电阻R13接集成运算放大器U2的第9个引脚,集成运算放大器U2的第14个引脚通过电阻R12接集成运算放大器U2的第9个引脚;集成运算放大器U2第14引脚通过电容C4接集成运算放大器U2的第13引脚,集成运算放大器U2的第6引脚通过电阻R15接集成运算放大器U2的第13个引脚;The 3rd pin, the 5th pin, the 10th pin, and the 12th pin of the integrated operational amplifier U2 are grounded, the 4th pin is connected to the +15V power supply VCC, and the 11th pin is connected to the negative -15V power supply VEE; The l pin is connected to the second pin of the integrated operational amplifier U2 through the capacitor C3, and the 14th pin of the integrated operational amplifier U1 is connected to the second pin of the integrated operational amplifier U2 through the resistor R9; the first pin of the integrated operational amplifier U2 The pin is connected to the 6th pin of the integrated operational amplifier U2 through the resistor R10, the 7th pin of the integrated operational amplifier is connected to the 6th pin of the integrated operational amplifier U2 through the resistor R11; the 8th pin of the integrated operational amplifier U2 is connected to the 8th pin of the integrated operational amplifier U2 through the resistor R14 The 9th pin of the integrated operational amplifier U2, the 1st pin of the integrated operational amplifier U2 is connected to the 9th pin of the integrated operational amplifier U2 through the resistor R13, and the 14th pin of the integrated operational amplifier U2 is connected to the integrated circuit through the resistor R12 The 9th pin of the operational amplifier U2; the 14th pin of the integrated operational amplifier U2 is connected to the 13th pin of the integrated operational amplifier U2 through the capacitor C4, and the 6th pin of the integrated operational amplifier U2 is connected to the integrated operational amplifier U2 through the resistor R15 13th pin;

所述集成运算放大器U3的第3引脚、第5引脚、第10引脚接地,第4引脚接+15V电源VCC,第11引脚接负-15V电源VEE;第12引脚、第13引脚、第14引脚悬空;集成运算放大器U3第l引脚通过电阻R16接集成运算放大器U3的第2引脚,集成运算放大器U2的第14个引脚通过电阻R9接集成运算放大器U3的第2个引脚;集成运算放大器U3的第7引脚通过电阻R22接集成运算放大器U3的第6引脚,集成运算放大器U3的第14个引脚通过电阻R20接集成运算放大器U3的第6个引脚,集成运算放大器U2的第1个引脚通过电阻R21接集成运算放大器U3的第6个引脚;集成运算放大器U3的第8引脚通过电容C5接集成运算放大器U3的第9引脚,集成运算放大器U3的第7个引脚通过电阻R23接集成运算放大器U3的第9个引脚;集成运算放大器U3的第8个引脚通过电阻R24接集成运算放大器U3的第13个引脚,集成运算放大器U3的第14个引脚通过电阻R25接集成运算放大器U3的第14个引脚;The 3rd pin, the 5th pin, and the 10th pin of the integrated operational amplifier U3 are grounded, the 4th pin is connected to the +15V power supply VCC, and the 11th pin is connected to the negative -15V power supply VEE; the 12th pin, the The 13th pin and the 14th pin are suspended; the 1st pin of the integrated operational amplifier U3 is connected to the 2nd pin of the integrated operational amplifier U3 through the resistor R16, and the 14th pin of the integrated operational amplifier U2 is connected to the integrated operational amplifier U3 through the resistor R9 The 2nd pin of the integrated operational amplifier U3 is connected to the 6th pin of the integrated operational amplifier U3 through the resistor R22, and the 14th pin of the integrated operational amplifier U3 is connected to the 1st pin of the integrated operational amplifier U3 through the resistor R20 6 pins, the first pin of the integrated operational amplifier U2 is connected to the sixth pin of the integrated operational amplifier U3 through the resistor R21; the eighth pin of the integrated operational amplifier U3 is connected to the ninth pin of the integrated operational amplifier U3 through the capacitor C5 Pin, the 7th pin of the integrated operational amplifier U3 is connected to the 9th pin of the integrated operational amplifier U3 through the resistor R23; the 8th pin of the integrated operational amplifier U3 is connected to the 13th pin of the integrated operational amplifier U3 through the resistor R24 Pin, the 14th pin of the integrated operational amplifier U3 is connected to the 14th pin of the integrated operational amplifier U3 through the resistor R25;

所述乘法器U4的第2引脚、第4引脚、第6引脚接地,第5引脚接-15V电源VEE,第8引脚接+15V电源VCC;第1引脚和第3引脚接集成运算放大器U3的第14引脚,乘法器U4的第7引脚通过电阻R1接集成运算放大器U1的第2引脚;The 2nd pin, the 4th pin, and the 6th pin of the multiplier U4 are grounded, the 5th pin is connected to the -15V power supply VEE, and the 8th pin is connected to the +15V power supply VCC; the 1st pin and the 3rd pin The pin is connected to the 14th pin of the integrated operational amplifier U3, and the 7th pin of the multiplier U4 is connected to the 2nd pin of the integrated operational amplifier U1 through the resistor R1;

所述二极管D1的负极接集成运算放大器U1的第1个引脚,三极管Q1的发射机接集成运算放大器U1的第6个引脚。The cathode of the diode D1 is connected to the first pin of the integrated operational amplifier U1, and the transmitter of the transistor Q1 is connected to the sixth pin of the integrated operational amplifier U1.

当然,上述说明并非对实用新型的限制,本实用新型也不仅限于上述举例,本技术领域的普通技术人员在本实用新型的实质范围内所做出的变化、改型、添加或替换,也属于本实用新型的保护范围。Of course, the above description is not a limitation of the utility model, and the utility model is not limited to the above examples, and the changes, modifications, additions or replacements made by those skilled in the art within the essential scope of the utility model also belong to Protection scope of the present utility model.

Claims (1)

1. realize the chaos analog circuit with single nonlinear exponent item, comprise integrated operational amplifier U1, integrated operational amplifier U2, integrated operational amplifier U3, multiplier U4, diode D1, diode D2, triode Q1 and triode Q2, is characterized in that:
The 3rd pin of described integrated operational amplifier U1, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th connect+15V of pin power supply VCC, the 11st pin connects negative-15V power supply VEE; L pin connects the 2nd pin of integrated operational amplifier U1 by resistance R 2, the 7th pin of multiplier U4 received the 2nd pin of integrated operational amplifier U1 by resistance R 1; The 1st pin of integrated operational amplifier U1 received between diode D1 and diode D2, the output of diode D1, diode D2, triode Q1 and triode Q2 built-up circuit is received the 6th pin of integrated operational amplifier U1, and the 7th pin of integrated operational amplifier U1 received the 6th pin of integrated operational amplifier U1 by resistance R 5; The 7th pin of integrated operational amplifier U1 received the 9th pin of integrated operational amplifier U1 by resistance R 18, the 8th pin of integrated operational amplifier U1 received the 9th pin of integrated operational amplifier U1 by resistance R 19; The 8th pin of integrated operational amplifier U1 received the 13rd pin of integrated operational amplifier U1 by resistance R 8, the 1st pin of integrated operational amplifier U3 received the 13rd pin of integrated operational amplifier U1 by resistance R 6, the 14th pin of integrated operational amplifier U1 received the 13rd pin of integrated operational amplifier U1 by resistance R 7;
The 3rd pin of described integrated operational amplifier U2, the 5th pin, the 10th pin, the 12nd pin ground connection, the 4th connect+15V of pin power supply VCC, the 11st pin connects negative-15V power supply VEE; L pin connects the 2nd pin of integrated operational amplifier U2 by capacitor C 3, the 14th pin of integrated operational amplifier U1 connects the 2nd pin of integrated operational amplifier U2 by resistance R 9; The 1st pin of integrated operational amplifier U2 connects the 6th pin of integrated operational amplifier U2 by resistance R 10, integrated operational amplifier the 7th pin connects the 6th pin of integrated operational amplifier U2 by resistance R 11; Integrated operational amplifier U2 the 8th pin connects the 9th pin of integrated operational amplifier U2 by resistance R 14, the 1st pin of integrated operational amplifier U2 connects the 9th pin of integrated operational amplifier U2 by resistance R 13, the 14th pin of integrated operational amplifier U2 connects the 9th pin of integrated operational amplifier U2 by resistance R 12; Integrated operational amplifier U2 the 14th pin connects the 13rd pin of integrated operational amplifier U2 by capacitor C 4, the 6th pin of integrated operational amplifier U2 connects the 13rd pin of integrated operational amplifier U2 by resistance R 15;
The 3rd pin of described integrated operational amplifier U3, the 5th pin, the 10th pin ground connection, the 4th connect+15V of pin power supply VCC, the 11st pin connects negative-15V power supply VEE; The 12nd pin, the 13rd pin, the 14th pin are unsettled; Integrated operational amplifier U3 l pin connects the 2nd pin of integrated operational amplifier U3 by resistance R 16, the 14th pin of integrated operational amplifier U2 connects the 2nd pin of integrated operational amplifier U3 by resistance R 9; The 7th pin of integrated operational amplifier U3 connects the 6th pin of integrated operational amplifier U3 by resistance R 22, the 14th pin of integrated operational amplifier U3 connects the 6th pin of integrated operational amplifier U3 by resistance R 20, the 1st pin of integrated operational amplifier U2 connects the 6th pin of integrated operational amplifier U3 by resistance R 21; The 8th pin of integrated operational amplifier U3 connects the 9th pin of integrated operational amplifier U3 by capacitor C 5, the 7th pin of integrated operational amplifier U3 connects the 9th pin of integrated operational amplifier U3 by resistance R 23; The 8th pin of integrated operational amplifier U3 connects the 13rd pin of integrated operational amplifier U3 by resistance R 24, the 14th pin of integrated operational amplifier U3 connects the 14th pin of integrated operational amplifier U3 by resistance R 25;
The 2nd pin of described multiplier U4, the 4th pin, the 6th pin ground connection, the 5th connect-15V of pin power supply VEE, the 8th connect+15V of pin power supply VCC; The 1st pin and the 3rd pin connect the 14th pin of integrated operational amplifier U3, and the 7th pin of multiplier U4 connects the 2nd pin of integrated operational amplifier U1 by resistance R 1;
The negative pole of described diode D1 connects the 1st pin of integrated operational amplifier U1, and the transmitter of triode Q1 connects the 6th pin of integrated operational amplifier U1.
CN201420341242.2U 2014-06-24 2014-06-24 Realization has the chaos analog circuit of single nonlinear exponent item Expired - Fee Related CN203933654U (en)

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