CN203933574U - Circuit, D class pulse-width modulated amplifier, integrated circuit and Circuits System - Google Patents
Circuit, D class pulse-width modulated amplifier, integrated circuit and Circuits System Download PDFInfo
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- CN203933574U CN203933574U CN201420057035.4U CN201420057035U CN203933574U CN 203933574 U CN203933574 U CN 203933574U CN 201420057035 U CN201420057035 U CN 201420057035U CN 203933574 U CN203933574 U CN 203933574U
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
- H03F3/21—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
- H03F3/217—Class D power amplifiers; Switching amplifiers
- H03F3/2173—Class D power amplifiers; Switching amplifiers of the bridge type
Abstract
The utility model provides circuit, D class pulse-width modulated amplifier, integrated circuit and Circuits System, and it is for the slicing of limiting amplifier.Such restriction can realize in the feedback loop of D class PWM amplifier.In one embodiment, D class A amplifier A can comprise integrator, and it is coupled to input node and is configured to generate through the input signal of integration to make the pwm signal that comparator subsequently can be based on generating with the comparison of triangular signal for driving amplifier output stage.For this reason, amplifier also comprises threshold signal maker, entirety is amplified and is carried out amplitude limit to be used to engage compensating circuit for and low voltage threshold high based on triangular signal generation.Such compensating circuit can be arranged on the bipolar junction transistor in the feedback loop of integrator.Therefore, the overall bandwidth of amplifier self can't be affected owing to having increased the amplitude limiter circuit that is intended to reduce slicing.
Description
Technical field
The utility model relates to circuit, D class pulse-width modulated amplifier, integrated circuit and Circuits System, and it is for reducing the slicing of amplifier.
Background technology
Amplifier is used to increase in the required mode of circuit the amplitude of various signals in many fields of electronic engineering.For example, audio electronics engineering adopts amplifier to drive loud speaker by amplifying audio input signal with higher volume.Amplifier is with multiple different classes of the classification, and wherein one is D class.D class A amplifier A (being sometimes called switching amplifier) generates the square wave of the variable duty ratio that represents desired digital output signal (for example,, for driving the audio output signal of loud speaker) by the feedback signal in amplification feedback loop is carried out to digital integration.Switching frequency is selected as ten times or more times of the highest response frequency in input signal conventionally.
By this way, D class A amplifier A for example, is carried the voltage signal of the constant variation of being modulated as the feedback signal by through integration to dead load (, loud speaker).But, if digital integrator due to high level input signal or feedback loop is out of control becomes saturatedly, will there is distortion in the mode that is generally known as " slicing " in output signal.Output slicing is that a kind of meeting causes D class A amplifier A to introduce and do not expect the noise seen or the problem of other distortion to output audio signal.
Utility model content
Therefore, the utility model expects to solve the problem that aforesaid output slicing causes.
In one aspect, provide a kind of circuit, it comprises: input node, is configured to receive input signal; Amplifier, is coupled to described input node and is configured to generate the input signal amplifying on output node; And amplitude limiter circuit, be coupled to the described amplifier in feedback loop and be configured to described amplifying signal to carry out amplitude limit.
In one aspect, provide a kind of D class pulse-width modulated amplifier, it comprises: input node, is configured to receive analog input signal; Integrator, is coupled to described input node and is configured to generate the input signal through integration on internal node; Pulse width modulating signal maker, is coupled to described internal node and is configured to generate the pulse width modulating signal for driving amplifier output stage; And amplitude limiter, it is coupling between described input node and described internal node and is configured to reduce slicing.
In one aspect, provide a kind of integrated circuit, it comprises: input node, is configured to receive analog input signal; Integrator, is coupled to described input node and is configured to generate the input signal through integration on internal node; Pulse width modulating signal maker, is coupled to described internal node and is configured to generate the pulse width modulating signal for driving amplifier output stage; And amplitude limiter, be coupling between described input node and described internal node and be configured to reduce slicing.
In one aspect, provide a kind of Circuits System, it comprises: the first integrated circuit, and it has: input node, is configured to receive analog input signal; Integrator, is coupled to described input node and is configured to generate the input signal through integration on internal node; Pulse width modulating signal maker, is coupled to described internal node and is configured to generate the pulse width modulating signal for driving amplifier output stage; And amplitude limiter, it is coupling between described input node and described internal node and is configured to reduce slicing; And second integrated circuit, be coupled to described the first integrated circuit.
According to the application, realize the improved plan of the problem causing for the output slicing described in background technology part.
Brief description of the drawings
Describe in detail with reference to following in conjunction with the drawings, the aspect of claim and many advantages of following will be easier to obtain cognition owing to being better understood to become, in the accompanying drawings:
Fig. 1 is the circuit diagram that is coupled to the simulated D class amplifier of loud speaker.
Fig. 2 A shows the sequential chart of the D class A amplifier A of Fig. 1 of normal running.
Fig. 2 B shows the sequential chart of the D class A amplifier A of the Fig. 1 operating in the situation that having slicing.
Fig. 3 is according to the circuit diagram of the D class PWM amplifier with amplitude limiter circuit of the embodiment of theme described herein.
Fig. 4 shows according to the sequential chart of the D class A amplifier A that utilizes Fig. 3 that amplitude limiter circuit operates of the embodiment of theme described herein.
Fig. 5 is according to the block diagram of the system of the D class PWM amplifier that comprises Fig. 3 of the embodiment of theme described herein.
Embodiment
Provide following discussion to make those skilled in the art can manufacture and use theme disclosed herein.Rule described herein can be applied to embodiment beyond above described in detail those and application and not deviate from the spirit and scope of this detailed description.The disclosure is not intended to be limited to shown embodiment, but is intended to make and adapts with the principle of disclosed herein or suggestion and the consistent wide region of feature.
By general introduction, theme disclosed herein can be directed to a kind of for exceed circuit and the method for high or low threshold value, the amplification of amplifier being carried out amplitude limit at input signal.Such amplitude limit can be realized in the feedback loop of D class PWM amplifier.In one embodiment, this circuit can comprise the input node that is configured to receive analogue audio frequency input signal.D class A amplifier A comprises integrator, and it is coupled to input node and is configured to generate integration input signal to make to be coupled to the comparator pwm signal based on generating with the comparison of triangular signal for driving amplifier output stage subsequently of internal node on internal node.For this reason, amplifier also comprises threshold signal maker, entirety is amplified and is carried out amplitude limit to be used to engage compensating circuit for and low voltage threshold high based on triangular signal generation.
Amplitude limit can utilize two compensating circuits that are configured to connect in the time that triangular signal exceedes high or low threshold value to realize.By this way, thus in the time that input signal may too approach high or low threshold value and may slicing occur, can engage compensating circuit and provide current path to the electric current that causes slicing in feedback loop.Such compensating circuit can be arranged on the bipolar junction transistor in the feedback loop of integrator.Therefore, the overall bandwidth of amplifier self can't be affected owing to having increased the amplitude limiter circuit that is intended to reduce slicing.Below with reference to Fig. 1-5, these and other aspect is described.
Fig. 1 is the circuit diagram of D class A amplifier A 100, and this D class A amplifier A 100 has the output node 130 that is coupled to loud speaker 125.Amplifier 100 is configured to receive analog input signal and generation pulse width modulation (PWM) signal corresponding with input signal to make output signal be output to loud speaker 125 at output node 130 at input node 103.Input node 103 can be for example, audio frequency input for the analog signal of the common audio available signal generator from any amount (, CD driver, DVD driver etc.) conventionally.Running through in example of the present disclosure, the example of input audio signal and output audio signal will be used to the various work of circuit shown in key diagram.
Therefore, analogue audio frequency input signal 103 is coupled to the high gain operational amplifier 110 reverse input of (being after this called " integrator 110 "), and this high gain operational amplifier 110 is coupling in negative feedback integrator configuration via resistor and capacitor feedback branch 111.The non-return input of integrator 110 is coupled to reference voltage V
rEF.Reference voltage V
rEFnormally there is the voltage signal of the amplitude of the positive and negative supply power voltage (not shown) centre in amplifier circuit 100.Integrator 110 has output node 130 and exports the analogue low pass filtering version of the audio input signal receiving at input node 103.
Comparator 105 receives the output signal of integrator 110 and receive high frequency triangle wave signal on the second input node on the first input node.Triangular signal generates from triangular signal maker 101, itself so that from clock signal 102 (come comfortable Fig. 1 and unshowned clock), generate.Triangular signal maker 101 generates the triangular signal having with clock signal 102 same period.The peak amplitude of triangular signal is conventionally about reference voltage V
rEFthe amplitude of symmetry and triangular signal is followed the variation of power supply for the object of power noise inhibition.
Comparator 105 one of determines to produce two kinds the signal relatively receiving at its each node subsequently.Comparator 105 is configured to generate the first output signal under the first input node table reveals than the more high-tension situation of the second input, and is configured to reveal and generate the second output signal input more low-voltage than second in the situation that at the first input table.For example, comparator 105 is at the amplitude of the output signal from integrator 110 output+1 logic voltage during higher than the amplitude of the triangular wave from triangular wave maker 101, and at the amplitude of the output signal of integrator 110 output-1 logic voltage during lower than the amplitude of the triangular wave from triangular wave maker 101.When the amplitude of audio input signal 103 is substantially equal to reference voltage V
rEFtime, the duty ratio of the output of comparator 105 is 50%, the amplitude that reason is triangular wave is all relatively only about half of in the time will be higher than V
rEFand compare the time lower than V at second half
rEF.This is the output signal with pulse spacing continuous circulation between high logic voltage and low logic voltage from comparator 105 by what cause.That is to say, comparator has generated the instantaneous amplitude directly proportional a series of pwm pulses of duty ratio to the audio input signal through integration.
The output of comparator 105 is coupled to the input of output stage 120, and this output stage 120 comprises the driver/buffer circuit 115 (being generally MOS thresholding driver) that complementary push-pull formula output stage 116 is driven.This has produced the amplification copy of the pwm signal of comparator.Amplifier circuit 100 can comprise the HF switch component of output filter 135 with the PWM output signal at removal output node 130 places.Output stage 120 provides PWM output signal for driving loud speaker 125.In addition, output audio signal is also used through feedback resistor 127 to the feedback signal in the negative feedback loop 104 of the reverse input of integrator 110.With reference to the sequential chart of the various signals shown in figure 2A, can understand better the operation of the D class A amplifier A 100 of Fig. 1.
Fig. 2 A shows the sequential chart of the D class A amplifier A of Fig. 1 of normal running.Audio input signal 103 is shown to have level and smooth sine wave.This can represent time slice quite little in whole audio signal.Then, show the high frequency triangle wave from triangular wave maker 101.Subsequently, can see the PWM output signal of aliging from the characteristic with audio input signal and triangular wave of comparator 105.Continuous circulation between high logic voltage from the output signal of comparator 105 in a series of pwm pulses and low logic voltage, the instantaneous amplitude of the duty ratio of this pwm pulse and audio input signal 103 is directly proportional.When audio input signal is during in its lowest amplitude, the duty ratio of pwm signal is very low and have short pulse, and when audio input signal is during in its high-amplitude, the duty ratio of pwm signal is very high and have broad pulse.
When any amplifier is pushed to create while having the more high-power output signal that can produce than amplifier power supply, amplifier amplifies signal until its maximum performance before by carrying out " excision " or " slicing " at the maximum performance place of amplifier simply at signal.Exceed amplifier performance signal section in addition cut simply.This simulated audio signal that has caused being generally sine wave shape becomes the square wave type waveform of distortion, is clipped and sinusoidal wave top is looked.Fig. 2 B describing subsequently shows this phenomenon.
Fig. 2 B shows the sequential chart of the D class A amplifier A that utilizes Fig. 1 that slicing operates.Output slicing is that noise or other distortion are introduced the problem among output audio signal by a kind of D class A amplifier A that may cause.The in the situation that of D class A amplifier A, slicing occurs in the time that integrator 110 excessively drives.That is to say, if audio input signal 103 or feedback signal 104 make integrator saturated, integrator 110 will be overdriven and cause slicing.The integrator 110 of Fig. 1 may be overdriven in the time that its first amplitude of inputting the signal on node exceedes the amplitude peak of the triangular signal on its second input node.
For example, if the amplitude of audio input signal 103 is very low, this causes the output signal of integrator 110 to be substantially equal to its positive supply rail, and therefore equals the peak value amplitude of triangular signal.Therefore,, even if the amplitude of audio input signal 103 may change to some extent, integrator 110 can not have enough " headroom " yet and follow these variations, and therefore effectively audio input signal 103 is carried out to " slicing ".The result of this slicing makes the output of comparator 105 remain height until the amplitude of audio input signal 103 declines abundant and the output voltage of integrator 110 is brought down below to the positive supply rail of integrator.Similarly phenomenon occurs and causes the output of comparator 105 to remain low until the amplitude decline of audio input signal 103 is abundant and the output voltage of integrator 110 is increased to higher than negative supply rail when when the overtension of audio input signal 103.This can see in Fig. 2 B, in the time that the sinusoidal wave top of audio input signal 103 is illustrated as being reamed.Obviously, technical staff understands, actual audio input signal will be indeclinable, but the output signal of emulation is described in Fig. 2 B being similar to.In addition, slicing can cause integrator 110 saturated (, the output driving transistors (not shown) of integrator 110), and saturated meeting causes more audible noise and distortion the audible noise that causes except the slicing of audio input signal and distortion.
A kind of is to use slicing testing circuit (not shown) for reducing or eliminating the technology of slicing, it can monitor to make integrator 110 in the time slicing being detected, to be reset to the output signal of comparator 105, thereby integrator 110 can be unsaturated or introduces distortion in final output signal.But the existing problem of this technology is, for example utilize, to the reset signal of the integrator 110 of the forward path that comprises D class A amplifier A (, by the path of comparator 105 self), it has introduced another negative feedback loop.Therefore, distortion detector circuit can be reacted and the speed of correcting is limited by the bandwidth of the feedforward part of D class A amplifier A to slicing event.Therefore even integrator 110 is saturated, before any distortion detector circuit can detect and correct slicing, may to occur audible noise and distortion.
Fig. 3 is according to the circuit diagram of the D class PWM amplifier 300 with amplitude limiter circuit 370 of the embodiment of theme disclosed herein.Amplitude limiter circuit comprises the some electronic building bricks that surrounded by dotted line in Fig. 3.In addition, this embodiment shows difference input/difference output D class PWM amplifier 300.It being understood that and also can only utilize the top of Fig. 3 and realize single-ended version.In this respect, the upper and lower of the circuit of Fig. 3 operates in a similar fashion.Like this, the first half at amplifier 300 for the detailed description operating and by keep attention.
Amplitude limiter circuit 370 is utilized the detection of the high and low voltage threshold value to the triangular wave from triangular wave maker 301.As previously mentioned, the always clock signal generation triangular wave of self-clock 302 of triangular wave maker 301.In order to determine the high and low voltage threshold value of triangular wave, amplitude limiter circuit 370 comprises triangular peak detector circuit 365.Triangular peak detector 365 is illustrating and is being described in more detail about Fig. 4 below, but for the context of the discussion of whole amplitude limiter circuit 370, triangular peak detector 365 generates two peak signal V
hPand V
lP.These peak voltage signal V
hPand V
lPequal respectively the positive and negative peak values of triangular signal.In addition, just as triangular wave self is about reference voltage V
rEFsymmetrical the same, peak voltage signal V
hPand V
lPalso about reference voltage V
rEFsymmetrical (, peak voltage signal V
hPwith with peak voltage signal V
lPlower than reference voltage V
rEFthe equal amount of amount and higher than reference voltage V
rEF).
Therefore, peak voltage signal V
hPand V
lPcan equal at first the corresponding high and low peak value of triangular signal.Peak voltage signal V
hPand V
lPcorresponding output node be coupled to the corresponding non-return input node 372 and 374 of negative feedback operational amplifier.Amplifier stage keeps respectively peak voltage signal V
hPand V
lP.Subsequently, comprise that resistor 375,376 and 377 resistor network can be used to generate the threshold voltage signal V that will use with other assembly of amplitude limiter circuit 370
hand V
l.By changing the resistance of resistor 375, threshold voltage signal V
hand V
lcan be set to be equal to or less than detected peak voltage signal V
hPand V
lPfree voltage numerical value.Similarly, threshold voltage signal V
hand V
lalso about reference voltage V
rEFkeep symmetrical.
Turn to now the top of only paying close attention to Fig. 3.Threshold signal V
hand V
lalso be used to subsequently control two the corresponding bipolar junction transistors (BJT) that are used as the switch for engaging one of two current compensation circuits.Therefore, receive high voltage threshold V
hnode be coupled to the base stage of PNP BJT transistor 380.This transistor is referred to as amplitude limit PNP transistor 380.Equally, receive low voltage threshold V
lnode be coupled to the base stage of NPN BJT transistor 381.This transistor is referred to as amplitude limit NPN transistor 381.
The emitter-coupled of amplitude limit PNP transistor 380 is to the base stage that is known as the first current compensation circuit that feeds back NPN transistor 383.In addition, feedback NPN transistor 383 makes resistor and capacitor feedback branch 311 parallel coupled in the feedback loop of its conducting node and integrator 310.Equally, the emitter-coupled of amplitude limit NPN transistor 381 is to the base stage that is known as the second current compensation circuit that feeds back PNP transistor 384.The same with feedback NPN transistor 383, feed back resistor and capacitor feedback branch 311 parallel coupled in the feedback loop that PNP transistor 384 also makes its conducting node and integrator 310.
By feedback transistor 383 and 384 is arranged in the feedback loop of integrator 310, the output of integrator 310 can be at the voltage of audio input signal 305 close to voltage threshold V
hand V
ltime by with exponential manner amplitude limit.This be because compensating circuit (feedback transistor 383 and 384) for electric current provides path, otherwise this electric current will cause slicing in output signal.Below the concrete operations of these assemblies are made a more detailed description.
During operation, D class PWM amplifier 300 audio reception input signals 303.The in the situation that of single-ended D class PWM amplifier 300, only the top of Fig. 3 is a part for whole circuit.As shown in Figure 3, audio input signal 303 is difference audio input signals, and wherein Reference numeral 303 is all indicated input in upper and lower.Equally, because the class of operation of bottom is similar to top, so will only be described top for the sake of simplicity.
As previously mentioned, audio input signal 303 is received on the node of reverse input that is coupled to integrator 310, and the non-return input of integrator 310 receives reference voltage V
rEF.As previously mentioned, reference voltage V
rEFnormally there is the voltage signal of the amplitude of the positive and negative supply power voltage (not shown) centre in amplifier circuit 300.Integrator 310 has output node and exports the low-pass filtering version of the audio input signal receiving at input node 303.
Comparator 305 receives the output signal of integrator 310 and receive high frequency triangle wave signal on the second input node on the first input node.Triangular signal maker 301 generates the triangular signal having with clock signal 302 same period.Comparator 305 is configured to generate the first output under the first input node table reveals than the more high-tension situation of the second input node, and is configured to reveal and generate the second output input more low-voltage than second in the situation that at the first input table.As previously mentioned, comparator 305 is at the amplitude of the output signal from integrator 310 output+1 logic voltage during higher than the amplitude of the triangular wave from triangular wave maker 301, and at the amplitude of the output signal of integrator 310 output-1 logic voltage during lower than the amplitude of the triangular wave from triangular wave maker 301.This is the output signal with pulse spacing continuous circulation between high logic voltage and low logic voltage from comparator 305 by what cause.That is to say, comparator 305 has generated the instantaneous amplitude directly proportional a series of pwm pulses of duty ratio to the audio input signal 303 through integration.
The output of comparator 305 is coupled to the input of output stage, and this output stage comprises the driver/buffer circuit 315 (being generally MOS thresholding driver) that complementary push-pull formula output stage 316 is driven.This has produced audio output signal 330, and it is the amplification copy of the pwm signal of comparator.In addition, this output audio signal 330 is also used through feedback resistor 327 to the feedback signal in the negative feedback loop of the reverse input of integrator 310.
When the amplitude of audio input signal 303 makes the amplitude of output signal of integrator 310 in threshold voltage signal V
hand V
lbetween time, not conduction current or only conduct the insignificant electric current of quantity of feedback NPN and PNP transistor 383 and 384.But, approach high voltage threshold V when the amplitude of audio input signal 303 makes the amplitude of the output signal of integrator 310
htime, feedback PNP transistor 384 is high voltage threshold V by the amplitude limitation of the output signal of integrator 310 effectively
h.This is because of the exponential relationship between collector current and the base-emitter voltage Vbe of feedback PNP transistor 384, and the very little variation of amplitude output signal of integrator 310 will cause feeding back PNP transistor 384 and find all excessive (slicing) electric current drawing by audio input signal 303 to become the source lower than input wave absorption threshold value.Therefore, this softens amplitude limit for more soft and mellow and full amplitude limit from stiff and flat amplitude limit effectively.
More specifically, for the PNP transistor such as feedback PNP transistor 384, known:
Wherein Ic is collector current, and Is is transistor saturation current, and Vbe is base-emitter voltage (Vbe has negative value for PNP transistor), and V
tit is thermal voltage.
Therefore, the output signal of integrator 310 (is after this labeled as A
o) voltage add that the base-emitter voltage Vbe of feedback PNP transistor 384 adds that the base-emitter voltage Vbe of amplitude limit NPN transistor 381 will equal high voltage threshold signal V
h.In another way, V
bEfeedbackPNPequal V
h-V
bElimitNPN-A
o.
As a result, aspect current signal, produced:
Due to high voltage threshold signal V
hbase-emitter voltage V with amplitude limit NPN transistor 381
belimitNPNconstant, so even if can see the output voltage signal A of integrator 310
osmall size variation also can cause feeding back the collector current I of PNP transistor 384
cFeedbackPNPsignificantly variation.As the above mentioned, the changes in amplitude of the output signal of integrator 310 finds all excessive (slicing) electric current drawing by audio input signal 303 to become the source lower than input wave absorption threshold value by causing feeding back PNP transistor 384.Therefore, this softens amplitude limit for more soft and circular amplitude limit as shown in Figure 4 from the stiff and flat amplitude limit as shown in Fig. 2 B (showing slicing) effectively.
Fig. 4 shows according to the sequential chart of the D class A amplifier A that utilizes Fig. 3 that amplitude limiter circuit operates of the embodiment of the theme of discussing herein.Utilize as shown in Figure 4 to A
osoftening amplitude limit, A
osignal does not have flat slicing peak value, but has circular peak value.Therefore, signal A
owill never equate (even V completely with the peak value of triangular signal 301
hand V
lequal the peak value of triangular signal 301), thus the output of comparator 305 will can not remain high or low for the cycle for one of triangular signal 301.This can see in comparator 305 output signals, and it is at A
opeak value part during still there is pulse.Under the background of Fig. 4, these pulses can be amplified to illustrate with the difference of Fig. 2 B and can be alignd with triangular signal 301.
In a similar fashion, when the amplitude of audio input signal 303 makes the amplitude of output signal of integrator 310 close to low voltage threshold V
l, feeding back NPN transistor 383 is low voltage threshold V by the amplitude limitation of the output signal of integrator effectively
l.
In addition, due to the exponential relationship between collector current and the base-emitter voltage Vbe of feedback NPN transistor 383, the small size variation of the amplitude output signal of integrator 310 will cause feeding back NPN transistor 383 and find all excessive (slicing) electric current drawing by audio input signal 303 to become the source higher than input wave absorption threshold value.With the same before, this softens amplitude limit for more soft and circular amplitude limit from stiff and flat amplitude limit effectively.
More specifically, for the NPN transistor such as feedback NPN transistor 383, known:
Wherein Ic is collector current, and Is is transistor saturation current, and Vbe is base-emitter voltage (Vbe for NPN transistor have on the occasion of), and V
tit is thermal voltage.
Therefore, the output signal A of integrator 310
ovoltage add feedback NPN transistor 383 base-emitter voltage Vbe add that the base-emitter voltage Vbe of amplitude limit PNP transistor 380 will equal low voltage threshold signal V
l.In another way, V
bEfeedbackNPNequal V
l+ V
bElimitPNP-A
o.
As a result, aspect current signal, produced:
Ic
feedback_NPN≈Is
feedback_NPN*e
(VL+VbelimitPNP-Ao)/VT
Due to low voltage threshold signal V
lbase-emitter voltage V with amplitude limit PNP transistor 380
beLimitPNPconstant, so even if can see the output voltage signal A of integrator 310
osmall size variation also can cause feeding back the collector current I of NPN transistor 383
cFeedbackNPNsignificantly variation.As the above mentioned, the changes in amplitude of the output signal of integrator 310 finds all excessive (slicing) electric current drawing by audio input signal 303 to become the source higher than input wave absorption threshold value by causing feeding back NPN transistor 383.Therefore, this softens amplitude limit for more soft and circular amplitude limit as shown in Figure 4 from the stiff and flat amplitude limit as shown in Fig. 2 B (showing slicing) effectively.
As described above, embodiment of the present utility model has the advantage that is better than conventional D class PWM amplifier and method of operation thereof.For example, amplitude limiter circuit 370 is parts of the feedback circuitry of integrator 305, thereby it is not by the bandwidth institute amplitude limit of the other parts of D class PWM amplifier.Therefore, amplitude limiter circuit 370 can be reacted for slicing event quickly, and has even prevented audible noise and distortion that slicing and slicing may be introduced.
In addition, amplitude limiter circuit 370 can also be used to the power output of D class PWM amplifier 300 to control.This can pass through adjusting threshold voltage signal V
hand V
lcontrolled to regulate power to the PWM output signal driving such as the load of loud speaker (not shown).That is to say, can regulate by conduct the substituting or in addition regulate V of amplitude of audio input signal 303
hand V
lvolume to loud speaker regulates.
Fig. 5 is according to the block diagram of the system 500 of the D class PWM amplifier that comprises Fig. 3 of the execution mode of theme disclosed herein.System 500 can comprise having the first integrated circuit 504 of D class PWM amplifier 300 as described above.System 500 may further include the second integrated circuit 550 that is coupled to the first integrated circuit 504.These integrated circuits can be formed on corresponding integrated circuit nude film or can be formed on single integrated circuit nude film.Again additionally, integrated circuit 504 and 550 can also be communicatively coupled to separately or jointly processor 560 and memory 570.Each add-on assemble also can be formed or can be comprised independent integrated circuit die by identical integrated circuit die.
Such system 500 as shown in Figure 5 can be the suitably application arbitrarily that can be used to D class PWM amplifier 300.Particular example can be the low-power signal amplifier for integrated circuit with limited available horsepower and/or limited nude film space.Therefore, the first or second integrated circuit 504 and 550 can comprise and is configured to the concrete signal parameter such as ambient noise or principle signal to amplify to make to generate amplifier or the amplifying circuit that the digital signal of amplifying represents institute's sensed parameter.
Although theme discussed in this article can have various amendments and replaceable structure, there is shown its some illustrated embodiment and be described in detail hereinbefore.But, should be understood that, be not intended to claim to be confined to disclosed concrete form, but in contrast, it is intended to cover all modifications, replaceable structure and the equivalents within the spirit and scope that fall into claim.
Claims (25)
1. a circuit, is characterized in that, described circuit comprises:
Input node, is configured to receive input signal;
Amplifier, is coupled to described input node and is configured to generate the input signal amplifying on output node; And
Amplitude limiter circuit, is coupled to the described amplifier in feedback loop and is configured to described amplifying signal to carry out amplitude limit.
2. circuit according to claim 1, is characterized in that, described amplifier further comprises D class pulse-width modulated amplifier.
3. circuit according to claim 1, it is characterized in that, described amplifier further comprises integrator, and described integrator has the resistance-capacitance branch in described feedback loop and is coupled to described input node, to make described integrator be configured to generate the input signal through integration.
4. circuit according to claim 3, it is characterized in that, described amplifier further comprises comparator, and described comparator is coupled to the output of described integrator, and is configured to comparison based on described integrator output signal and reference signal and formation logic signal.
5. circuit according to claim 4, is characterized in that, described reference signal comprises triangular signal, and described circuit further comprises the triangular wave maker that is configured to generate described triangular signal.
6. circuit according to claim 4, is characterized in that, the logical signal generating comprises pulse width modulating signal.
7. circuit according to claim 4, is characterized in that, described amplifier further comprises driving stage, and described driving stage has buffer circuits and push-pull cascade and is configured to generate the input signal of described amplification.
8. circuit according to claim 1, is characterized in that, described amplifier further comprises the feedback circuit being coupling between described output node and described input node.
9. circuit according to claim 1, is characterized in that, described amplitude limiter circuit further comprises threshold voltage generative circuit, and described threshold voltage generative circuit is configured to generate first threshold voltage and Second Threshold voltage.
10. circuit according to claim 1, it is characterized in that, described amplitude limiter circuit further comprises the first compensating circuit, and described the first compensating circuit is configured to provide current path to the electric current from described input signal in the situation that described input signal exceedes the first voltage threshold.
11. circuit according to claim 10, it is characterized in that, described amplitude limiter circuit further comprises the second compensating circuit, and described the second compensating circuit is configured to provide current path to the electric current from described input signal in the situation that described input signal exceedes second voltage threshold value.
12. circuit according to claim 11, is characterized in that, described the first compensating circuit comprises that NPN bipolar junction transistor and described the second compensating circuit comprise PNP bipolar junction transistor.
13. circuit according to claim 1, it is characterized in that, described amplitude limiter circuit further comprises that the situation for exceed the first voltage threshold at described input signal engages the first bipolar junction transistor switch of the first compensating circuit and engages the second bipolar junction transistor switch of the second compensating circuit for exceed the situation of second voltage threshold value at described input signal.
14. circuit according to claim 1, is characterized in that, described amplitude limiter circuit further comprises the resistor network that is configured to the amplitude limit that regulates described amplitude limiter circuit.
15. 1 kinds of D class pulse-width modulated amplifiers, is characterized in that, described D class pulse-width modulated amplifier comprises:
Input node, is configured to receive analog input signal;
Integrator, is coupled to described input node and is configured to generate the input signal through integration on internal node;
Pulse width modulating signal maker, is coupled to described internal node and is configured to generate the pulse width modulating signal for driving amplifier output stage; And
Amplitude limiter, it is coupling between described input node and described internal node and is configured to reduce slicing.
16. D class pulse-width modulated amplifiers according to claim 15, it is characterized in that, described amplitude limiter further comprises the first compensating circuit, and described the first compensating circuit is configured to provide current path to the electric current from described input signal in the situation that described input signal exceedes the first voltage threshold.
17. D class pulse-width modulated amplifiers according to claim 16, it is characterized in that, described amplitude limiter further comprises the second compensating circuit, and described the second compensating circuit is configured to provide current path to the electric current from described input signal in the situation that described input signal exceedes second voltage threshold value.
18. D class pulse-width modulated amplifiers according to claim 17, is characterized in that, described the first compensating circuit comprises that NPN bipolar junction transistor and described the second compensating circuit comprise PNP bipolar junction transistor.
19. 1 kinds of integrated circuits, is characterized in that, described integrated circuit comprises:
Input node, is configured to receive analog input signal;
Integrator, is coupled to described input node and is configured to generate the input signal through integration on internal node;
Pulse width modulating signal maker, is coupled to described internal node and is configured to generate the pulse width modulating signal for driving amplifier output stage; And
Amplitude limiter, is coupling between described input node and described internal node and is configured to reduce slicing.
20. integrated circuits according to claim 19, is characterized in that, further comprise single integrated circuit nude film.
21. integrated circuits according to claim 19, is characterized in that, further comprise multiple integrated circuit dies.
22. 1 kinds of Circuits System, is characterized in that, described Circuits System comprises:
The first integrated circuit, described the first integrated circuit has:
Input node, is configured to receive analog input signal;
Integrator, is coupled to described input node and is configured to generate the input signal through integration on internal node;
Pulse width modulating signal maker, is coupled to described internal node and is configured to generate the pulse width modulating signal for driving amplifier output stage; And
Amplitude limiter, it is coupling between described input node and described internal node and is configured to reduce slicing; And
The second integrated circuit, is coupled to described the first integrated circuit.
23. Circuits System according to claim 22, is characterized in that, one of described the first integrated circuit and described second integrated circuit further comprise processor.
24. Circuits System according to claim 22, is characterized in that, one of described the first integrated circuit and described second integrated circuit further comprise memory.
25. Circuits System according to claim 22, is characterized in that, described input node comprises difference input node.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420057035.4U CN203933574U (en) | 2014-01-28 | 2014-01-28 | Circuit, D class pulse-width modulated amplifier, integrated circuit and Circuits System |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201420057035.4U CN203933574U (en) | 2014-01-28 | 2014-01-28 | Circuit, D class pulse-width modulated amplifier, integrated circuit and Circuits System |
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| CN203933574U true CN203933574U (en) | 2014-11-05 |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104581466A (en) * | 2014-12-15 | 2015-04-29 | 恩平市恩宝电子有限公司 | Wireless microphone system capable of automatically adjusting emission power |
| CN104811151A (en) * | 2014-01-28 | 2015-07-29 | 意法半导体研发(深圳)有限公司 | Device and method for decreasing clipping in amplifier |
| CN109891740A (en) * | 2016-10-18 | 2019-06-14 | 美纳里尼硅生物系统股份公司 | For driving the electronic drive circuit and corresponding analytical equipment of the electrode of the microfluidic device of manipulation particle |
| CN110875729A (en) * | 2018-08-30 | 2020-03-10 | 马克西姆综合产品公司 | Digital pulse width modulation driver system |
| CN111466082A (en) * | 2017-11-22 | 2020-07-28 | 德州仪器公司 | Class D amplifier with duty cycle control |
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2014
- 2014-01-28 CN CN201420057035.4U patent/CN203933574U/en not_active Expired - Lifetime
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104811151A (en) * | 2014-01-28 | 2015-07-29 | 意法半导体研发(深圳)有限公司 | Device and method for decreasing clipping in amplifier |
| CN104811151B (en) * | 2014-01-28 | 2018-04-10 | 意法半导体研发(深圳)有限公司 | For reducing the apparatus and method of the slicing in amplifier |
| CN104581466A (en) * | 2014-12-15 | 2015-04-29 | 恩平市恩宝电子有限公司 | Wireless microphone system capable of automatically adjusting emission power |
| CN109891740A (en) * | 2016-10-18 | 2019-06-14 | 美纳里尼硅生物系统股份公司 | For driving the electronic drive circuit and corresponding analytical equipment of the electrode of the microfluidic device of manipulation particle |
| CN109891740B (en) * | 2016-10-18 | 2023-08-15 | 美纳里尼硅生物系统股份公司 | Electronic drive circuit for driving electrodes of a microfluidic device for manipulating particles, and corresponding analysis device |
| CN111466082A (en) * | 2017-11-22 | 2020-07-28 | 德州仪器公司 | Class D amplifier with duty cycle control |
| CN110875729A (en) * | 2018-08-30 | 2020-03-10 | 马克西姆综合产品公司 | Digital pulse width modulation driver system |
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Address after: 5 / F East B501, South B502, North B503, 6th floor, block B, TCL Industrial Research Institute building, No. 006, Gaoxin South 1st Road, Nanshan District, Shenzhen City, Guangdong Province Patentee after: STMicroelectronics (Shenzhen) R&D Co.,Ltd. Address before: 518057, 4/5 building, B block, South SKYWORTH building, South Zone, Shenzhen hi tech Zone, Nanshan District science and Technology Park, Guangdong, China Patentee before: STMicroelectronics (Shenzhen) R&D Co.,Ltd. |
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Granted publication date: 20141105 |